Serial RapidIO (SRIO) User's Guide

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5.33 LSU n Control Register 0 (LSU n_REG0)
SRIO Registers
There are four of these registers, one for each LSU (see Table 87 ). The general description for an LSU
control register 0 is shown in Figure 94 and described in Table 88 . For additional programming see
Section 2.3.3 .
Table 87. LSU n_REG0 Registers and the Associated LSUs
Register Address Offset Associated LSU
LSU1_REG0 0400h LSU1
LSU2_REG0 0420h LSU2
LSU3_REG0 0440h LSU3
LSU4_REG0 0460h LSU4
Figure 94. LSU n Control Register 0 (LSU n_REG0)
31 0
ADDRESS_MSB
R/W-00h
LEGEND: R/W = Read/Write; - n = Value after reset
Table 88. LSU n Control Register 0 (LSU n_REG0) Field Descriptions
Bit Field Value Description
31–0 ADDRESS_MSB 00000000h 32-bit most significant bits of an extended address specified through LSU n.
to
FFFFFFFFh
SPRUE13A – September 2006 Serial RapidIO (SRIO) 155
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