Stereo System - Digital Audio Signal Processor User Manual

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SPRS079E – OCTOBER 1998 – REVISED AUGUST 2000
40
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memory and parallel I/O interface timing (continued)
PS, DS
R/W
MSTRB
D[15:0]
A[19:0]
CLKOUT
t
h(D)R
t
h(CLKL-A)R
t
d(CLKL-MSH)
t
d(CLKL-A)
t
d(CLKL-MSL)
t
su(D)R
t
a(A)M
t
a(MSTRBL)
t
h(A-D)R
t
h(D)MSTRBH
NOTE A: A[19:16] are always driven low during accesses to external data space.
Figure 13. Memory Read (MSTRB = 0)