Network Router User Manual

TMS380C26
NETWORK COMMPROCESSOR
SPWS010A–APRIL 1992–REVISED MARCH 1993
POST OFFICE BOX 1443 • HOUSTON, TEXAS
77251–1443
3
description
The TMS380C26 is a single-chip network communications processor (commprocessor) that supports token
ring, or Ethernet Local Area Networks (LANs). Either token ring at data rates of 16 Mbps or 4 Mbps, or Ethernet
at a data rate of 10 Mbps, can be selected. A flexible configuration scheme allows network type and speed to
be configured by hardware or software. This allows the design of LAN subsystems which support both token
ring and Ethernet networks, by electrically or physically switched network front-end circuits.
The TMS380C26 conforms to IEEE 802.5–1989 standards and has been verified to be completely IBM

Token-Ring compatible. By integrating the essential control building blocks needed on a LAN subsystem card
into one device, the TMS380C26 can ensure that this IBM compatability is maintained in silicon.
The TMS380C26 conforms to ISO/IEC 8802–3 (ANSI/IEEE Std 802.3) CSMA/CD standards, and the Ethernet
”Blue Book” standard.
The high degree of integration of the TMS380C26 makes it a virtual LAN subsystem on a single chip. Protocol
handling, host system interfacing, memory interfacing, and communications processing are all provided through
the TMS380C26. To complete LAN subsystem design, only the network interface hardware, local memory, and
minimal additional components such as PALs and crystal oscillators need to be added.
The TMS380C26 provides a 32-bit system memory address reach with a high-speed bus-master DMA interface
that supports rapid communications with the host system. In addition, the TMS380C26 supports direct I/O and
a low-cost 8-bit pseudo-DMA interface that requires only a chip select to work directly on an 80x8x 8-bit slave
I/O interface. Finally, selectable 80x8x or 68xxx-type host system bus and memory organization add to design
flexibility.
The TMS380C26 supports addressing for up to two Megabytes of local memory. This expanded memory
capacity can improve LAN subsystem performance by minimizing the frequency of host LAN subsystem
communications by allowing larger blocks of information to be transferred at one time. The support of large local
memory is important in applications that require large data transfers (such as graphics or data base transfers)
and in heavily loaded networks where the extra memory can provide data buffers to store data until it can be
processed by the host.
The proprietary CPU used in the TMS380C26 allows protocol software to be downloaded into RAM or stored
in ROM in the local memory space. By moving protocols (such as LLC) to the LAN subsystem, overall system
performance is increased. This is accomplished due to the the offloading of processing from the host system
to the TMS380C26, which may also reduce LAN subsystem-to-host communications. As other protocol
software is developed, greater differentiation of end products with enhanced system performance will be
possible.
In addition, the TMS380C26 includes hardware counters that provide realtime error detection and automatic
frame buffer management. These counters control system bus retries, burst size, and track host and LAN
subsystem buffer status. Previously, these counters needed to be maintained in software. By integrating them
into hardware, software overhead is removed and LAN subsystem performance is improved.
The TMS380C26 implements a TI-patented Enhanced Address Copy Option (EACO) interface. This interface
supports external address checking devices, such as the TMS380SRA Source Routing Accelerator. The
TMS380C26 has a 128-word external I/O space in its memory map to support external address-checker devices
and other hardware extensions to the TMS380 architecture. Hardware designed in conformance with TI’s
Specification for External Adapter-bus Devices (SEADs) can map registers into this external I/O space and post
interrupts to the TMS380C26.
The major blocks of the TMS380C26 include the Communications Processor (CP), System Interface (SIF),
Memory Interface (MIF), Protocol Handler (PH), Clock Generator (CG), and the Adapter Support Function (ASF)
as shown in Figure 2.
The TMS380C26 is available in a 132-pin JEDEC plastic quad flat pack and is rated from 0°C to 70°C.
IBM is a registered trademark of International Business Machines Corporation.