Network Router User Manual

TMS380C26
NETWORK COMMPROCESSOR
SPWS010A–APRIL 1992–REVISED MARCH 1993
POST OFFICE BOX 1443 • HOUSTON, TEXAS
77251–1443
80
PARAMETER MEASUREMENT INFORMATION
Output Data Valid
(High)
Only SCS needs to be Inactive.
All Others are Don’t Care.
SADH0–SADH7,
SADL0–SADL7,
SPH, SPL
(see Note A)
SDTACK
†
SDBEN
SDDIR
SLDS
SRNW
SIACK
SCS, SRSX,
SRS0, SRS1,
SBHE
272a
275
261a
261
260
259
283R
267
HI-Z
HI-ZHI-Z
282a
HI-Z
276
255
282R
279
286
273a
286
†
SDTACK
is an active-low bus ready signal. It must be asserted before data output.
NOTE A: Internal logic will drive SDTACK
high and verify that it has reached a valid high level before three-stating the signal.
Figure 39. 68xxx Interrupt Acknowledge Cycle Timing