Network Card User Manual

External Devices
2-29 ThunderLAN Registers
When the EEPROM address is shipped out, another special pattern of control
signal movements must take place to signal the start of the data transfer.
// send device ID, address and read command to EEPROM
sel(base_addr, READ);
// EEPROM should have acked
if (!ack(base_addr))
return (0);
//clock bits in from EDATA and construct data in tmp
for (i = 8,tmp = 0,ips = 0x80;i;i––,ips >>= 1)
{
set(ECLOK);
if (test(EDATA))
tmp |= ips;
clr(ECLOK);
}
togHL(ECLOK);
Test is a macro, like set and clear, that indirectly reads the bit passed into the
NetSio register in the internal register block using the DIO_ADR and
DIO_DATA registers in the host register block.
// send EEPROM stop access sequence
clr(EDATA); set(ECLOK); set(EDATA); clr(ETXEN);
The following control signal movements are specified in the data sheet for the
EEPROM.
CritOff();
return((BYTE)(tmp & 0xff));
}
Similar routines can be created for writing a byte, reading and writing a word,
or reading and writing a double word to the EEPROM using the NetSio regis-
ter’s control bits. In the DOS/Windows environment, there are O/S calls pro-
vided for reading and writing to PCI configuration space. Routines similar to
network serial I/O routines can be written using the PCI O/S calls, but they are
more awkward. Instead of an indirect read, modify, and write cycle, one per-
forms an O/S PCI read call, a modify, and an O/S PCI write call for each bit
modified.