Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsLinear IC - Audio amplifier 1-channel (mono) or 2-channel (stereo) Class D HTSSOP 24

1 Fm

MuteControl

PVCCL

TPA3121D2

SIMPLIFIED APPLICATIONCIRCUIT

PVCCR

VCLAMP

GAIN1

BYPASS

1 Fm

0.22 Fm

AGND

LeftChannel

RightChannel

10Vto26V

4-StepGainControl

ShutdownControl

LIN

RIN

BSR

BSL

PGNDR

PGNDL

0.22 Fm

33 Hm

0.22 Fm

470 Fm

0.22 Fm

1 Fm

470 Fm

GAIN0

AVCC

MUTE

ROUT

LOUT

S0267-01

TPA3121D2

www.ti.com

SLOS537A –MAY 2008–REVISED AUGUST 2010

15-W STEREO CLASS-D AUDIO POWER AMPLIFIER

Check for Samples: TPA3121D2

FEATURES

APPLICATIONS

• Flat Panel Display TVs

• 10-W/Ch Stereo Into an 8-Ω Load From a 24-V

Supply

• DLP

TVs

• CRT TVs

• 15-W/Ch Stereo Into a 4-Ω Load from a 22-V

Supply

• Powered Speakers

• 30-W/Ch Mono Into an 8-Ω Load from a 22-V

DESCRIPTION

Supply

• Operates From 10 V to 26 V

The TPA3121D2 is a 15-W (per channel), efficient,

class-D audio power amplifier for driving stereo

• Can Run From +24 V LCD Backlight Supply

speakers in a single-ended configuration or a mono

• Efficient Class-D Operation Eliminates Need

speaker in a bridge-tied-load configuration. The

for Heat Sinks

TPA3121D2 can drive stereo speakers as low as 4 Ω.

• Four Selectable, Fixed-Gain Settings

The efficiency of the TPA3121D2 eliminates the need

for an external heat sink when playing music.

• Internal Oscillator to Set Class D Frequency

(No External Components Required)

The gain of the amplifier is controlled by two gain

select pins. The gain selections are 20, 26, 32, and

• Single-Ended Analog Inputs

36 dB.

• Thermal and Short-Circuit Protection With

Auto Recovery

The patented start-up and shutdown sequences

minimize pop noise in the speakers without additional

• Space-Saving Surface Mount 24-Pin TSSOP

circuitry.

Package

• Advanced Power-Off Pop Reduction

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2DLP is a registered trademark of Texas Instruments.

3System Two, Audio Precision are trademarks of Audio Precision, Inc.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (30 pages)

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TPA3121D2 www.ti.
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TPA3121D2 SLOS537A – MAY 2008 – REVISED AUGUST 2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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TPA3121D2 www.ti.com SLOS537A – MAY 2008 – REVISED AUGUST 2010 ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) VCC Supply voltage AVCC, PVCC VI Logic input voltage SD, MUTE, GAIN0, GAIN1 VIN Analog input voltage RIN, LIN Continuous total power dissipation VALUE UNIT –0.3 to 30 V –0.3 to VCC + 0.3 V –0.
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TPA3121D2 SLOS537A – MAY 2008 – REVISED AUGUST 2010 www.ti.com DC CHARACTERISTICS TA = 25°C, VCC = 24 V, RL =8Ω (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX 7.5 50 mV 30 mA | VOS | Class-D output offset voltage (measured differentially in BTL mode as shown in Figure 36) VI = 0 V, AV = 36 dB V(BYPASS) Bypass output voltage No load ICC(q) Quiescent supply current SD = 2 V, MUTE = 0 V, no load 16 ICC(q) Quiescent supply current in mute mode MUTE = 0.
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TPA3121D2 www.ti.
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TPA3121D2 SLOS537A – MAY 2008 – REVISED AUGUST 2010 www.ti.com TYPICAL CHARACTERISTICS All tests are made at frequency = 1 kHz unless otherwise noted. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 10 VCC = 12 V RL = 4 Ω (SE) Gain = 20 dB THD+N − Total Harmonic Distortion + Noise − % THD+N − Total Harmonic Distortion + Noise − % 10 1 PO = 2.5 W PO = 1 W 0.1 0.01 0.001 20 PO = 0.5 W 100 1 PO = 2.5 W PO = 1 W 0.1 0.01 PO = 0.5 W 0.
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TPA3121D2 www.ti.com SLOS537A – MAY 2008 – REVISED AUGUST 2010 TYPICAL CHARACTERISTICS (continued) All tests are made at frequency = 1 kHz unless otherwise noted. TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 10 RL = 4 Ω (SE) Gain = 20 dB THD+N − Total Harmonic Distortion + Noise − % THD+N − Total Harmonic Distortion + Noise − % 10 1 0.1 VCC = 12 V 0.01 0.001 0.01 0.1 1 10 PO − Output Power − W 1 VCC = 12 V 0.1 0.01 VCC = 18 V 0.
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TPA3121D2 SLOS537A – MAY 2008 – REVISED AUGUST 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) All tests are made at frequency = 1 kHz unless otherwise noted. CROSSTALK vs FREQUENCY CROSSTALK vs FREQUENCY −20 −40 −50 Crosstalk − dB Crosstalk − dB −40 −30 −60 Right to Left −70 Left to Right −80 VCC = 24 V VO = 1 Vrms RL = 8 Ω (SE) PO = 0.
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TPA3121D2 www.ti.com SLOS537A – MAY 2008 – REVISED AUGUST 2010 TYPICAL CHARACTERISTICS (continued) All tests are made at frequency = 1 kHz unless otherwise noted. OUTPUT POWER vs SUPPLY VOLTAGE 10 OUTPUT POWER vs SUPPLY VOLTAGE 14 RL = 4 Ω (SE) Gain = 20 dB 9 RL = 8 Ω (SE) Gain = 20 dB 12 7 6 PO − Output Power − W PO − Output Power − W 8 THD+N = 10% 5 4 THD+N = 1% 3 10 8 THD+N = 10% 6 THD+N = 1% 4 2 2 1 0 0 10 11 12 13 14 10 15 VCC − Supply Voltage − V 12 14 16 G013 A.
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TPA3121D2 SLOS537A – MAY 2008 – REVISED AUGUST 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) All tests are made at frequency = 1 kHz unless otherwise noted. SUPPLY CURRENT vs OUTPUT POWER 1.5 SUPPLY CURRENT vs OUTPUT POWER 1.2 RL = 4 Ω (SE) Gain = 20 dB 1.0 ICC − Supply Current − A 1.2 ICC − Supply Current − A RL = 8 Ω (SE) Gain = 20 dB 0.9 VCC = 12 V 0.6 0.3 0.8 0.6 VCC = 24 V 0.4 VCC = 18 V 0.2 0.0 0.0 0 3 6 9 12 15 PO − Output Power − W 0 5 G017 Figure 17. A.
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TPA3121D2 www.ti.com SLOS537A – MAY 2008 – REVISED AUGUST 2010 TYPICAL CHARACTERISTICS (continued) All tests are made at frequency = 1 kHz unless otherwise noted. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 10 VCC = 24 V RL = 8 Ω (BTL) Gain = 20 dB THD+N − Total Harmonic Distortion + Noise − % THD+N − Total Harmonic Distortion + Noise − % 10 1 PO = 20 W PO = 1 W 0.1 0.01 PO = 5 W 0.001 20 100 1 VCC = 12 V VCC = 18 V 0.1 0.01 VCC = 24 V 0.
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TPA3121D2 SLOS537A – MAY 2008 – REVISED AUGUST 2010 www.ti.com APPLICATION INFORMATION CLASS-D OPERATION This section focuses on the class-D operation of the TPA3121D2. Traditional Class-D Modulation Scheme The TPA3121D2 operates in AD mode. There are two main configurations that may be used. For stereo operation, the TPA3121D2 should be configured in a single-ended (SE) half-bridge amplifier. For mono applications, TPA3121D2 may be used as a bridge-tied-load (BTL) amplifier.
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TPA3121D2 www.ti.com SLOS537A – MAY 2008 – REVISED AUGUST 2010 Several things can be done to relieve power-supply pumping. The lowest impact is to operate the two inputs out of phase 180° and reverse the speaker connections. Because most audio is highly correlated, this causes the supply pumping to be out of phase and not as severe. If this is not enough, the amount of bulk capacitance on the supply must be increased.
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TPA3121D2 SLOS537A – MAY 2008 – REVISED AUGUST 2010 www.ti.com INPUT CAPACITOR, Ci In the typical application, an input capacitor (Ci) is required to allow the amplifier to bias the input signal to the proper dc level for optimum operation. In this case, Ci and the input impedance of the amplifier (Zi) form a high-pass filter with the corner frequency determined in Equation 2.
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TPA3121D2 www.ti.com SLOS537A – MAY 2008 – REVISED AUGUST 2010 Table 4. Recommended Filter Output Components Output Configuration Speaker Impedance (Ω) Filter Inductor (mH) Filter Capacitor (nF) 4 22 680 8 33 220 8 22 680 Single Ended (SE) Bridge Tied Load (BTL) LOUT / ROUT LOUT Lfilter Lfilter Cfilter Cfilter ROUT Lfilter Cfilter Figure 27. BTL Filter Configuration Figure 28.
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TPA3121D2 SLOS537A – MAY 2008 – REVISED AUGUST 2010 www.ti.com 0 0 VCC = 24 V VO(ripple) = 0.2 VPP RL = 8 Ω (SE) Gain = 20 dB −20 VCC = 24 V VO(ripple) = 0.2 VPP RL = 8 Ω (SE) Gain = 20 dB −10 Power Supply Rejection Ratio − dB Power Supply Rejection Ratio − dB −10 −30 −40 −50 −60 −70 −80 −90 −20 −30 −40 −50 −60 −70 −80 −90 −100 20 100 1k −100 20 10k 20k 100 f − Frequency − Hz 1k 10k 20k f − Frequency − Hz G026 G027 Figure 29. PSRR Without AVCC Filter Figure 30.
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TPA3121D2 www.ti.com SLOS537A – MAY 2008 – REVISED AUGUST 2010 VCLAMP Capacitor To ensure that the maximum gate-to-source voltage for the NMOS output transistors is not exceeded, one internal regulator clamps the gate voltage. One 1-mF capacitor must be connected from VCLAMP (pin 11) to ground and must be rated for at least 16 V. The voltages at the VCLAMP terminal may vary with VCC and may not be used for powering any other circuitry.
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TPA3121D2 SLOS537A – MAY 2008 – REVISED AUGUST 2010 www.ti.com THERMAL PROTECTION Thermal protection on the TPA3121D2 prevents damage to the device when the internal die temperature exceeds 150°C. There is a ±15°C tolerance on this trip point from device to device. Once the die temperature exceeds the thermal set point, the device enters into the shutdown state and the outputs are disabled. This is not a latched fault. The thermal fault is cleared once the temperature of the die is reduced by 30°C.
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TPA3121D2 www.ti.com SLOS537A – MAY 2008 – REVISED AUGUST 2010 VCC 470 mF 33 µH 470 mF +LOUT 1.0 mF 470 mF 1 2 3 4 5 6 7 8 9 10 11 12 Right In 1.0 mF 1.0 mF PVCCL PGNDL SD PGNDL PVCCL LOUT MUTE BSL LIN TP TPA3121D2 AVCC RIN AVCC BYPASS GAIN0 AGND GAIN1 AGND BSR PVCCR ROUT VCLAMP PGNDR PVCCR PGNDR THERMAL 1.0 mF Left In 24 23 22 21 20 19 18 17 16 15 14 13 0.22 µF 0.22 mF –LOUT VCC –ROUT 0.22 mF 0.22 µF 25 Shutdown Control Mute Control 33 µH +ROUT 470 mF 1.0 mF 1.0 mF 0.
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TPA3121D2 SLOS537A – MAY 2008 – REVISED AUGUST 2010 www.ti.com BASIC MEASUREMENT SYSTEM This section focuses on methods that use the basic equipment listed below: • Audio analyzer or spectrum analyzer • Digital multi meter (DMM) • Oscilloscope • Twisted-pair wires • Signal generator • Power resistor(s) • Linear regulated power supply • Filter components • EVM or other complete audio circuit Figure 34 shows the block diagrams of basic measurement systems for class-AB and class-D amplifiers.
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TPA3121D2 www.ti.com SLOS537A – MAY 2008 – REVISED AUGUST 2010 Power Supply Signal Generator APA RL Analyzer 20 Hz - 20 kHz (a) Basic Class-AB Power Supply Lfilt Signal Generator Class-D APA Cfilt RL Analyzer 20 Hz - 20 kHz (b) Traditional Class-D Figure 34.
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TPA3121D2 SLOS537A – MAY 2008 – REVISED AUGUST 2010 www.ti.com SE Input and SE Output (TPA3121D2 Stereo Configuration) The SE input and output configuration is used with class-AB amplifiers. A block diagram of a fully SE measurement circuit is shown in Figure 35. SE inputs normally have one input pin per channel. In some cases, two pins are present; one is the signal and the other is ground.
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TPA3121D2 www.ti.com SLOS537A – MAY 2008 – REVISED AUGUST 2010 DIFFERENTIAL INPUT AND BTL OUTPUT (TPA3121D2 Mono Configuration) Many of the class-D APAs and many class-AB APAs have differential inputs and bridge-tied-load (BTL) outputs. Differential inputs have two input pins per channel and amplify the difference in voltage between the pins. Differential inputs reduce the common-mode noise and distortion of the input circuit. BTL is a term commonly used in audio to describe differential outputs.
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TPA3121D2 SLOS537A – MAY 2008 – REVISED AUGUST 2010 www.ti.com REVISION HISTORY Changes from Original (May 2008) to Revision A • 24 Page Replaced the Dissipations Ratings table with the Thermal Information table ......................................................................
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPA3121D2PWPR Package Package Pins Type Drawing SPQ HTSSOP 2000 PWP 24 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 330.0 16.4 Pack Materials-Page 1 6.95 B0 (mm) K0 (mm) P1 (mm) 8.3 1.6 8.0 W Pin1 (mm) Quadrant 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPA3121D2PWPR HTSSOP PWP 24 2000 367.0 367.0 38.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.