Datasheet

IO3
GND
V
CC
IO4
1
2
6
3
5
4
DBV/DCK PACKAGE
(TOP VIEW)
IO1
IO2
IO3
GND
V
CC
IO4
1
2
6
3
5
4
DRL PACKAGE
(TOP VIEW)
IO2
IO1
QFN PACKAGE
(TOP VIEW)
IO1
IO2
GND
V
CC
IO4
IO3
GND
1
2
3
4
5
6
DPK PACKAGE
(TOP VIEW)
IO1
IO2
GND
V
CC
IO4
IO3
1
2
3
4
5
6
IO3
IO2
V
CC
IO4
1
2
6
3
5
4
DCK2 PACKAGE
(TOP VIEW)
IO1
GND
PREVIEW
TPD4E001
SLLS682K –JULY 2006–REVISED JANUARY 2015 www.ti.com
5 Pin Configuration and Functions
Pin Functions
PIN
DESCRIPTION
NAME DRS/DRL/DPK NO. DBV/DCK NO.
IOx 1, 2, 4, 5 1, 3, 4, 6 ESD-protected channel
GND 3 2 Ground
V
CC
6 5 Power-supply input. Bypass V
CC
to GND with a 0.1-μF ceramic capacitor.
Exposed Thermal Pad
N/A — Exposed thermal pad. Connect to GND or leave floating.
(DRS package only)
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