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TPIC6B273

POWER LOGIC OCTAL D-TYPE LATCH

SLIS031 – APRIL 1994 – REVISED JULY 1995

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Low r

DS(on)

...5 Ω Typical

Avalanche Energy ...30 mJ

Eight Power DMOS-Transistor Outputs of

150-mA Continuous Current

500-mA Typical Current-Limiting Capability

Output Clamp Voltage . . . 50 V

Low Power Consumption

description

The TPIC6B273 is a monolithic, high-voltage,

medium-current, power logic octal D-type latch

with DMOS-transistor outputs designed for use in

systems that require relatively high load power.

The device contains a built-in voltage clamp on

the outputs for inductive transient protection.

Power driver applications include relays, sole-

noids, and other medium-current or high-voltage

loads.

The TPIC6B273 contains eight positive-edge-

triggered D-type flip-flops with a direct clear input.

Each flip-flop features an open-drain power

DMOS-transistor output.

When clear (CLR

) is high, information at the D

inputs meeting the setup time requirements is

transferred to the DRAIN outputs on the positive-

going edge of the clock (CLK) pulse. Clock

triggering occurs at a particular voltage level and

is not directly related to the transition time of the

positive-going pulse. When the clock input (CLK)

is at either the high or low level, the D input signal

has no effect at the output. An asynchronous CLR

is provided to turn all eight DMOS-transistor

outputs off. When data is low for a given output,

the DMOS-transistor output is off. When data is

high, the DMOS-transistor output has sink-current

capability.

Outputs are low-side, open-drain DMOS

transistors with output ratings of 50 V and 150-mA

continuous sink-current capability. Each output

provides a 500-mA typical current limit at

= 25°C. The current limit decreases as the

junction temperature increases for additional

device protection.

The TPIC6B273 is characterized for operation over the operating case temperature range of –40°C to 125°C.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

CLR

DRAIN1

DRAIN2

DRAIN3

DRAIN4

GND

DRAIN8

DRAIN7

DRAIN6

DRAIN5

CLK

DW OR N PACKAGE

(TOP VIEW)

logic symbol

†

CLK

DRAIN1

DRAIN2

DRAIN3

DRAIN4

DRAIN5

DRAIN6

DRAIN7

DRAIN8

CLR

†

This symbol is in accordance with ANSI/IEEE Standard 91-1984

and IEC Publication 617-12.

INPUTS

OUTPUT

FUNCTION TABLE

(each channel)

CLK D

↑

Latched

CLR

DRAIN

H = high level, L = low level, X = irrelevant

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Summary of content (15 pages)

PAGE 1
TPIC6B273 POWER LOGIC OCTAL D-TYPE LATCH SLIS031 – APRIL 1994 – REVISED JULY 1995 D D D D D D Low rDS(on) . . . 5 Ω Typical Avalanche Energy . . . 30 mJ Eight Power DMOS-Transistor Outputs of 150-mA Continuous Current 500-mA Typical Current-Limiting Capability Output Clamp Voltage . . .
PAGE 2
TPIC6B273 POWER LOGIC OCTAL D-TYPE LATCH SLIS031 – APRIL 1994 – REVISED JULY 1995 logic diagram (positive logic) 4 CLR D1 CLK 1 2 11 DRAIN1 CLR 1D C1 5 DRAIN2 CLR D2 3 1D C1 6 DRAIN3 CLR D3 8 1D C1 7 DRAIN4 CLR D4 9 1D C1 14 DRAIN5 CLR D5 12 1D C1 15 DRAIN6 CLR D6 13 1D C1 16 DRAIN7 CLR D7 18 1D C1 17 DRAIN8 CLR D8 19 1D 10 C1 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 GND
PAGE 3
TPIC6B273 POWER LOGIC OCTAL D-TYPE LATCH SLIS031 – APRIL 1994 – REVISED JULY 1995 schematic of inputs and outputs EQUIVALENT OF EACH INPUT TYPICAL OF ALL DRAIN OUTPUTS VCC DRAIN 50 V Input 25 V 20 V 12 V GND GND absolute maximum ratings over recommended operating case temperature range (unless otherwise noted)† Logic supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Logic input voltage range, VI . . . .
PAGE 4
TPIC6B273 POWER LOGIC OCTAL D-TYPE LATCH SLIS031 – APRIL 1994 – REVISED JULY 1995 recommended operating conditions Logic supply voltage, VCC High-level input voltage, VIH MIN MAX 4.5 5.5 UNIT V 0.85 VCC Low-level input voltage, VIL Pulsed drain output current, TC = 25°C, VCC = 5 V (see Notes 3 and 5) V 0.
PAGE 5
TPIC6B273 POWER LOGIC OCTAL D-TYPE LATCH SLIS031 – APRIL 1994 – REVISED JULY 1995 thermal resistance PARAMETER RθJA TEST CONDITIONS DW package resistance junction-to-ambient junction to ambient Thermal resistance, MIN MAX 90 All 8 outputs with equal power N package 95 UNIT °C/W PARAMETER MEASUREMENT INFORMATION 24 V 5V 20 VCC 11 Word Generator (see Note A) 5V ID CLK 0V 235 Ω DUT CLK DRAIN 4 –7, 14 –17 5V D Output 0V D 1 5V CL = 30 pF (see Note B) CLR CLR 0V GND 24 V 10 Output 0
PAGE 6
TPIC6B273 POWER LOGIC OCTAL D-TYPE LATCH SLIS031 – APRIL 1994 – REVISED JULY 1995 PARAMETER MEASUREMENT INFORMATION TP K DRAIN 0.1 A 2500 µF 250 V Circuit Under Test di/dt = 20 A/µs + 25 V L = 1 mH IF (see Note A) IF – 0 TP A 25% of IRM t2 t1 t3 Driver IRM RG VGG (see Note B) ta 50 Ω trr CURRENT WAVEFORM TEST CIRCUIT NOTES: A. The DRAIN terminal under test is connected to the TP K test point. All other terminals are connected together and connected to the TP A test point. B.
PAGE 7
TPIC6B273 POWER LOGIC OCTAL D-TYPE LATCH SLIS031 – APRIL 1994 – REVISED JULY 1995 TYPICAL CHARACTERISTICS PEAK AVALANCHE CURRENT vs TIME DURATION OF AVALANCHE DRAIN-TO-SOURCE ON-STATE RESISTANCE vs DRAIN CURRENT r DS(on) –Drain-to-Source On-State Resistance – Ω 10 IAS – Peak Avalanche Current – A TC = 25°C 4 2 1 0.4 0.2 0.1 0.1 0.2 0.
PAGE 8
TPIC6B273 POWER LOGIC OCTAL D-TYPE LATCH SLIS031 – APRIL 1994 – REVISED JULY 1995 THERMAL INFORMATION MAXIMUM PEAK DRAIN CURRENT OF EACH OUTPUT vs NUMBER OF OUTPUTS CONDUCTING SIMULTANEOUSLY I D – Maximum Continuous Drain Current of Each Output – A 0.45 VCC = 5 V 0.4 0.35 0.3 0.25 TC = 25°C 0.2 0.15 TC = 100°C 0.1 TC = 125°C 0.
PAGE 9
PACKAGE OPTION ADDENDUM www.ti.
PAGE 10
PACKAGE MATERIALS INFORMATION www.ti.com 4-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPIC6B273DWR Package Package Pins Type Drawing SOIC DW 20 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2000 330.0 24.4 Pack Materials-Page 1 10.8 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 13.3 2.7 12.0 24.
PAGE 11
PACKAGE MATERIALS INFORMATION www.ti.com 4-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPIC6B273DWR SOIC DW 20 2000 367.0 367.0 45.
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