Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Shift register Shift register Open drain SOIC 20

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

    

SLIS032A − JULY 1995 − REVISED MAY 2005

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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

D Low r

DS(on)

...5 Ω Typical

D Avalanche Energy . . . 30 mJ

D Eight Power DMOS-Transistor Outputs of

150-mA Continuous Current

D 500-mA Typical Current-Limiting Capability

D Output Clamp Voltage ...50 V

D Devices Are Cascadable

D Low Power Consumption

description

The TPIC6B595 is a monolithic, high-voltage,

medium-current power 8-bit shift register

designed for use in systems that require relatively

high load power. The device contains a built-in

voltage clamp on the outputs for inductive

transient protection. Power driver applications

include relays, solenoids, and other medium-

current or high-voltage loads.

This device contains an 8-bit serial-in, parallel-out

shift register that feeds an 8-bit D-type storage

register. Data transfers through both the shift and

storage registers on the rising edge of the

shift-register clock (SRCK) and the register clock

(RCK), respectively. The storage register

transfers data to the output buffer when shift-

register clear (SRCLR

) is high. When SRCLR is

low, the input shift register is cleared. When output

enable (G

) is held high, all data in the output

buffers is held low and all drain outputs are off.

When G

is held low, data from the storage register

is transparent to the output buffers. When data in

the output buffers is low, the DMOS-transistor

outputs are off. When data is high, the DMOS-

transistor outputs have sink-current capability.

The serial output (SER OUT) allows for cascading

of the data from the shift register to additional

devices.

Outputs are low-side, open-drain DMOS transistors with output ratings of 50 V and 150-mA continuous sink-

current capability. Each output provides a 500-mA typical current limit at T

C

= 25°C. The current limit decreases

as the junction temperature increases for additional device protection.

The TPIC6B595 is characterized for operation over the operating case temperature range of −40°C to 125°C.

Copyright  1995 − 2005, Texas Instruments Incorporated

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NC

V

CC

SER IN

DRAIN0

DRAIN1

DRAIN2

DRAIN3

SRCLR

G

GND

NC

GND

SER OUT

DRAIN7

DRAIN6

DRAIN5

DRAIN4

SRCK

RCK

GND

DW OR N PACKAGE

(TOP VIEW)

logic symbol

†

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SRG8

†

This symbol is in accordance with ANSI/IEEE Std 91-1984

and IEC Publication 617-12.

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EN3

C2

R

C1

1D

G

RCK

SRCLR

SRCK

SER IN

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DRAIN0

DRAIN1

DRAIN2

DRAIN3

DRAIN4

DRAIN5

DRAIN6

DRAIN7

SER OUT

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NC − No internal connection

Summary of content (15 pages)

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SLIS032A − JULY 1995 − REVISED MAY 2005 D Low rDS(on) . . . 5 Ω Typical D Avalanche Energy . . . 30 mJ D Eight Power DMOS-Transistor Outputs of D D D D DW OR N PACKAGE (TOP VIEW) NC VCC SER IN DRAIN0 DRAIN1 DRAIN2 DRAIN3 SRCLR G GND 150-mA Continuous Current 500-mA Typical Current-Limiting Capability Output Clamp Voltage . . .
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SLIS032A − JULY 1995 − REVISED MAY 2005 logic diagram (positive logic) G RCK SRCLR 9 12 4 D SRCK 13 D C2 C1 CLR SER IN 5 3 D DRAIN1 D C2 C1 CLR 6 D DRAIN2 D C2 C1 7 CLR D DRAIN3 D C2 C1 CLR 14 DRAIN4 D C2 D C1 CLR 15 D DRAIN5 D C2 C1 16 CLR D DRAIN6 D C2 C1 17 CLR D DRAIN7 D C2 C1 CLR 10, 11, 19 18 2 DRAIN0 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SER OUT GND
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SLIS032A − JULY 1995 − REVISED MAY 2005 schematic of inputs and outputs EQUIVALENT OF EACH INPUT TYPICAL OF ALL DRAIN OUTPUTS VCC DRAIN 50 V Input 25 V 20 V 12 V GND GND absolute maximum ratings over recommended operating case temperature range (unless otherwise noted)† Logic supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Logic input voltage range, VI . . . . . . .
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SLIS032A − JULY 1995 − REVISED MAY 2005 recommended operating conditions Logic supply voltage, VCC High-level input voltage, VIH MIN MAX UNIT 4.5 5.5 V 0.85 VCC Low-level input voltage, VIL Pulsed drain output current, TC = 25°C, VCC = 5 V (see Notes 3 and 5) V 0.
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SLIS032A − JULY 1995 − REVISED MAY 2005 switching characteristics, VCC = 5 V, TC = 25°C PARAMETER TEST CONDITIONS tPLH tPHL Propagation delay time, low-to-high-level output from G tr tf Rise time, drain output ta trr Reverse-recovery-current rise time Propagation delay time, high-to-low-level output from G MIN TYP CL = 30 pF, ID = 100 mA, See Figures 1, 2, and 9 Fall time, drain output UNIT 150 ns 90 ns 200 ns 200 ns 100 IF = 100 mA, di/dt = 20 A/µ
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SLIS032A − JULY 1995 − REVISED MAY 2005 PARAMETER MEASUREMENT INFORMATION 5V G 5V 50% 50% 0V 24 V tPLH tPHL 2 8 13 Word Generator (see Note A) 3 12 9 V SRCLR CC SRCK Output ID RL = 235 Ω 4 −7, 14 −17 DUT 24 V 90% 10% 10% tr Output 0.5 V tf SWITCHING TIMES DRAIN SER IN CL = 30 pF (see Note B) RCK G 90% GND 5V 50% SRCK 0V tsu 10, 11, 19 th 5V TEST CIRCUIT SER IN 50% 50% 0V tw INPUT SETUP AND HOLD WAVEFORMS NOTES: A.
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SLIS032A − JULY 1995 − REVISED MAY 2005 PARAMETER MEASUREMENT INFORMATION 5V 15 V tw 2 8 V SRCLR CC 10.5 Ω 3 Word Generator (see Note A) 12 9 DUT 4 −7, 14 −17 DRAIN RCK See Note B 0V IAS = 0.5 A 200 mH SER IN G 5V Input ID 13 SRCK tav ID VDS GND V(BR)DSX = 50 V MIN VDS 10, 11, 19 VOLTAGE AND CURRENT WAVEFORMS SINGLE-PULSE AVALANCHE ENERGY TEST CIRCUIT NOTES: A.
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SLIS032A − JULY 1995 − REVISED MAY 2005 TYPICAL CHARACTERISTICS 18 VCC = 5 V See Note A 16 14 TC = 125°C 12 10 8 6 TC = 25°C 4 TC = − 40°C 2 0 0 100 200 300 400 500 ID − Drain Current − mA 600 700 STATIC DRAIN-TO-SOURCE ON-STATE RESISTANCE vs LOGIC SUPPLY VOLTAGE r DS(on) − Static Drain-to-Source On-State Resistance − Ω r DS(on) − Drain-to-Source On-State Resistance − Ω DRAIN-TO-SOURCE ON-STATE RESISTANCE vs DRAIN CURRENT 8 ID = 100 mA See Note A 7 TC =
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SLIS032A − JULY 1995 − REVISED MAY 2005 THERMAL INFORMATION MAXIMUM PEAK DRAIN CURRENT OF EACH OUTPUT vs NUMBER OF OUTPUTS CONDUCTING SIMULTANEOUSLY I D − Maximum Continuous Drain Current of Each Output − A 0.45 VCC = 5 V 0.4 0.35 0.3 0.25 TC = 25°C 0.2 0.15 TC = 100°C 0.1 TC = 125°C 0.05 0 1 2 3 4 5 6 7 8 I D − Maximum Peak Drain Current of Each Output − A MAXIMUM CONTINUOUS DRAIN CURRENT OF EACH OUTPUT vs NUMBER OF OUTPUTS CONDUCTING SIMULTANEOUSLY 0.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 4-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPIC6B595DWR Package Package Pins Type Drawing SOIC DW 20 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2000 330.0 24.4 Pack Materials-Page 1 10.8 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 13.3 2.7 12.0 24.
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PACKAGE MATERIALS INFORMATION www.ti.com 4-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPIC6B595DWR SOIC DW 20 2000 367.0 367.0 45.
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