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TPS2042, TPS2052

DUAL POWER-DISTRIBUTION SWITCHES

SLVS173A – AUGUST 1998 – REVISED APRIL 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

135-mΩ -Maximum (5-V Input) High-Side

MOSFET Switch

500 mA Continuous Current per Channel

Short-Circuit and Thermal Protection With

Overcurrent Logic Output

Operating Range . . . 2.7-V to 5.5-V

Logic-Level Enable Input

2.5-ms Typical Rise Time

Undervoltage Lockout

10 µA Maximum Standby Supply Current

Bidirectional Switch

Available in 8-pin SOIC and PDIP Packages

Ambient Temperature Range, –40°C to 85°C

2-kV Human-Body-Model, 200-V

Machine-Model ESD Protection

UL Listed – File No. E169910

description

The TPS2042 and TPS2052 dual power distribution switches are intended for applications where heavy

capacitive loads and short circuits are likely to be encountered. The TPS2042 and the TPS2052 incorporate

in single packages two 135-mΩ N-channel MOSFET high-side power switches for power distribution systems

that require multiple power switches. Each switch is controlled by a logic enable that is compatible with 5-V logic

and 3-V logic. Gate drive is provided by an internal charge pump designed to control the power-switch rise times

and fall times to minimize current surges during switching. The charge pump requires no external components

and allows operation from supplies as low as 2.7 V.

When the output load exceeds the current-limit threshold or a short is present, the TPS2042 and TPS2052 limit

the output current to a safe level by switching into a constant-current mode, pulling the overcurrent (OCx

) logic

output low. When continuous heavy overloads and short circuits increase the power dissipation in the switch

causing the junction temperature to rise, a thermal protection circuit shuts off the switch to prevent damage.

Recovery from a thermal shutdown is automatic once the device has cooled sufficiently. Internal circuitry

ensures the switch remains off until valid input voltage is present.

The TPS2042 and TPS2052 are designed to limit at 0.9-A load. These power distribution switches are available

in 8-pin small-outline integrated circuit (SOIC) and 8-pin plastic dual-in-line packages (PDIP) and operate over

an ambient temperature range of –40°C to 85°C.

AVAILABLE OPTIONS

RECOMMENDED

MAXIMUM CONTINUOUS

TYPICAL

SHORT CIRCUIT CURRENT

PACKAGED DEVICES

ENABLE

MAXIMUM

CONTINUOUS

LOAD CURRENT

(A)

SHORT

CIRCUIT

CURRENT

LIMIT AT 25°C

(A)

SOIC

(D)

†

PDIP

(P)

–40°C to 85°C Active low 0.5 0.9 TPS2042D TPS2042P

–40°C to 85°C Active high 0.5 0.9 TPS2052D TPS2052P

†

The D package is available taped and reeled. Add an R suffix to device type (e.g., TPS2042DR)

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

GND

EN1

EN2

OC1

OUT1

OUT2

OC2

TPS2042

D OR P PACKAGE

(TOP VIEW)

GND

EN1

EN2

OC1

OUT1

OUT2

OC2

TPS2052

D OR P PACKAGE

(TOP VIEW)

Summary of content (26 pages)

PAGE 1
TPS2042, TPS2052 DUAL POWER-DISTRIBUTION SWITCHES SLVS173A – AUGUST 1998 – REVISED APRIL 1999 D D D D D D D D D D D D D 135-mΩ -Maximum (5-V Input) High-Side MOSFET Switch 500 mA Continuous Current per Channel Short-Circuit and Thermal Protection With Overcurrent Logic Output Operating Range . . . 2.7-V to 5.5-V Logic-Level Enable Input 2.
PAGE 2
TPS2042, TPS2052 DUAL POWER-DISTRIBUTION SWITCHES SLVS173A – AUGUST 1998 – REVISED APRIL 1999 TPS2042 functional block diagram OC1 Thermal Sense GND EN1 Current Limit Driver Charge Pump † CS OUT1 UVLO Power Switch † IN CS OUT2 Charge Pump Driver † Current sense Current Limit OC2 EN2 Thermal Sense Terminal Functions TERMINAL NO. NAME I/O D OR P DESCRIPTION TPS2042 TPS2052 EN1 3 – I Enable input. Logic low turns on power switch, IN-OUT1. EN2 4 – I Enable input.
PAGE 3
TPS2042, TPS2052 DUAL POWER-DISTRIBUTION SWITCHES SLVS173A – AUGUST 1998 – REVISED APRIL 1999 detailed description power switch The power switch is an N-channel MOSFET with a maximum on-state resistance of 135 mΩ (VI(IN) = 5 V). Configured as a high-side switch, the power switch prevents current flow from OUTx to IN and IN to OUTx when disabled. The power switch supplies a minimum of 500 mA per switch.
PAGE 4
TPS2042, TPS2052 DUAL POWER-DISTRIBUTION SWITCHES SLVS173A – AUGUST 1998 – REVISED APRIL 1999 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Input voltage range, VI(IN) (see Note1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6 V Output voltage range, VO(OUTx) (see Note1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VI(IN) + 0.
PAGE 5
TPS2042, TPS2052 DUAL POWER-DISTRIBUTION SWITCHES SLVS173A – AUGUST 1998 – REVISED APRIL 1999 electrical characteristics over recommended operating junction temperature range, VI(IN)= 5.5 V, IO = rated current, VI(ENx) = 0 V, VI(ENx) = Hi (unless otherwise noted) power switch TEST CONDITIONS† PARAMETER Static drain-source on-state resistance, 5-V operation rDS(on) DS( ) Static drain-source on-state resistance, 3.
PAGE 6
TPS2042, TPS2052 DUAL POWER-DISTRIBUTION SWITCHES SLVS173A – AUGUST 1998 – REVISED APRIL 1999 electrical characteristics over recommended operating junction temperature range, VI(IN)= 5.
PAGE 7
TPS2042, TPS2052 DUAL POWER-DISTRIBUTION SWITCHES SLVS173A – AUGUST 1998 – REVISED APRIL 1999 PARAMETER MEASUREMENT INFORMATION OUTx RL tf tr CL VO(OUTx) 90% 10% 90% 10% TEST CIRCUIT 50% VI(ENx) 50% toff ton 50% toff ton 90% VO(OUTx) 50% VI(ENx) 90% VO(OUTx) 10% 10% VOLTAGE WAVEFORMS Figure 1. Test Circuit and Voltage Waveforms VI(EN) (5 V/div) VI(EN) (5 V/div) VI(IN) = 5 V TA = 25°C CL = 0.1 µF VO(OUT) (2 V/div) 0 1 2 3 4 5 6 7 8 9 VI(IN) = 5 V TA = 25°C CL = 0.
PAGE 8
TPS2042, TPS2052 DUAL POWER-DISTRIBUTION SWITCHES SLVS173A – AUGUST 1998 – REVISED APRIL 1999 PARAMETER MEASUREMENT INFORMATION VI(EN) (5 V/div) VI(EN) (5 V/div) VI(IN) = 5 V TA = 25°C CL = 1 µF RL = 10 Ω VO(OUT) (2 V/div) 0 1 2 3 4 5 6 7 8 VI(IN) = 5 V TA = 25°C CL = 1 µF RL = 10 Ω VO(OUT) (2 V/div) 9 10 0 2 4 6 t – Time – ms 8 10 12 14 16 18 20 t – Time – ms Figure 4. Turnon Delay and Rise Time with 1-µF Load Figure 5.
PAGE 9
TPS2042, TPS2052 DUAL POWER-DISTRIBUTION SWITCHES SLVS173A – AUGUST 1998 – REVISED APRIL 1999 PARAMETER MEASUREMENT INFORMATION VI(IN) = 5 V TA = 25°C RL = 10 Ω VI(EN) (5 V/div) VO(OC) (5 V/div) 470 µF 220 µF 100 µF VI(IN) = 5 V Load Ramp,1A/100 ms TA = 25°C IO(OUT) (0.5 A/div) IO(OUT) (o.2 A/div) 0 2 4 6 8 10 12 14 16 0 18 20 20 40 60 80 100 120 140 160 180 200 t – Time – ms t – Time – ms Figure 8. Inrush Current with 100-µF, 220-µF and 470-µF Load Capacitance Figure 9.
PAGE 10
TPS2042, TPS2052 DUAL POWER-DISTRIBUTION SWITCHES SLVS173A – AUGUST 1998 – REVISED APRIL 1999 TYPICAL CHARACTERISTICS TURNON DELAY vs INPUT VOLTAGE TURNOFF DELAY vs INPUT VOLTAGE 6 17 CL = 1 µF RL = 10 Ω TA = 25°C 5.5 16 CL = 1 µF RL = 10 Ω TA = 25°C Turn-Off Delay – ms Turn-On Delay – ms 15 5 4.5 4 14 13 12 11 3.5 3 2.5 10 3 3.5 4 4.5 5 5.5 3 2.5 6 3 VI – Input Voltage – V 5 3.5 4 4.5 VI – Input Voltage – V Figure 12 3.3 f t – Fall Time – ms r t – Rise Time – ms 0.9 3.
PAGE 11
TPS2042, TPS2052 DUAL POWER-DISTRIBUTION SWITCHES SLVS173A – AUGUST 1998 – REVISED APRIL 1999 TYPICAL CHARACTERISTICS SUPPLY CURRENT, OUTPUT ENABLED vs JUNCTION TEMPERATURE SUPPLY CURRENT, OUTPUT DISABLED vs JUNCTION TEMPERATURE 1000 I I(IN) – Supply Current, Output Disabled – nA I I(IN) – Supply Current, Output Enabled – µ A 100 VI(IN) = 5.5 V VI(IN) = 5 V 90 VI(IN) = 4 V 80 VI(IN) = 2.7 V 70 VI(IN) = 3.
PAGE 12
TPS2042, TPS2052 DUAL POWER-DISTRIBUTION SWITCHES SLVS173A – AUGUST 1998 – REVISED APRIL 1999 STATIC DRAIN-SOURCE ON-STATE RESISTANCE vs JUNCTION TEMPERATURE 175 IO = 0.5 A VI(IN) = 2.7 V 150 VI(IN) = 3.3 V 125 100 VI(IN) = 4.5 V VI(IN) = 5 V 75 50 –50 –25 0 25 50 100 75 125 150 r DS(on) – Static Drain-Source On-State Resistance – mΩ r DS(on) – Static Drain-Source On-State Resistance – m Ω TYPICAL CHARACTERISTICS STATIC DRAIN-SOURCE ON-STATE RESISTANCE vs INPUT VOLTAGE 175 IO = 0.
PAGE 13
TPS2042, TPS2052 DUAL POWER-DISTRIBUTION SWITCHES SLVS173A – AUGUST 1998 – REVISED APRIL 1999 TYPICAL CHARACTERISTICS THRESHOLD TRIP CURRENT vs INPUT VOLTAGE SHORT CIRCUIT OUTPUT CURRENT vs JUNCTION TEMPERATURE 1.2 0.95 I OS – Short-circuit Output Current – A Threshold Trip Current – A TA = 25°C Load Ramp = 1 A/10 ms 1.175 1.15 1.125 1.1 2.5 3 4.5 5 3.5 4 VI – Input Voltage – V 5.5 VI(IN) = 5 V 0.9 VI(IN) = 4 V VI(IN) = 2.7 V 0.85 0.
PAGE 14
TPS2042, TPS2052 DUAL POWER-DISTRIBUTION SWITCHES SLVS173A – AUGUST 1998 – REVISED APRIL 1999 TYPICAL CHARACTERISTICS OVERCURRENT RESPONSE TIME (OCx) vs PEAK CURRENT 8 VI(IN) = 5 V TA = 25°C Response Time – µ s 6 4 2 0 0 2.5 5 7.5 10 12.5 Peak Current – A Figure 28 APPLICATION INFORMATION TPS2042 Power Supply 2.7 V to 5.5 V 2 IN 0.1 µF OUT1 8 3 5 4 7 Load 0.1 µF 22 µF 0.1 µF 22 µF OC1 EN1 6 Load OUT2 OC2 EN2 GND 1 Figure 29. Typical Application power-supply considerations A 0.
PAGE 15
TPS2042, TPS2052 DUAL POWER-DISTRIBUTION SWITCHES SLVS173A – AUGUST 1998 – REVISED APRIL 1999 APPLICATION INFORMATION overcurrent A sense FET checks for overcurrent conditions. Unlike current-sense resistors, sense FETs do not increase the series resistance of the current path. When an overcurrent condition is detected, the device maintains a constant output current and reduces the output voltage accordingly. Complete shutdown occurs only if the fault is present long enough to activate thermal limiting.
PAGE 16
TPS2042, TPS2052 DUAL POWER-DISTRIBUTION SWITCHES SLVS173A – AUGUST 1998 – REVISED APRIL 1999 APPLICATION INFORMATION power dissipation and junction temperature The low on-resistance on the n-channel MOSFET allows small surface-mount packages, such as SOIC, to pass large currents. The thermal resistances of these packages are high compared to that of power packages; it is good design practice to check power dissipation and junction temperature.
PAGE 17
TPS2042, TPS2052 DUAL POWER-DISTRIBUTION SWITCHES SLVS173A – AUGUST 1998 – REVISED APRIL 1999 APPLICATION INFORMATION universal serial bus (USB) applications The universal serial bus (USB) interface is a 12-Mb/s, or 1.5-Mb/s, multiplexed serial bus designed for low-to-medium bandwidth PC peripherals (e.g., keyboards, printers, scanners, and mice). The four-wire USB interface is conceived for dynamic attach-detach (hot plug-unplug) of peripherals.
PAGE 18
TPS2042, TPS2052 DUAL POWER-DISTRIBUTION SWITCHES SLVS173A – AUGUST 1998 – REVISED APRIL 1999 APPLICATION INFORMATION host/self-powered and bus-powered hubs (continued) Bus-powered hubs obtain all power from upstream ports and often contain an embedded function. The hubs are required to power up with less than one unit load. The BPH usually has one embedded function, and power is always available to the controller of the hub.
PAGE 19
TPS2042, TPS2052 DUAL POWER-DISTRIBUTION SWITCHES SLVS173A – AUGUST 1998 – REVISED APRIL 1999 APPLICATION INFORMATION USB power-distribution requirements USB can be implemented in several ways, and, regardless of the type of USB device being developed, several power-distribution features must be implemented.
PAGE 20
TPS2042, TPS2052 DUAL POWER-DISTRIBUTION SWITCHES SLVS173A – AUGUST 1998 – REVISED APRIL 1999 APPLICATION INFORMATION TUSB2040 Hub Controller Upstream Port SN75240 BUSPWR A C B D GANGED D+ D– DP0 DP1 DM0 DM1 Tie to TPS2041 EN Input D+ A C B D GND OC 5V IN DM2 5 V Power Supply EN GND 5V 33 µF† DM3 A C B D 1 µF TPS76333 4.7 µF SN75240 D+ D– Ferrite Beads GND DP4 IN 3.3 V 4.7 µF VCC DM4 5V TPS2042 GND GND 48-MHz Crystal D– DP3 OUT 0.
PAGE 21
TPS2042, TPS2052 DUAL POWER-DISTRIBUTION SWITCHES SLVS173A – AUGUST 1998 – REVISED APRIL 1999 APPLICATION INFORMATION generic hot-plug applications (see Figure 34) In many applications it may be necessary to remove modules or pc boards while the main unit is still operating. These are considered hot-plug applications. Such implementations require the control of current surges seen by the main power supply and the card being inserted.
PAGE 22
PACKAGE OPTION ADDENDUM www.ti.
PAGE 23
PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device.
PAGE 24
PACKAGE MATERIALS INFORMATION www.ti.com 19-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS2042DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TPS2052DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.
PAGE 25
PACKAGE MATERIALS INFORMATION www.ti.com 19-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS2042DR SOIC D 8 2500 340.5 338.1 20.6 TPS2052DR SOIC D 8 2500 340.5 338.1 20.
PAGE 26
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