Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - hot swap controller Multi-purpose TSSOP 14 Surface-mount

3 V–13 V

FAULT

typical application

NOTE: Terminal 13 is active-high on TPS2331.

VREG

ISET

ISENSE

GATE

DISCH

VSENSE

PWRGD

TIMER

DGND

AGND

VIN

TPS2330

GATE

DGND

TIMER

VREG

VSENSE

AGND

ISENSE

DISCH

ENABLE

PWRGD

FAULT

ISET

AGND

D OR PW PACKAGE

(TOP VIEW)

ENABLE

TPS2330

TPS2331

www.ti.com

SLVS277G –MARCH 2000–REVISED JULY 2013

SINGLE HOT-SWAP POWER CONTROLLERS WITH

CIRCUIT BREAKER AND POWER-GOOD REPORTING

Check for Samples: TPS2330, TPS2331

FEATURES

• Single-Channel High-Side MOSFET Driver

• Input Voltage: 3 V to 13 V

• Output dV/dt Control Limits Inrush Current

• Circuit-Breaker With Programmable

Overcurrent Threshold and Transient Timer

• Power-Good Reporting With Transient Filter

• CMOS- and TTL-Compatible Enable Input

• Low 5-μA Standby Supply Current (Max)

• Available in 14-Pin SOIC and TSSOP Package

• –40°C to 85°C Ambient Temperature Range

• Electrostatic Discharge Protection

APPLICATIONS

• Hot-Swap/Plug/Dock Power Management

• Hot-Plug PCI, Device Bay

• Electronic Circuit Breaker

DESCRIPTION

The TPS2330 and TPS2331 are single-channel hot-swap controllers that use external N-channel MOSFETs as

high-side switches in power applications. Features of these devices, such as overcurrent protection (OCP),

inrush-current control, output-power status reporting, and the ability to discriminate between load transients and

faults, are critical requirements for hot-swap applications.

The TPS2330/31 devices incorporate undervoltage lockout (UVLO) and power-good (PG) reporting to ensure the

device is off at start-up and confirm the status of the output voltage rails during operation. An internal charge

pump, capable of driving multiple MOSFETs, provides enough gate-drive voltage to fully enhance the N-channel

MOSFETs. The charge pump controls both the rise times and fall times (dV/dt) of the MOSFETs, reducing power

transients during power up/down. The circuit-breaker functionality combines the ability to sense overcurrent

conditions with a timer function; this allows designs such as DSPs, that may have high peak currents during

power-state transitions, to disregard transients for a programmable period.

Table 1. AVAILABLE OPTIONS

PACKAGES

(1)

HOT-SWAP CONTROLLER DESCRIPTION PIN COUNT

ENABLE ENABLE

Dual-channel with independent OCP and adjustable PG 20 TPS2300IPW TPS2301IPW

Dual-channel with interdependent OCP and adjustable PG 20 TPS2310IPW TPS2311IPW

TPS2320ID TPS2321ID

–40°C to 85°C

Dual-channel with independent OCP 16

TPS2320IPW TPS2321IPW

TPS2330ID TPS2331ID

Single-channel with OCP and adjustable PG 14

TPS2330IPW TPS2331IPW

(1) The packages are available left-end taped and reeled (indicated by the R suffix on the device type; e.g., TPS2331IPWR).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (25 pages)

PAGE 1
TPS2330 TPS2331 www.ti.
PAGE 2
TPS2330 TPS2331 SLVS277G – MARCH 2000 – REVISED JULY 2013 www.ti.com FUNCTIONAL BLOCK DIAGRAM IN VREG ISET ISENSE GATE PREREG DISCH Clamp dv/dt Rate Protection Charge Pump Circuit Breaker 50 µA Pulldown FET Circuit Breaker UVLO and Power Up AGND 75 µA VSENSE PWRGD Deglitcher DGND ENABLE FAULT Logic Deglitcher TIMER Table 2. Terminal Functions TERMINAL NAME NO.
PAGE 3
TPS2330 TPS2331 www.ti.com SLVS277G – MARCH 2000 – REVISED JULY 2013 DETAILED DESCRIPTION DISCH – DISCH should be connected to the source of the external N-channel MOSFET transistor connected to GATE. This pin discharges the load when the MOSFET transistor is disabled. They also serve as referencevoltage connection for internal gate-voltage-clamp circuitry. ENABLE or ENABLE – ENABLE for TPS2330 is active-low. ENABLE for TPS2331 is active-high.
PAGE 4
TPS2330 TPS2331 SLVS277G – MARCH 2000 – REVISED JULY 2013 www.ti.com ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) (2) VALUE UNIT VI(IN1), VI(ISENSE), VI(VSENSE), VI(ISET), VI(ENABLE) –0.3 to 15 V VI(VREG) –0.3 to 7 V VO(GATE) –0.3 to 30 V VO(DISCH), VO(PWRGD), VO( FAULT ), VO(TIMER) –0.
PAGE 5
TPS2330 TPS2331 www.ti.com SLVS277G – MARCH 2000 – REVISED JULY 2013 ELECTRICAL CHARACTERISTICS over recommended operating temperature range (–40°C < TA < 85°C), 3V ≤ VI(IN1) ≤13 V, 3 V ≤ VI(IN2) ≤ 5.5 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 0.
PAGE 6
TPS2330 TPS2331 SLVS277G – MARCH 2000 – REVISED JULY 2013 www.ti.com ELECTRICAL CHARACTERISTICS (Continued) over recommended operating temperature range (–40°C < TA < 85°C), 3 V ≤VI(IN1) ≤13 V, 3 V ≤ VI(IN2) ≤ 5.
PAGE 7
TPS2330 TPS2331 www.ti.com SLVS277G – MARCH 2000 – REVISED JULY 2013 PARAMETER MEASUREMENT INFORMATION Load 12 W VI(ENABLE) 5 V/div Load 12 W VI(ENABLE) 5 V/div VO(GATE) 10 V/div VO(DISCH) 5 V/div VO(GATE) 10 V/div VO(DISCH) 5 V/div t – Time – 10 ms/div t – Time – 10 ms/div Figure 1. Turnon Voltage Transition VI(ENABLE) 5 V/div No Capacitor on Timer Figure 2.
PAGE 8
TPS2330 TPS2331 SLVS277G – MARCH 2000 – REVISED JULY 2013 www.ti.com PARAMETER MEASUREMENT INFORMATION (continued) VI(ENABLE) 5 V/div No Capacitor on Timer No Capacitor on Timer VI(IN) 10 V/div VO(GATE) 10 V/div VO(GATE) 10 V/div VO(FAULT) 10 V/div VO(OUT) 10 V/div IO(OUT) 1 A/div II(IN) 2 A/div t – Time – 1 ms/div t – Time – 5 ms/div Figure 5. Enabled Into Short Circuit VI(IN) 10 V/div VO(GATE) 10 V/div Figure 6.
PAGE 9
TPS2330 TPS2331 www.ti.com SLVS277G – MARCH 2000 – REVISED JULY 2013 TYPICAL CHARACTERISTICS INPUT CURRENT (ENABLED) vs INPUT VOLTAGE INPUT CURRENT (DISABLED) vs INPUT VOLTAGE 15 52 IN = 5 V to 13 V TA = 85°C 14 TA = 25°C 13 TA = 25°C 49 II – Input Current – nA II – Input Current – mA 50 48 47 TA = 0°C 46 TA = –40°C TA = –40°C 12 TA = 0°C 11 10 9 45 8 44 43 4 5 6 7 8 9 10 11 12 13 7 14 4 5 6 7 8 9 10 11 12 13 14 VI – Input Voltage – V Figure 9.
PAGE 10
TPS2330 TPS2331 SLVS277G – MARCH 2000 – REVISED JULY 2013 www.ti.com TYPICAL CHARACTERISTICS (continued) GATE VOLTAGE FALL TIME vs GATE LOAD CAPACITANCE GATE OUTPUT CURRENT vs GATE VOLTAGE 4 15 14.5 IO – GATE Output Current – mA t f – GATE Voltage Fall Time – ms IN = 12 V TA = 25°C 3 2 1 14 TA = –40°C TA = 85°C 13.5 TA = 25°C 13 TA = 0°C 12.5 12 11.5 IN = 13 V 0 11 0 3 6 9 12 14 15 16 19 20 21 22 Figure 13.
PAGE 11
TPS2330 TPS2331 www.ti.com SLVS277G – MARCH 2000 – REVISED JULY 2013 TYPICAL CHARACTERISTICS (continued) UVLO START AND STOP THRESHOLDS vs TEMPERATURE PWRGD INPUT THRESHOLD vs TEMPERATURE 1.27 2.88 VIT – PWRGD Input Threshold – V Vref – UVLO Start and Stop Thresholds – V 2.9 2.86 Start 2.84 2.82 2.8 2.78 Stop 2.76 2.74 1.26 Up 1.25 1.24 1.23 Down 1.22 1.21 2.72 2.7 –45–35 –25–15 –5 5 15 25 35 45 55 65 75 85 95 TA – Temperature – °C Figure 16. 1.
PAGE 12
TPS2330 TPS2331 SLVS277G – MARCH 2000 – REVISED JULY 2013 www.ti.com APPLICATION INFORMATION This diagram shows a typical dual hot-swap application. The pullup resistors at PWRGD and FAULT should be relatively large (e.g. 100 kΩ) to reduce power loss unless they are required to drive a large load. System Board RSENSE 3 V ∼ 13 V IN 1 µF ∼ 10 µF + RVSENSE_TOP VO RISET RVSENSE_BOTTOM 0.
PAGE 13
TPS2330 TPS2331 www.ti.com SLVS277G – MARCH 2000 – REVISED JULY 2013 Table 3. Some Available N-Channel MOSFETs CURRENT RANGE (A) 0 to 2 2 to 5 5 to 10 PART NUMBER DESCRIPTION MANUFACTURER IRF7601 N-channel, rDS(on) = 0.035 Ω, 4.6 A, Micro-8 International Rectifier MTSF3N03HDR2 N-channel, rDS(on) = 0.040 Ω, 4.6 A, Micro-8 ON Semiconductor IRF7101 Dual N-channel, rDS(on) = 0.1 Ω, 2.3 A, SO-8 International Rectifier MMSF5N02HDR2 Dual N-channel, rDS(on) = 0.
PAGE 14
TPS2330 TPS2331 SLVS277G – MARCH 2000 – REVISED JULY 2013 www.ti.com pin. Once the gate has been pulled below approximately 1.5 V, this driver is disengaged and the UVLO driver is enabled instead. SETTING THE CURRENT-LIMIT CIRCUIT-BREAKER THRESHOLD The current sensing resistor RISENSE and the current limit setting resistor RISET determine the current limit of the channel, and can be calculated by the following equation: R 50 10 –6 I LMT + ISET R ISENSE (2) Typically RISENSE is usually very small (0.
PAGE 15
TPS2330 TPS2331 www.ti.com SLVS277G – MARCH 2000 – REVISED JULY 2013 THREE-CHANNEL HOT-SWAP APPLICATION Some applications require hot-swap control of up to three voltage rails, but may not explicitly require the sensing of the status of the output power on all three of the voltage rails. One such application is a device bay, where dV/dt control of 3.3 V, 5 V, and 12 V is required.
PAGE 16
TPS2330 TPS2331 SLVS277G – MARCH 2000 – REVISED JULY 2013 www.ti.com VO – Output Voltage – 2 V/div VO1 VO3 VO2 t – Time – 2.5 ms/div Figure 20.
PAGE 17
TPS2330 TPS2331 www.ti.com SLVS277G – MARCH 2000 – REVISED JULY 2013 REVISION HISTORY Note: Revision history for previous versions is not available. Page numbers of previous versions may differ. Changes from Revision F (November 2006) to Revision G Page • Added text to ISENSE, ISET pin description paragraph for clarification. ............................................................................. 3 • Added additional VI specs to ROC table for clarification ......................................
PAGE 18
PACKAGE OPTION ADDENDUM www.ti.
PAGE 19
PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
PAGE 20
PACKAGE MATERIALS INFORMATION www.ti.com 9-Jul-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS2330IDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TPS2330IPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 TPS2331IDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.
PAGE 21
PACKAGE MATERIALS INFORMATION www.ti.com 9-Jul-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS2330IDR SOIC D 14 2500 367.0 367.0 38.0 TPS2330IPWR TSSOP PW 14 2000 367.0 367.0 35.0 TPS2331IDR SOIC D 14 2500 367.0 367.0 38.0 TPS2331IPWR TSSOP PW 14 2000 367.0 367.0 35.
PAGE 22
PAGE 23
PAGE 24
PAGE 25
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.