Datasheet

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TPS23753

OUT

GATE

RTN

CTL

58V

0.1µF

DEN

CLS

From Ethernet

Transformers

DD1

CLS

OUT

CTL

From Spare

Pairs or

Transformers

DEN

BLNK

FRS

Adapter

FBU

FBL

TLV431

APD

APD2

APD1

BLNK

BR1

BR2

* AdapterinterfaceandR

BLNK

areOptional

TPS23753A

www.ti.com

SLVS933B –JULY 2009–REVISED JANUARY 2010

IEEE 802.3 PoE INTERFACE AND CONVERTER CONTROLLER WITH ENHANCED ESD

IMMUNITY

FEATURES

DESCRIPTION

• Enhanced ESD Ride-Through Capability

• Optimized for Isolated Converters

The TPS23753A is a combined Power over Ethernet

(PoE) powered device (PD) interface and

• Complete PoE Interface

current-mode dc/dc controller optimized specifically

• Adapter ORing Support

for isolated converter designs. The PoE

• 12 V Adapter Support

implementation supports the IEEE 802.3at standard

as a 13 W type 1 PD. The requirements for an IEEE

• Programmable Frequency with Synch.

802.3at type 1 device are a superset of IEEE

• Robust 100 V, 0.7 Ω Hotswap MOSFET

802.3-2008 (originally IEEE 802.3af).

• Small TSSOP 14 Package

The TPS23753A supports a number of input-voltage

• 15 kV / 8 kV System Level ESD Capable

ORing options including highest voltage, external

• –40°C to 125°C Junction Temperature Range

adapter preference, and PoE preference.

• Design Procedure Application Note - SLVA305

The PoE interface features an external detection

• Adapter ORing Application Note - SLVA306

signature pin that can also be used to disable the

internal hotswap MOSFET. This allows the PoE

function to be turned off. Classification can be

APPLICATIONS

programmed to any of the defined types with a single

• IEEE 802.3at Compliant Powered Devices

resistor.

• VoIP Telephones

The dc/dc controller features a bootstrap startup

• Access Points

mechanism with an internal, switched current source.

• Security Cameras

This provides the advantages of cycling overload fault

protection without the constant power loss of a pull up

resistor.

The programmable oscillator may be synchronized to

a higher-frequency external timing reference. The

TPS23753A features improvements for uninterrupted

device operation through an ESD event.

Figure 1. Basic TPS23753A Implementation

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (30 pages)

PAGE 1
TPS23753A www.ti.com SLVS933B – JULY 2009 – REVISED JANUARY 2010 IEEE 802.3 PoE INTERFACE AND CONVERTER CONTROLLER WITH ENHANCED ESD IMMUNITY FEATURES 1 • • • • • • • • • • • • DESCRIPTION Enhanced ESD Ride-Through Capability Optimized for Isolated Converters Complete PoE Interface Adapter ORing Support 12 V Adapter Support Programmable Frequency with Synch. Robust 100 V, 0.
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TPS23753A SLVS933B – JULY 2009 – REVISED JANUARY 2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
PAGE 3
TPS23753A www.ti.com SLVS933B – JULY 2009 – REVISED JANUARY 2010 RECOMMENDED OPERATING CONDITIONS Voltage with respect to VSS (unless otherwise noted) MIN VI NOM MAX 0 57 V Input voltage range, VC to RTN 0 18 V Input voltage range, APD, CTL to RTN 0 VB V Input voltage range, CS to RTN 0 2 RTN current (TJ ≤ 125°C) VB sourcing current VB capacitance RBLNK 0 2.5 0.08 0..
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TPS23753A SLVS933B – JULY 2009 – REVISED JANUARY 2010 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Unless otherwise noted: CS = APD = CTL = RTN, GATE open, RFRS = 60.4 kΩ, RBLNK = 249 kΩ, CVB = CVC = 0.1 mF, RDEN = 24.9 kΩ, RCLS open, VVDD-VSS = 48 V, VVDD1-RTN = 48 V, 8.5 V ≤ VVC-RTN ≤ 18 V, –40°C ≤ TJ ≤ 125°C Controller Section Only [VSS = RTN and VDD = VDD1] or [VSS = RTN = VDD], all voltages referred to RTN. Typical specifications are at 25°C.
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TPS23753A www.ti.com SLVS933B – JULY 2009 – REVISED JANUARY 2010 ELECTRICAL CHARACTERISTICS (continued) PoE and Control [VDD = VDD1] or [VDD1 = RTN], VVC-RTN = 0 V, all voltages referred to VSS. Typical specifications are at 25°C. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 155 °C THERMAL SHUTDOWN Turn off temperature 135 145 Hysteresis (2) (2) 20 °C These parameters are provided for reference only.
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TPS23753A SLVS933B – JULY 2009 – REVISED JANUARY 2010 www.ti.com VC VDD1 Oscillator FRS CTL enb 800ms Soft Start 50kW CONV. OFF enb + 1 0.75V enb 40mA (pk) 2.875kW GATE D Q CK + 50kW Control CLRB RTN Blank Switch Matrix CS Converter Thermal Monitor + 0.55V Regulator VB Reference - RTN 1.5V & 1.2V APDb BLNK VDD 11.5V & 9.5V Class Regulator AUXb APD CLS 2.53V 22V & 21.25V 12.5V & 1V Common Circuits and PoE Thermal Monitor V SS DEN 400ms S Q R 35V & 30.5V CONV.
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TPS23753A www.ti.com VADPTR _ OFF = SLVS933B – JULY 2009 – REVISED JANUARY 2010 RAPD1 + RAPD 2 RAPD 2 x (VAPDEN - VAPDH ) (2) The CLS output is disabled when a voltage above VAPDEN is applied to the APD pin. Place the APD pull-down resistor adjacent to the APD pin. APD should be tied to RTN when not used. BLNK Blanking provides an interval between the gate drive going high and the current comparator on CS actively monitoring the input.
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TPS23753A SLVS933B – JULY 2009 – REVISED JANUARY 2010 www.ti.com FRS Connect a resistor from FRS to RTN to program the converter switching frequency. Select the resistor per the following relationship. RFRS ( k Ω ) = 15000 fSW ( kHz ) (4) The converter may be synchronized to a frequency above its maximum free-running frequency by applying short ac-coupled pulses into the FRS pin. More information is provided in the Applications section. The FRS pin is high impedance.
PAGE 9
TPS23753A www.ti.com SLVS933B – JULY 2009 – REVISED JANUARY 2010 TYPICAL CHARACTERISTICS DETECTION BIAS CURRENT vs VOLTAGE PoE CURRENT LIMIT vs TEMPERATURE 458 8 7 456 PoE - Current Limit - mA IVDD - Bias Current - mA 6 TJ = 125°C 5 4 3 TJ = 25°C 2 454 452 450 448 1 TJ = -40°C 446 -40 0 0 2 6 VVDD-VSS - PoE Voltage - V 4 10 8 20 40 60 80 TJ - Junction Temperature - °C Figure 4. CONVERTER START TIME vs TEMPERATURE CONVERTER STARTUP SOURCE CURRENT vs VVDD1 120 6 VVC = 8.
PAGE 10
TPS23753A SLVS933B – JULY 2009 – REVISED JANUARY 2010 www.ti.
PAGE 11
TPS23753A www.ti.com SLVS933B – JULY 2009 – REVISED JANUARY 2010 TYPICAL CHARACTERISTICS (continued) MAXIMUM DUTY CYCLE vs TEMPERATURE CURRENT SLOPE COMPENSATION VOLTAGE vs TEMPERATURE 124 RFRS = 301 kW (50 kHz) 78 RFRS = 148.5 kW (100 kHz) 77.5 RFRS = 60.4 kW (250 kHz) 77 RFRS = 30.1 kW (500 kHz) 76.5 76 -40 -20 0 60 80 20 40 TJ - Junction Temperature - °C 100 120 118 116 114 -40 120 -20 0 20 40 60 Figure 11. Figure 12.
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TPS23753A SLVS933B – JULY 2009 – REVISED JANUARY 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) 450 18 400 14 350 10 300 6 250 2 200 -2 150 -6 100 -10 50 -14 0 0 50 100 150 200 250 RBLNK - kW 300 350 Difference from Computed - ns Blanking Period - ns BLANKING PERIOD vs RBLNK -18 400 Figure 15.
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TPS23753A www.ti.com SLVS933B – JULY 2009 – REVISED JANUARY 2010 APPLICATIONS Classic PoE Overview The following text is intended as an aid in understanding the operation of the TPS23753A but not as a substitute for the actual IEEE 802.3at standard. The IEEE 802.3at standard is an update to IEEE 802.3-2008 clause 33 (PoE), adding high-power options and enhanced classification. Generally speaking, a device compliant to IEEE 802.
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TPS23753A SLVS933B – JULY 2009 – REVISED JANUARY 2010 www.ti.com Threshold Voltages Operational State The TPS23753A has a number of internal comparators with hysteresis for stable switching between the various states as shown in Figure 16. Figure 17 relates the parameters in the Electrical Characteristics section to the PoE states. The mode labeled idle between classification and operation implies that the DEN, CLS, and RTN pins are all high impedance.
PAGE 15
TPS23753A www.ti.com SLVS933B – JULY 2009 – REVISED JANUARY 2010 Detection The TPS23753A is in detection mode whenever VVDD-V SS is below the lower classification threshold. When the input voltage rises above VCL_ON, the DEN pin goes to an open-drain condition to conserve power. While in detection, RTN is high impedance, almost all the internal circuits are disabled, and the DEN pin is pulled to VSS. An RDEN of 24.9 kΩ (1%), presents the correct signature.
PAGE 16
TPS23753A SLVS933B – JULY 2009 – REVISED JANUARY 2010 www.ti.com The PSE drives the PI voltage to the operating range once it has decided to power up the PD. When VDD rises above the UVLO turn-on threshold (VUVLO-R, ~35 V) with RTN high, the TPS23753A enables the hotswap MOSFET with a ~140 mA (inrush) current limit. Refer to the waveforms of Figure 19 for an example.
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TPS23753A www.ti.com SLVS933B – JULY 2009 – REVISED JANUARY 2010 Figure 20. Response to PSE Step Voltage The PD control has a thermal sensor that protects the internal hotswap MOSFET. Conditions like startup or operation into a VDD to RTN short cause high power dissipation in the MOSFET. An overtemperature shutdown (OTSD) turns off the hotswap MOSFET and class regulator, which are restarted after the device cools. The PD will restart in inrush current limit when exiting from a PD overtemperature event.
PAGE 18
TPS23753A SLVS933B – JULY 2009 – REVISED JANUARY 2010 www.ti.com Care in design of the transformer and VC bias circuit is required to obtain hiccup overload protection. Leading-edge voltage overshoot on the bias winding may cause VC to peak-charge, preventing the expected tracking with output voltage. RVC (Figure 1) is often required slow the peak charging. Good transformer bias-to-output-winding coupling results in reduced overshoot and better voltage tracking.
PAGE 19
TPS23753A www.ti.com SLVS933B – JULY 2009 – REVISED JANUARY 2010 Special Switching MOSFET Considerations Special care must be used in selecting the converter switching MOSFET. The TPS23753A converter section has minimum VC operating voltage of ~5.5 V, which is reflected in the applied gate voltage. This will occur during an output overload, or towards the end of a (failed) bootstrap startup. The MOSFET must be able to carry the anticipated peak fault current at this gate voltage.
PAGE 20
TPS23753A SLVS933B – JULY 2009 – REVISED JANUARY 2010 www.ti.com RTN GATE CS RS RCS CS 5/09/08 Figure 22. Additional Slope Compensation CS may be required if the presence of RS causes increased noise, due to adjacent signals like the gate drive, to appear at the CS pin. The TPS23753A has an internal pull-down on CS ( ~400 Ω max ) while the MOSFET is OFF to reduce cycle-to-cycle carry-over voltage on CS.
PAGE 21
TPS23753A www.ti.com SLVS933B – JULY 2009 – REVISED JANUARY 2010 Adapter ORing Many PoE-capable devices are designed to operate from either a wall adapter or PoE power. A local power solution adds cost and complexity, but allows a product to be used if PoE is not available in a particular installation. While most applications only require that the PD operate when both sources are present, the TPS23753A supports forced operation from either of the power sources.
PAGE 22
TPS23753A SLVS933B – JULY 2009 – REVISED JANUARY 2010 www.ti.com The least popular technique is PoE priority. It is implemented by placing a diode between the PD supply voltage, VDD, and the dc/dc controller bias voltage, VDD1. The diode prevents reverse biasing of the PoE input diode bridges when option 2 adapter ORing is used. The PSE may then detect, classify, and provide power to the PD while a live adapter is connected.
PAGE 23
TPS23753A www.ti.com SLVS933B – JULY 2009 – REVISED JANUARY 2010 Occasionally, a technique referred to as frequency dithering is utilized to provide additional EMI measurement reduction. The switching frequency is modulated to spread the narrowband individual harmonics across a wider bandwidth, thus lowering peak measurements. The circuit of Figure 26 modulates the switching frequency by feeding a small ac signal into the FRS pin. These values may be adapted to suit individual needs. 10kΩ 49.
PAGE 24
TPS23753A SLVS933B – JULY 2009 – REVISED JANUARY 2010 www.ti.com REVISION HISTORY Changes from Revision Original (July 2009) to Revision A • Page Changed the ESDS statement. ............................................................................................................................................. 2 Changes from Revision A (September 2009) to Revision B Page • Changed From: IEEE 802.3-2005 To: IEEE 802.3at throughout the data sheet ...................................................
PAGE 25
PACKAGE OPTION ADDENDUM www.ti.com 22-Dec-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS23753APW ACTIVE TSSOP PW 14 TPS23753APWR ACTIVE TSSOP PW 14 90 Lead/Ball Finish MSL Peak Temp (3) Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPS23753APWR Package Package Pins Type Drawing TSSOP PW 14 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2000 330.0 12.4 Pack Materials-Page 1 6.9 B0 (mm) K0 (mm) P1 (mm) 5.6 1.6 8.0 W Pin1 (mm) Quadrant 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS23753APWR TSSOP PW 14 2000 367.0 367.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.