Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - OR controller, electrical elements n-channel SOIC 8 N+1 OR controller

GND

GATE

Voltage Source

BYP

RSET

RSVD

SET

Common Voltage Rail

Enable

R2R1

TPS2419

www.ti.com

SLVS998B –FEBRUARY 2010–REVISED SEPTEMBER 2011

N+1 and ORing Power Rail Controller with Enable

Check for Samples: TPS2419

FEATURES

• Control External FET for N+1 and ORing

DESCRIPTION

• Controls Buses From 3 V to 16.5 V

The TPS2419 controller, in conjunction with an

• External Enable

external N-channel MOSFET, provides the reverse

current protection of an ORing diode with the

• N-Channel MOSFETControl

efficiency of a MOSFET. The TPS2419 can be used

• Rapid Device Turnoff Protects Bus Integrity

to combine multiple power supplies to a common bus

• Programmable Turn-Off Threshold

in an N+1 configuration, or to combine redundant

input power buses.

• Soft Turn on Reduces Bus Transients

• Industrial Temperature Range: –40°C to 85°C

Applications for the TPS2419 include a wide range of

systems including servers and telecom. These

• 8-Pin TSSOP and SOIC Packages

applications often have either N+1 redundant power

supplies, redundant power buses, or both. Redundant

APPLICATIONS

power sources must have the equivalent of a diode

• N+1 Power Supplies

OR to prevent reverse current during faults and

hotplug.

• Server Blades

• Telecom Systems Accurate voltage sensing and a programmable

turn-off threshold allows operation to be tailored for a

• High Availability Power Modules

wide range of implementations and bus

characteristics. The TPS2419 brings out an enable

pin which allows the system to force the MOSFET off

under light-load, high noise conditions.

Table 1. Family Features

'2410 '2411 '2412 '2413 '2419

Enable input √ √ √

Linear gate control √ √

ON/OFF gate √ √ √

control

Turnoff √ √

comparator

filtering

Voltage monitoring √ √

MOSFET fault √ √

monitoring

Status pin √ √

Independent √ √ √ √

Supply Pin

Figure 1. Typical Application

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (24 pages)

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TPS2419 SLVS998B – FEBRUARY 2010 – REVISED SEPTEMBER 2011 www.ti.com N+1 and ORing Power Rail Controller with Enable Check for Samples: TPS2419 FEATURES 1 • • • • • • • • • Control External FET for N+1 and ORing Controls Buses From 3 V to 16.
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TPS2419 SLVS998B – FEBRUARY 2010 – REVISED SEPTEMBER 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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TPS2419 SLVS998B – FEBRUARY 2010 – REVISED SEPTEMBER 2011 www.ti.com RECOMMENDED OPERATING CONDITIONS voltages are referenced to GND (unless otherwise noted) MIN (1) NOM UNIT 16.5 V 5 V A, C Input voltage range A to C Operational voltage EN Input voltage range 0 5 V R(RSET) Resistance range (2) 1.5 ∞ kΩ C(BYP) Capacitance Range (2) 800 10k pF TJ Operating junction temperature –40 125 °C (1) (2) 0 MAX 2200 V(C) must exceed 2.
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TPS2419 SLVS998B – FEBRUARY 2010 – REVISED SEPTEMBER 2011 www.ti.com ELECTRICAL CHARACTERISTICS(1) (continued) Common conditions (unless otherwise noted) are: [3 V ≤ ( V(A), V(C) ) ≤ 18 V ] , C(BYP) = 2200 pF, R(RSET) = open, EN = 2 V, GATE = open, –40°C ≤ TJ ≤ 125°C, positive currents into pins, typical values are at 25°C, all voltages with respect to GND.
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TPS2419 SLVS998B – FEBRUARY 2010 – REVISED SEPTEMBER 2011 www.ti.com PW and D PACKAGE (TOP VIEW) 1 4 RSET EN RSVD GND BYP A C GATE 8 5 TERMINAL FUNCTIONS TERMINAL I/O DESCRIPTION NAME NO. RSET 1 I Connect a resistor to ground to program the turn-off threshold. Leaving RSET open results in a slightly positive V(A-C) turn-off threshold. EN 2 I Pull EN above 1.3 V to permit normal ORing operation. A low on EN holds GATE low. RSVD 3 PWR This pin must be connected to GND.
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TPS2419 SLVS998B – FEBRUARY 2010 – REVISED SEPTEMBER 2011 www.ti.com DETAILED DESCRIPTION The following descriptions refer to the pinout and the functional block diagram. A, C: The A pin serves as the simulated diode anode and the C as the cathode. GATE is driven high when V(A-C) exceeds 65 mV. A strong GATE pull-down is applied when V(A-C) is less than the programmable turn-off threshold (see RSET).
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TPS2419 SLVS998B – FEBRUARY 2010 – REVISED SEPTEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS TURNOFF THRESHOLD vs TEMPERATURE PULSED GATE SINKING CURRENT vs GATE VOLTAGE 3.0 5.0 R(RSET) = Open o TJ = -40 C 4.5 2.5 4.0 o TJ = 25 C I(GATE) − A V(AC) − mV 2.0 3.5 3.0 2.5 TJ = 85oC 1.5 o TJ = 125 C 1.0 2.0 0.5 1.5 1.0 −40 0.0 −20 0 20 40 60 80 100 0 120 2 4 6 8 10 V(GATE - GND) − V o TJ − Junction Temperature − C Figure 2. Figure 3.
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TPS2419 SLVS998B – FEBRUARY 2010 – REVISED SEPTEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) TURN ON VOLTAGE vs TEMPERATURE ENABLETHRESHOLD vs TEMPERATURE 65.5 1.32 65.4 1.31 65.3 EN - Threshold - V VON - mV EN Rising 1.3 65.2 65.1 65 64.9 64.8 1.29 EN Hysteresis ~ 29 mV 1.28 EN Falling 1.27 64.7 1.26 64.6 64.5 -40 -20 0 20 40 60 80 TJ - Temperature - °C 100 1.25 120 -40 -20 Figure 6. 0 20 40 60 80 100 TJ - Junction Temperature - °C 120 Figure 7.
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TPS2419 SLVS998B – FEBRUARY 2010 – REVISED SEPTEMBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) EXAMPLE TURNOFF GATE drives 10 nF to GND VC = 12 V, RSET = 61.9 WW 1 A/DIV IGATE Turn off Threshold 10 V/DIV 20 mv/DIV VA-C VGATE = VA VGATE 135 ns Time 100ns/DIV Figure 9.
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TPS2419 SLVS998B – FEBRUARY 2010 – REVISED SEPTEMBER 2011 www.ti.com APPLICATION INFORMATION OVERVIEW The TPS2419 is designed to allow an output ORing in N+1 power supply applications (see Figure 11), and an input-power bus ORing in redundant source applications (see Figure 12). The TPS2419 and external MOSFET emulate a discrete diode to perform this unidirectional power combining function. The advantage to this emulation is lower forward voltage drop and higher efficiency.
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TPS2419 SLVS998B – FEBRUARY 2010 – REVISED SEPTEMBER 2011 www.ti.com Implementation Concept Power Bus CBYP EN C RSVD GATE GND BYP A DC/DC Converter Input Voltage Power Conversion Block Common Bus DC/DC Converter Figure 11. N+1 Power Supply Example INPUT ORing – TYPICAL CONNECTION Figure 12 shows how redundant buses may be ORed to a common point to achieve higher reliability.
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TPS2419 SLVS998B – FEBRUARY 2010 – REVISED SEPTEMBER 2011 www.ti.com SYSTEM DESIGN AND NOISE ISSUES In noisy system environments, the low impedance of a MOSFET coupled with a default positive turn off threshold voltage might result in unwanted ON/OFF GATE cycling. Ideally the best way to approach the problem is with a clean layout and noise free system design. Since design constraints limit the ability to improve this, the following suggestions can be employed with the TPS2419.
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TPS2419 SLVS998B – FEBRUARY 2010 – REVISED SEPTEMBER 2011 www.ti.com To obtain a -10 mV turnoff ( V(A) is less than V(C) by 10 mV ), R(RSET) = (–470.02/ ( –0.01–0.00314) ) ≈ 35.7 kΩ. If a 10 mΩ rDS(on) MOSFET was used, the reverse turnoff current would be calculated as follows. V(THRESHOLD) I(TURN_OFF) = r DS(on) I(TURN_OFF) = -10 mV 10 mW I(TURN_OFF) = - 1 A (3) The sign indicates that the current is reverse, or flows from the MOSFET drain to source ( C to A ).
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TPS2419 Turn on Threshold www.ti.com VC Output 10 V/DIV 100 mv/DIV AC_Coupled SLVS998B – FEBRUARY 2010 – REVISED SEPTEMBER 2011 Configuration: 2 x ( CSD16401, TI with 0W gate resistors) MOSFET stops conducting 10 V/DIV VGATE_MOSFET VGATE_2419 Time 50ns/DIV 10 V/DIV 10 V/DIV 100 mv/DIV AC_Coupled Figure 14. Gate Turnoff Waveforms with RGATE = 0Ω VC Output Configuration: 2 x ( CSD16401, TI with 51W in gate) MOSFET stops conducting VGATE_MOSFET VGATE_2419 Time 50ns/DIV Figure 15.
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TPS2419 SLVS998B – FEBRUARY 2010 – REVISED SEPTEMBER 2011 www.ti.com Input Filtering Voltage transients, converter switching noise and ripple, and ringing due to current interruptions can potentially cause undesired on-off cycling, especially at very light loads. This includes voltage gradients (especially at MHz frequencies) across the ground plane effecting the apparent V(A) and V(C). The effects of these unwanted signals can be reduced by providing input filtering as shown in Figure 16 and Figure 13.
PAGE 16
TPS2419 100 mv/DIV AC_Coupled SLVS998B – FEBRUARY 2010 – REVISED SEPTEMBER 2011 www.ti.com 135mVPP 200 mV/DIV VC Output VA-C VC = 12 V, Load = 10 kW || 0.1mF Note slight (-) offset in differential probe 15V VGATE 10V Time 10ms/DIV Figure 17. Turnon with Noisy Power Rail SUMMARIZED DESIGN PROCEDURE The following is a summarized design procedure: 1. Noise voltage and impedance at the A and C pins should be kept low. A minimum 0.01 μF or more may be required. 2.
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TPS2419 SLVS998B – FEBRUARY 2010 – REVISED SEPTEMBER 2011 www.ti.com REVISION HISTORY Changes from Original (February 2010) to Revision A Page • Changed the data sheet From: Preview To: Production Data .............................................................................................. 1 • Changed the Overview section - paragraph 2 From: MOSFET gate is initially low, and V(AC) is less than 64 mV. To: MOSFET gate is initially at GND, and V(A-C) is less than 65 mV. ...........................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPS2419PWR Package Package Pins Type Drawing TSSOP PW 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2000 330.0 12.4 Pack Materials-Page 1 7.0 B0 (mm) K0 (mm) P1 (mm) 3.6 1.6 8.0 W Pin1 (mm) Quadrant 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS2419PWR TSSOP PW 8 2000 367.0 367.0 35.
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