Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - ELCs High side WFQFN 16

1516

ILIM0

ILIM1

DM_OUT

DP_OUT

ILIM_SEL

GND

FAULT

EN/DSC

CTL1

CTL2

CTL3

DM_IN

DP_IN

N/C

OUT

Exposed

Thermal Die

TPS2540/40A/41/41A

RTE Package

(Top View)

1 IN

0.1 mF

13 FAULT

FAULT

10 kW

FAULT Signal

4.5 V to 5.5 V

4 ILIM_SELILIM Select

6 CTL1

5 EN/DSC

7 CTL2

8 CTL3

DP_IN

DM_IN

DM_OUT

DP_OUT

12OUT

16ILIM0

15ILIM1

14GND

ILIM

TPS2540/40A/41/41A

Power Switch EN

Mode Select I/O

To Host Controller

UDG-10116

VBUS

D-

D+

GND

USB

To PeripheralTo System Bus

TPS2540, TPS2540A

TPS2541, TPS2541A

www.ti.com

SLVSAG2C –OCTOBER 2010– REVISED OCTOBER 2011

USB Charging Port Power Switch and Controller

Check for Samples: TPS2540, TPS2540A, TPS2541, TPS2541A

FEATURES

DESCRIPTION

The TPS2540/40A and TPS2541/41A are a

• Meets Battery Charging Specification BC1.2

combination of current-limited USB port power switch

for DCP and CDP

with a USB 2.0 high-speed data line (D+/D-) switch

• Meets Chinese Telecommunications Industry

and a USB charging port identification circuit.

Standard YD/T 1591-2009

Applications include notebook PCs and other

intelligent USB host devices. The wide bandwidth (2.6

• Supports Sleep-Mode Charging for Most

GHz) data-line switch also features low capacitance

Available Apple

Devices and/or BC1.2

and low on resistance, allowing signals to pass with

Compliant Devices

minimum edge and phase distortion. The

• Compatible With USB 2.0 and 3.0 Power

TPS2540/40A/41/41A monitors D+ and D-, providing

Switch Requirements

the correct hand-shaking protocol with compliant

• 2.6-GHz Bandwidth USB 2.0 Data Switch

client devices.

• 73-mΩ (typ.) High-Side MOSFET

The TPS2540/40A/41/41A supports the following

charging logic schemes:

• Adjustable Current Limit up to 2.8 A (typical)

• USB 2.0 BC1.2

• OUT Discharge Through CTLx=000

(TPS2540/40A) or DSC (TPS2541/41A) Input

• Chinese Telecom Standard YD/T 1591-2009

• Divider Mode, compliant with Apple devices such

• Longer Detach Detection Time (TPS2540A/41A)

as iPod

and iPhone

Supporting Additional Legacy Devices

• Available in 16-Pin QFN Package

CTL1-CTL3 logic inputs are used to select one of the

various charge modes provided by the TPS2540/40A

and TPS2541/41A. These charge modes allow the

APPLICATIONS

host device to actively select between Dedicated

• USB Ports/Hubs

Charging Port (DCP) (wall-adapter emulation),

• Notebook PCs

Charging Downstream Port (CDP) (active USB 2.0

data communications with 1.5-A support), or

• Universal Wall Charging Adapter

Standard Downstream Port (SDP) USB 2.0 Mode

(active USB 2.0 data communications with 500-mA

support). The TPS2540/40A/41/41A also integrates

an auto-detect feature that supports both DCP

schemes for Battery Charging Specification (BC1.2)

and the Divider Mode without the need for outside

user interaction.

TPS2540/40A/41/41A RTE Package and Typical Application Diagram

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2Apple, iPod, iPhone are registered trademarks of Apple Inc.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (40 pages)

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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com USB Charging Port Power Switch and Controller Check for Samples: TPS2540, TPS2540A, TPS2541, TPS2541A FEATURES DESCRIPTION • The TPS2540/40A and TPS2541/41A are a combination of current-limited USB port power switch with a USB 2.0 high-speed data line (D+/D-) switch and a USB charging port identification circuit. Applications include notebook PCs and other intelligent USB host devices. The wide bandwidth (2.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range, voltages are referenced to GND (unless otherwise noted) PARAMETER MIN MAX UNIT Supply voltage range IN -0.3 7 Input voltage range EN (TPS2540/40A), DSC (TPS2541/41A), ILIM0, ILIM1, ILIM_SEL, CTL1, CTL2, CTL3 -0.3 7 Voltage range OUT, FAULT -0.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) PARAMETER VIN MIN Input voltage, IN Input voltage, logic-level inputs, (CTL1, CTL2, CTL3, EN (TPS2540/40A), DSC (TPS2541/41A), ILIM_SEL) NOM MAX UNIT 4.5 5.5 0 5.5 Input voltage, data line inputs, (DP_IN, DM_IN, DP_OUT, DM_OUT) 5.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com ELECTRICAL CHARACTERISTICS Conditions are -40 ≤ TJ ≤ 125°C unless otherwise noted. VEN (if TPS2540 or TPS2540A) = VDSC (if TPS2541 or TPS2541A) = VIN = 5 V, RFAULT = 10 kΩ, RILIM0 = 210 kΩ, RILIM1 = 20 kΩ, ILIM_SEL = 0 V, CTL1 = CTL2 = GND, CTL3 = VIN (TPS2540/40A) or CTL3 = GND (TPS2541/41A), unless otherwise noted. Positive currents are into pins. Typical values are at 25°C.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Conditions are -40 ≤ TJ ≤ 125°C unless otherwise noted. VEN (if TPS2540 or TPS2540A) = VDSC (if TPS2541 or TPS2541A) = VIN = 5 V, RFAULT = 10 kΩ, RILIM0 = 210 kΩ, RILIM1 = 20 kΩ, ILIM_SEL = 0 V, CTL1 = CTL2 = GND, CTL3 = VIN (TPS2540/40A) or CTL3 = GND (TPS2541/41A), unless otherwise noted. Positive currents are into pins. Typical values are at 25°C.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Conditions are -40 ≤ TJ ≤ 125°C unless otherwise noted. VEN (if TPS2540 or TPS2540A) = VDSC (if TPS2541 or TPS2541A) = VIN = 5 V, RFAULT = 10 kΩ, RILIM0 = 210 kΩ, RILIM1 = 20 kΩ, ILIM_SEL = 0 V, CTL1 = CTL2 = GND, CTL3 = VIN (TPS2540/40A) or CTL3 = GND (TPS2541/41A), unless otherwise noted. Positive currents are into pins. Typical values are at 25°C.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com PIN DESCRIPTIONS Pin Descriptions NAME PIN I/O DESCRIPTION IN 1 PWR Input voltage; connect a 0.1-µF or greater ceramic capacitor from IN to GND as close to the device as possible. OUT 12 PWR Power-switch output. GND 14 PWR Ground connection; should be connected externally to Power PAD. POWERPAD N/A Power Switch Internally connected to GND; used to heat-sink the part to the circuit board traces.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com TYPICAL CHARACTERISTICS IN UVLO RISING vs TEMPERATURE SUPPLY CURRENT - DISABLED vs TEMPERATURE 4.5 1 4.4 0.9 0.8 ICCL - IN Current - mA VUVLO - IN UVLO - V 4.3 4.2 4.1 4 3.9 0.7 0.6 0.5 0.4 0.3 3.8 0.2 3.7 0.1 3.6 0 -40 -20 0 20 40 60 80 100 120 140 -40 -20 TJ - Junction Temperature - °C 40 20 60 80 100 120 140 120 140 TJ - Junction Temperature - °C Figure 1. Figure 2.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) TURN-ON TIME, TURN-OFF TIME vs TEMPERATURE DATA SWITCH ON-RESISTANCE vs TEMPERATURE 5 5 RHS(on) - Data Switch ON Resistance - W TON/TOFF - Turn-ON/OFF Time - ms 4.5 4 Turn-On Time 3 2 Turn-Off Time 1 4 VDP/DM_OUT = 2.4 V, IDP/DM_IN = -15 mA 3.5 3 2.5 2 1.5 VDP/DM_OUT = 0 V, IDP/DM_IN = 30 mA 1 0.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) CTL1-3 THRESHOLD FALLING vs TEMPERATURE DIVIDER MODE DP/DM VOLTAGE vs TEMPERATURE 3 1.8 2.8 DP_IN/DM_IN Apple Output Voltage - V 2 CTL1-3 Falling Threshold - V 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 DM_IN Voltage 2.6 2.4 2.2 2 DP_IN Voltage 1.8 1.6 1.4 1.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) ON STATE CROSS-CHANNEL ISOLATION vs FREQUENCY XTALK - ON State Cross-Channel Isolation - dB 80 70 60 50 40 30 20 10 0 0.01 0.1 1 10 Frequency - GHz Figure 17. EYE DIAGRAM USING USB COMPLIANCE TEST PATTERN (with data switch) 0.5 0.5 0.4 0.4 0.3 0.3 Differential Signal - V Differential Signal - V EYE DIAGRAM USING USB COMPLIANCE TEST PATTERN (with no switch) 0.2 0.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) EYE DIAGRAM OF NEARLY IDEAL PULSE (with data switch) 200 mV/div. 200 mV/div. EYE DIAGRAM OF NEARLY IDEAL PULSE (with no switch) 348ps/div. 348ps/div. Figure 20. Figure 21. TURN ON INTO A SHORT CIRCUIT TURN ON INTO A SHORT CIRCUIT IN (2 V/div.) I_IN (0.5 A/div.) OUT (2 V/div.) IN (2 V/div.) I_IN (0.5 A/div.) 0.2 s/div Figure 22.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) RESPONSE TO A SHORT-CIRCUIT (from no-load condition) RESPONSE TO A SHORT-CIRCUIT (from no-load condition) IN (2 V/div.) OUT (2 V/div.) IN (2 V/div.) OUT (2 V/div.) I_IN (2 A/div.) I_IN (2 A/div.) 100 ms/div 1 ms/div Figure 24. Figure 25. RESPONSE TO A SHORT-CIRCUIT FROM NO LOAD CONDITION (with TPS51117EVM source) IN (1 V/div.) OUT (1 V/div.) I_IN (2 A/div.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com PARAMETER MEASUREMENT INFORMATION OUT RL CL Figure 27. Test Circuit tr VOUT tf 90% 10% 90% 10% UDG-10140 Figure 28. Voltage Waveform 50% VEN 50% tOFF tON 90% 10% VOUT UDG-10117 Figure 29. Voltage Waveforms IOS IOUT UDG-10118 tIOS Figure 30.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com tSVLD_CON_P OUT DP_IN DM_IN VLGC_SRC VDAT_REF 0V VLGC_SRC VDAT_REF 0V tDCPLOW tDCPLOW UDG-10119 Figure 31. DCP BC1.2 Operation CTL1-3 SDP or CDP OUT 0.7 V UDG-10120 tVBUS_REAPP Figure 32.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com Divider Only Mode 5V 1 Network Analyzer IN 50 W 10 Source Signal DP_IN DP_OUT DM_IN DM_OUT 3 50 W 50 W 11 2 GND 50 W 50 W 14 UDG-10141 Figure 33. OFF State Isolation (OIRR) 5V 1 IN 10 Network Analyzer DP_OUT 3 50 W 50 W 50 W 11 Source Signal DP_IN 50 W DM_IN DM_OUT 2 GND 14 50 W UDG-10121 Figure 34.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com SDP Mode 5V 1 IN 10 Network Analyzer DP_IN DP_OUT DM_IN DM_OUT 3 50 W 50 W 11 Source Signal 2 50 W GND 14 50 W UDG-10142 Figure 35. ON State Cross Channel Isolation (XTALK) 5V 1 Network Analyzer IN 50 W 10 DP_IN DP_OUT 3 Source Signal 50 W 50 W 11 DM_IN 50 W DM_OUT 2 GND 14 UDG-10122 Figure 36.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com SDP Mode 5V 1 Network Analyzer IN 50 W 10 DP_IN DP_OUT DM_IN DM_OUT 3 Source Signal 50 W 11 2 GND 50 W 14 UDG-10143 Figure 37. Bandwidth (BW) 5V 1 IN 10 DP_IN DP_OUT 3 50 W Network Analyzer 50 W 11 DM_IN Source Signal DM_OUT 2 GND 14 50 W UDG-10123 Figure 38.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com SDP Mode 5V 1 IN 10 + 11 DP_IN DP_OUT DM_IN DM_OUT GND 3 2 IOUT 14 UDG-10124 Figure 39.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com GENERAL INFORMATION Overview The following overview references various industry standards. It is always recommended to consult the most up-to-date standard to ensure the most recent and accurate information. Rechargeable portable equipment requires an external power source to charge its batteries. USB ports are a convenient location for charging because of an available 5-V power source.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com Standard Downstream Port (SDP) USB 2.0 An SDP is a traditional USB port that follows USB 2.0 and supplies a minimum of 500 mA per port. USB 2.0 communications is supported, and the host controller must be active to allow charging. Charging Downstream Port (CDP) A CDP is a USB port that follows USB 2.0 BC1.2 and supplies a minimum of 1.5 A per port. It provides power and meets USB 2.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com Logic Control Modes Both the TPS2540/40A and TPS2541/41A support the listed standards above for the SDP, CDP and DCP modes using the CTL1, CTL2, and CTL3 logic I/O control pins, although their truth tables are different as shown below. The different CTLx settings correspond to the different types of charge modes. Also, using the Auto-Detect Mode, the Divider Mode or BC1.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com Current-Limit Thresholds The TPS2540/40A/41/41A has two independent current-limit thresholds that are each programmed externally with a resistor. The following equation programs the typical current-limit threshold: ISHORT = 48000 RILIMx (3) where ISHORT is in mA and RILIMx is in kΩ. RILIMx corresponds to RILIM0 when ILIM_SEL is logic LO and to RILIM1 when ILIM_SEL is logic HI.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com APPLICATION INFORMATION Programming the Current Limit Threshold There are two overcurrent thresholds, which are user programmable via RILIM0 and RILIM1. The TPS2540/40A/41/41A uses an internal regulation loop to provide a regulated voltage on the ILIM0 and ILIM1 pins. The current-limit thresholds are proportional to the current sourced out of ILIM0 and ILIM1.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com Current Limit Threshold vs Current Limit Resistance 1000 900 ISHORT - Current Limit - mA 800 700 600 ISHORT_max 500 400 300 ISHORT_min 200 100 0 60 80 100 120 140 160 180 200 220 RILIM - Current Limit Resistance - kW Figure 42.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com CTL Pin Configuration for Notebook States The CTL pins provide the user with mode flexibility. Specifically, within a notebook, states S0, S3, S4, and S5 are important for controlling power consumption. For S0 the host controller is active, so either SDP or CDP should be selected. The notebook is responsible for sourcing at least 500mA when SDP is selected and at least 1500 mA when CDP is selected.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com Layout Guidelines TPS2540/40A/41/41A Placement: Place the TPS2540/40A/41/41A near the USB output connector and 150-µF OUT pin filter capacitor. Connect the exposed Power PAD to the GND pin and to the system ground plane using a via array. IN Pin Bypass Capacitance: Place the 0.1-µF bypass capacitor near the IN pin and make the connection using a low inductance trace.
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TPS2540, TPS2540A TPS2541, TPS2541A SLVSAG2C – OCTOBER 2010 – REVISED OCTOBER 2011 www.ti.com REVISION HISTORY Changes from Original (October 2010) to Revision A Page • Added TPS2540A device to the datasheet. .......................................................................................................................... 1 • Deleted All (Draft) notations for BC1.2. ................................................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com (4) 11-May-2014 There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jun-2014 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing TPS2540ARTER WQFN RTE 16 TPS2540ARTET WQFN RTE TPS2540RTER WQFN RTE TPS2540RTET WQFN TPS2540RTET SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 16 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 16 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jun-2014 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS2540ARTER WQFN RTE 16 3000 367.0 367.0 35.0 TPS2540ARTET WQFN RTE 16 250 210.0 185.0 35.0 TPS2540RTER WQFN RTE 16 3000 367.0 367.0 35.0 TPS2540RTET WQFN RTE 16 250 210.0 185.0 35.0 TPS2540RTET WQFN RTE 16 250 210.0 185.0 35.0 TPS2541ARTER WQFN RTE 16 3000 338.0 355.0 50.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.