Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - ELCs High side WFQFN 16

OUT

GND

FAULT

ILIM_LO

STATUS

(10 kW)

Power Switch EN

4.5V – 5.5V

TPS2543

0.1 uF

USB

Fault Signal

DM_IN

DP_IN

VBUS

D-

D+

GND

USB

Connector

To Portable Device à

Power Bus

CTL1

CTL2

CTL3

ILIM_SEL

ILIM Select

DM_OUT

DP_OUT

To Host Controller à

Mode Select I/O

STATUS

STATUS Signal

ILIM_HI

FAULT

(10 kW)

5 6 7 8

13141516

Thermal Pad

DM_OUT

DP_OUT

ILIM_SEL

CLT1

CLT2

CLT3

OUT

DM_IN

DP_IN

STATUS

ILIM_HI

ILIM_LO

GND

FAULT

TPS2543

www.ti.com

SLVSBA6 –FEBRUARY 2012

USB Charging Port Controller and Power Switch with Load Detection

Check for Samples: TPS2543

FEATURES

DESCRIPTION

The TPS2543 is a USB charging port controller and

• D+/D– CDP/DCP Modes per USB Battery

power switch with an integrated USB 2.0 high-speed

Charging Specification 1.2

data line (D+/D–) switch. The TPS2543 provides the

• D+/D– Shorted Mode per Chinese

electrical signatures on D+/D– to support the

Telecommunication Industry Standard YD/T

following charging schemes:

1591-2009

• USB Battery Charging Specification 1.2;

• D+/D– Divider Modes 2.0V/2.7V and 2.7/2.0V

• Chinese Telecom Standard YD/T 1591-2009;

Compliant with 1A and 2A Apple Mobile Digital

• Divider Mode, Compliant with Apple iPod, iPhone

Devices

(1A), and iPad (2A) Mobile Digital Devices.

(1)

• Automatic Selection of D+/D– Mode for an

The TPS2543 can be configured to automatically

Attached Device

select the D+/D– mode needed to charge an attached

• Supports Sleep-Mode Charging and

device. The TPS2543 provides load detection via the

Mouse/Keyboard (Low-Speed Only) Wake Up

STATUS pin that allows for both power supply control

in S4/S5 charging and the ability to manage port

• Load Detection for Both Power Supply Control

power in a multi-port application. Additionally, system

in S4/S5 Charging and Port Power

wake up (from S3) with a mouse/keyboard (low

Management in all Charge Modes

speed only) is fully supported in the TPS2343.

• Compatible with USB 2.0 and 3.0 Power Switch

The TPS2543 73-mΩ power-distribution switch is

Requirements

intended for applications where heavy capacitive

• 73-mΩ (typ) High-Side MOSFET

loads and short-circuits are likely to be encountered.

• Adjustable Current-Limit up to 3.0 A (typ)

Two programmable current thresholds provide

flexibility for setting current limits and load detect

• Operating Range: 4.5 V to 5.5 V

thresholds.

• Drop-In Compatible with TPS2540/40A

• Available in 16-Pin QFN (3x3) Package

• UL Listed and CB File No. E169910

APPLICATIONS

• USB Ports (Host and Hubs)

• Notebook Desktop PCs

(1) Apple, iPod, iPhone, and iPad are trademarks of Apple Inc.,

• Universal Wall Charging Adapters registered in the U.S. and other countries.

TPS2543 RTE PACKAGE AND TYPICAL APPLICATION DIAGRAM

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (37 pages)

PAGE 1
TPS2543 www.ti.com SLVSBA6 – FEBRUARY 2012 USB Charging Port Controller and Power Switch with Load Detection Check for Samples: TPS2543 FEATURES DESCRIPTION • The TPS2543 is a USB charging port controller and power switch with an integrated USB 2.0 high-speed data line (D+/D–) switch. The TPS2543 provides the electrical signatures on D+/D– to support the following charging schemes: • USB Battery Charging Specification 1.
PAGE 2
TPS2543 SLVSBA6 – FEBRUARY 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
PAGE 3
TPS2543 www.ti.com SLVSBA6 – FEBRUARY 2012 RECOMMENDED OPERATING CONDITIONS voltages are referenced to GND (unless otherwise noted) MIN VIN Input voltage, IN NOM MAX UNIT 4.5 5.5 V Input voltage, logic-level inputs, EN, CTL1, CTL2, CTL3, ILIM_SEL 0 5.5 V Input voltage, data line inputs, DP_IN, DM_IN, DP_OUT, DM_OUT 0 VIN V VIH High-level input voltage, EN, CTL1, CTL2, CTL3, ILIM_SEL 1.8 V VIL Low-level input voltage, EN, CTL1, CTL2, CTL3, ILIM_SEL 0.
PAGE 4
TPS2543 SLVSBA6 – FEBRUARY 2012 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Unless otherwise noted: –40 ≤ TJ ≤ 125°C, 4.5 V ≤ VIN ≤ 5.5 V, VEN = VIN, VILIM_SEL = VIN, VCTL1 = VCTL2 = VCTL3 = VIN. RFAULT = RSTATUS = 10 kΩ, RILIM_HI = 20 kΩ, RILIM_LO = 80.6 kΩ. Positive currents are into pins. Typical values are at 25°C. All voltages are with respect to GND. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT EN, ILIMSEL, CTL1, CTL2, CTL3 INPUTS Input pin rising logic threshold voltage 1 1.35 1.
PAGE 5
TPS2543 www.ti.com SLVSBA6 – FEBRUARY 2012 ELECTRICAL CHARACTERISTICS, HIGH-BANDWIDTH SWITCH Unless otherwise noted: –40 ≤ TJ ≤ 125°C, 4.5 V ≤ VIN ≤ 5.5 V, VEN = VIN, VILIM_SEL = VIN, VCTL1 = VCTL2 = VCTL3 = VIN. RFAULT = RSTATUS = 10 kΩ, RILIM_HI = 20 kΩ, RILIM_LO = 80.6 kΩ, Positive currents are into pins. Typical values are at 25°C. All voltages are with respect to GND.
PAGE 6
TPS2543 SLVSBA6 – FEBRUARY 2012 www.ti.com ELECTRICAL CHARACTERISTICS, CHARGING CONTROLLER Unless otherwise noted: –40 ≤ TJ ≤ 125°C, 4.5 V ≤ VIN ≤ 5.5 V, VEN = VIN, VILIM_SEL = VIN, VCTL1 = 0 V, VCTL2 = VCTL3 = VIN. RFAULT = RSTATUS = 10 kΩ, RILIM_HI = 20 kΩ, RILIM_LO = 80.6 kΩ, Positive currents are into pins. Typical values are at 25°C. All voltages are with respect to GND.
PAGE 7
TPS2543 www.ti.com SLVSBA6 – FEBRUARY 2012 TYPICAL CHARACTERISTICS POWER SWITCH ON RESISTANCE vs TEMPERATURE REVERSE LEAKAGE CURRENT vs TEMPERATURE 0.3 100 0.25 Reverse Leakage Current (µA) On Resistance (mΩ) 90 80 70 60 0.2 0.15 0.1 0.05 50 −40 −25 −10 5 20 35 50 65 80 Junction Temperature (°C) 95 0 −40 −25 −10 110 125 5 20 35 50 65 80 Junction Temperature (°C) 95 110 125 G001 G002 Figure 1. Figure 2.
PAGE 8
TPS2543 SLVSBA6 – FEBRUARY 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) DISABLED IN SUPPLY CURRENT vs TEMPERATURE ENABLED IN SUPPLY CURRENT - SDP vs TEMPERATURE 1.2 190 VIN = 5.5 V 180 Enabled IN Supply Current (µA) Disabled IN Supply Current (µA) 1 0.8 0.6 0.4 0.2 0 −40 VIN = 4.5 V VIN = 5 V VIN = 5.
PAGE 9
TPS2543 www.ti.com SLVSBA6 – FEBRUARY 2012 TYPICAL CHARACTERISTICS (continued) STATUS AND FAULT OUTPUT LOW VOLTAGE vs SINKING CURRENT DATA TRANSMISSION CHARACTERISTICS vs FREQUENCY 0 700 TJ = −40°C TJ = 25°C TJ = 125°C 600 500 Transmission Gain - dB Output Low Voltage (mV) -5 400 300 200 -10 -15 -20 100 VIN = 4.5 V 0 0 1 2 3 4 5 6 7 Sinking Current (mA) 8 9 10 -20 0.01 G009 0.1 1 10 Frequency - GHz Figure 9. Figure 10.
PAGE 10
TPS2543 SLVSBA6 – FEBRUARY 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) EYE DIAGRAM USING USB COMPLIANCE TEST PATTERN (with data switch) 0.5 0.5 0.4 0.4 0.3 0.3 0.2 0.2 Differential Signal (V) Differential Signal (V) EYE DIAGRAM USING USB COMPLIANCE TEST PATTERN (with no switch) 0.1 0 –0.1 –0.2 0.1 0 –0.1 –0.2 –0.3 –0.3 –0.4 –0.4 –0.5 –0.5 0 0.2 0.4 0.6 0.8 1 1.2 Time (ns) 1.4 1.6 1.8 0 2 0.2 0.4 G013 0.6 0.8 1 1.2 Time (ns) 1.4 1.6 Figure 13. Figure 14.
PAGE 11
TPS2543 www.ti.com SLVSBA6 – FEBRUARY 2012 TYPICAL CHARACTERISTICS (continued) POWER WAKE CURRENT LIMIT vs TEMPERATURE TURN-ON RESPONSE 59 Power Wake Current Limit (mA) 58 57 VOUT 2 V/div 56 VEN 5 V/div 55 54 53 52 −40 −25 −10 RLOAD = 5 Ω CLOAD = 150 µF IIN 500 mA/div t - Time - 1 ms/div 5 20 35 50 65 80 Junction Temperature (°C) 95 G021 110 125 G017 Figure 17. Figure 18.
PAGE 12
TPS2543 SLVSBA6 – FEBRUARY 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) DEVICE ENABLED INTO SHORT CIRCUIT - THERMAL CYCLING RILM_HI = 20 kΩ V/FAULT 5 V/div SHORT CIRCUIT to FULL LOAD RECOVERY V/FAULT 5 V/div VEN 5 V/div VOUT 2 V/div IIN 1 A/div IIN 2 A/div t - Time - 5 ms/div Figure 21. 12 RILIM_HI = 20 kΩ RLOAD = 5 Ω CLOAD = 150 µF G024 Submit Documentation Feedback t - Time - 2 ms/div Figure 22.
PAGE 13
TPS2543 www.ti.com SLVSBA6 – FEBRUARY 2012 PARAMETER MEASUREMENT DESCRIPTION OUT RL VOUT CL tr tf 90% 10% Figure 23. OUT Rise/Fall Test Load Figure 24. Power-On and Off Timing 5V VEN 50 % 50 % VOUT ton tDCHG toff 0V 90 % VOUT 10 % Figure 25. Enable Timing, Active High Enable Figure 26. OUT Discharge During Mode Change IOS IOUT tIOS Figure 27.
PAGE 14
TPS2543 SLVSBA6 – FEBRUARY 2012 www.ti.com DEVICE INFORMATION IN 1 DM_OUT 2 ILIM_HI ILIM_LO GND FAULT TPS2543 RTE PACKAGE (Top View) 16 15 14 13 12 OUT 11 DM_IN DP_IN Thermal Pad 4 9 5 6 7 8 CLT3 ILIM_SEL CLT2 10 CLT1 3 EN DP_OUT STATUS PIN FUNCTIONS NO. (1) 14 NAME TYPE (1) P DESCRIPTION Input voltage and supply voltage; connect 0.
PAGE 15
TPS2543 www.ti.
PAGE 16
TPS2543 SLVSBA6 – FEBRUARY 2012 www.ti.com DETAILED DESCRIPTION Overview The following overview references various industry standards. It is always recommended to consult the most upto-date standard to ensure the most recent and accurate information. Rechargeable portable equipment requires an external power source to charge its batteries. USB ports are a convenient location for charging because of an available 5 V power source.
PAGE 17
TPS2543 www.ti.com SLVSBA6 – FEBRUARY 2012 Standard Downstream Port (SDP) USB 2.0/USB 3.0 An SDP is a traditional USB port that follows USB 2.0/3.0 protocol and supplies a minimum of 500 mA/900 mA per port. USB 2.0/3.0 communications is supported, and the host controller must be active to allow charging. Charging Downstream Port (CDP) A CDP is a USB port that follows USB BC1.2 and supplies a minimum of 1.5 A per port. It provides power and meets USB 2.0 requirements for device enumeration. USB 2.
PAGE 18
TPS2543 SLVSBA6 – FEBRUARY 2012 www.ti.com D- Out VBUS TPS2543 USB Connector 2.7 V Host Side DAuto CDP Detect Detect 2V D+ D+ Out Device Side Figure 29. DCP Divider 1 Scheme D- Out VBUS TPS2543 2V Host Side D- 2.7 V USB Connector Auto CDP Detect Detect D+ D+ Out Device Side Figure 30. Divider 2 Scheme Divider 1 voltage configuration is required for 1A (max) iPhone device charging while Divider 2 will allow fast charging iPAD devices at 2.1A.
PAGE 19
TPS2543 www.ti.com SLVSBA6 – FEBRUARY 2012 DCP Forced Shorted / DCP Forced Divider 1 In this mode the device is permanently set to one of the DCP schemes (BC 1.2/ YD/T 1591-2009 or Divider 1) as commanded by its control pin setting per device truth table. High-Bandwidth Data Line Switch The TPS2543 passes the D+ and D- data lines through the device to enable monitoring and handshaking while supporting charging operation.
PAGE 20
TPS2543 SLVSBA6 – FEBRUARY 2012 www.ti.com Device Operation Please refer to the simplified device state diagram in Figure 31. Power-on-reset (POR) holds device in initial state while output is held in discharge mode. Any POR event will take the device back to initial state. After POR clears, device goes to the next state depending on the CTL lines as shown in Figure 31.
PAGE 21
TPS2543 www.ti.com SLVSBA6 – FEBRUARY 2012 Mouse/Key Board Wake Function The TPS2543 supports low speed HID (human interface device like mouse/key board) wake function. It does not support Full Speed HID. There are two scenarios under which wake on mouse is supported by the TPS2543. They are: 1. CDP/SDP2 (111X) to DCP/Auto (011X) 2. SDP1 (010X) to DCP/Auto (011X) Below description illustrates wake on mouse operation for scenario 1, same holds true for scenario 2.
PAGE 22
TPS2543 SLVSBA6 – FEBRUARY 2012 www.ti.com Device Truth Table (TT) Device TT lists all valid bias combinations for the three control pins CTL1-3 and ILIM_SEL pin and their corresponding charging mode. It is important to note that the TT purposely omits matching charging modes of the TPS2543 with global power states (S0-S5) as device is agnostic to system power states.
PAGE 23
TPS2543 www.ti.com SLVSBA6 – FEBRUARY 2012 Load Detect TPS2543 offers system designers unique power management strategy not available in the industry from similar devices. There are two power management schemes supported by the TPS5243 via the STATUS pin, they are: 1. Power Wake (PW) 2. Port Power Management (PPM) Either feature may be implemented in a system depending on power savings goals for the system.
PAGE 24
TPS2543 SLVSBA6 – FEBRUARY 2012 www.ti.
PAGE 25
TPS2543 www.ti.com SLVSBA6 – FEBRUARY 2012 Port Power Management Port power management is for systems that have multiple charging ports but cannot power them all simultaneously. Goal of this feature is two fold: 1. Enhances user experience since user does not have to search for charging port 2. Power supply only has to be designed for a reasonable charging load All ports are allowed to broadcast high current charging, charging current limit is based on ILIM_HI resistor setting.
PAGE 26
TPS2543 SLVSBA6 – FEBRUARY 2012 www.ti.com Current-Limit Settings The TPS2543 has two independent current limit settings that are each programmed externally with a resistor. The ILIM_HI setting is programmed with RILIM_HI connected between ILIM_HI and GND. The ILIM_LO setting is programmed with RILIM_LO connected between ILIM_LO and GND. Consult the Device Truth Table (Table 2) to see when each current limit is used.
PAGE 27
TPS2543 www.ti.com SLVSBA6 – FEBRUARY 2012 Many applications require that the current limit meet specific tolerance limits. When designing to these tolerance limits, both the tolerance of the TPS2543 current limit and the tolerance of the external programming resistor must be taken into account. The following equations approximate the TPS2543 minimum / maximum current limits to within a few mA and are appropriate for design purposes.
PAGE 28
TPS2543 SLVSBA6 – FEBRUARY 2012 www.ti.com Undervoltage Lockout (UVLO) The undervoltage lockout (UVLO) circuit disables the power switch until the input voltage reaches the UVLO turnon threshold. Built-in hysteresis prevents unwanted oscillations on the output due to input voltage drop from large current surges.
PAGE 29
PACKAGE OPTION ADDENDUM www.ti.
PAGE 30
PACKAGE OPTION ADDENDUM 14 –Jul – 2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) TPS2543RTER TPS2543RTET WQFN WQFN RTE RTE 16 16 3000 250 330.0 180.0 Reel Width W1 (mm) 12.4 12.4 Pack Material Page 1 A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant 3.3 3.3 3.3 3.3 1.1 1.1 8.0 8.0 12.0 13.
PAGE 31
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS2543RTER WQFN RTE 16 3000 367.0 367.0 35.0 TPS2543RTET WQFN RTE 16 250 210.0 185.0 35.
PAGE 32
PAGE 33
PAGE 34
PAGE 35
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS2543RTER WQFN RTE 16 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS2543RTET WQFN RTE 16 250 180.0 12.4 3.3 3.3 1.1 8.0 12.
PAGE 36
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS2543RTER WQFN RTE 16 3000 367.0 367.0 35.0 TPS2543RTET WQFN RTE 16 250 210.0 185.0 35.
PAGE 37
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.