Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - system monitor Reset/power-on reset SOT 23 6

FEATURES SUPPORTS DEFENSE, AEROSPACE,

APPLICATIONS

DESCRIPTION/ORDERING INFORMATION

1.2 V 3.3 V

TPS3808G12 TPS3808G33 DSP

SENSE V

SENSE

I/O

CORE

GPIO

GNDGNDGND

RESET MR

RESET

Typical Application Circuit

DBV (SOT-23) PACKAGE

(TOP VIEW)

SENSE

RESET

GND

TPS3808-EP

www.ti.com

................................................................................................................................................. SBVS103C – APRIL 2008 – REVISED NOVEMBER 2008

LOW QUIESCENT CURRENT, PROGRAMMABLE DELAY SUPERVISORY CIRCUIT

AND MEDICAL APPLICATIONS

• Power-On Reset Generator With Adjustable

• Controlled Baseline

Delay Time: 1.25 ms to 10 s

• One Assembly/Test Site

• Very Low Quiescent Current: 2.4 µ A Typical

• One Fabrication Site

• High Threshold Accuracy: 0.5% Typical

• Available in Military ( – 55 ° C/125 ° C)

• Fixed Threshold Voltages for Standard Voltage

Temperature Range

(1)

Rails from 0.9 V to 5 V and Adjustable Voltage

• Extended Product Life Cycle

Down to 0.4 V Are Available

• Extended Product-Change Notification

• Manual Reset ( MR) Input

• Product Traceability

• Open-Drain RESET Output

• Temperature Range: – 55 ° C to 125 ° C

• Small SOT23 Package

• DSP or Microcontroller Applications

• Notebook/Desktop Computers

• PDAs/Hand-Held Products

• Portable/Battery Powered Products

• FPGA/ASIC Applications

(1) Custom temperature ranges available

The TPS3808xxx family of microprocessor supervisory circuits monitors system voltages from 0.4 V to 5.0 V,

asserting an open-drain RESET signal when the SENSE voltage drops below a preset threshold or when the

manual reset ( MR) pin drops to a logic low. The RESET output remains low for the user-adjustable delay time

after the SENSE voltage and manual reset ( MR) return above the respective thresholds.

The TPS3808 uses a precision reference to achieve 0.5% threshold accuracy for V

≤ 3.3 V. The reset delay

time can be set to 20 ms by disconnecting the C

pin, 300 ms by connecting the C

pin to V

using a resistor,

or can be user-adjusted between 1.25 ms and 10 s by connecting the C

pin to an external capacitor. The

TPS3808 has a very low typical quiescent current of 2.4 µ A, so it is well-suited to battery-powered applications. It

is available in a small SOT23 package, and is fully specified over a temperature range of – 55 ° C to +125 ° C (T

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2 All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (16 pages)

PAGE 1
TPS3808-EP www.ti.com ................................................................................................................................................. SBVS103C – APRIL 2008 – REVISED NOVEMBER 2008 LOW QUIESCENT CURRENT, PROGRAMMABLE DELAY SUPERVISORY CIRCUIT FEATURES SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS 1 • Power-On Reset Generator With Adjustable Delay Time: 1.25 ms to 10 s • Very Low Quiescent Current: 2.4 µA Typical • High Threshold Accuracy: 0.
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TPS3808-EP SBVS103C – APRIL 2008 – REVISED NOVEMBER 2008 ................................................................................................................................................. www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
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TPS3808-EP www.ti.com ................................................................................................................................................. SBVS103C – APRIL 2008 – REVISED NOVEMBER 2008 ELECTRICAL CHARACTERISTICS 1.7 V ≤ VDD ≤ 6.5 V, RLRESET = 100 kΩ, CLRESET = 50 pF, over operating temperature range (TJ = –55°C to +125°C), unless otherwise noted. Typical values are at TJ = +25°C.
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TPS3808-EP SBVS103C – APRIL 2008 – REVISED NOVEMBER 2008 ................................................................................................................................................. www.ti.com FUNCTIONAL BLOCK DIAGRAMS VDD VDD VDD TPS3808G01 Adjustable Voltage VDD 90k 90k RESET MR SENSE Reset Logic Timer Reset Logic Timer R1 − − SENSE RESET MR CT + CT + R2 0.4V VREF 0.4V VREF R1 + R2 = 4MΩ GND GND Adjustable Voltage Version Fixed Voltage Version Figure 1.
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TPS3808-EP www.ti.com ................................................................................................................................................. SBVS103C – APRIL 2008 – REVISED NOVEMBER 2008 TIMING DIAGRAM VDD 0.8V 0.0V RESET tD = Reset Delay tD tD tD = Undefined State SENSE VIT + VHYS VIT MR 0.7VDD 0.3VDD Time Figure 2.
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TPS3808-EP SBVS103C – APRIL 2008 – REVISED NOVEMBER 2008 ................................................................................................................................................. www.ti.com TYPICAL CHARACTERISTICS At TJ = +25°C, VDD = 3.3 V, RLRESET = 100kΩ, and CLRESET = 50pF, unless otherwise noted. SUPPLY CURRENT vs SUPPLY VOLTAGE RESET TIMEOUT PERIOD vs CT 4.0 100 3.5 IDD (µA) RESET Timeout (sec) +125_ C 3.0 +85_ C 2.5 2.0 +25_C 1.5 1.0 10 −40°C, +25°C, +125°C 1 0.
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TPS3808-EP www.ti.com ................................................................................................................................................. SBVS103C – APRIL 2008 – REVISED NOVEMBER 2008 TYPICAL CHARACTERISTICS (continued) At TJ = +25°C, VDD = 3.3 V, RLRESET = 100kΩ, and CLRESET = 50pF, unless otherwise noted. LOW-LEVEL RESET VOLTAGE vs RESET CURRENT VOL Low−Level RESET Voltage (V) 0.8 0.7 0.6 0.5 0.4 VDD = 3.3V 0.3 0.2 0.1 VDD = 6.5V 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.
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TPS3808-EP SBVS103C – APRIL 2008 – REVISED NOVEMBER 2008 ................................................................................................................................................. www.ti.com DEVICE OPERATION The TPS3808 microprocessor supervisory product family is designed to assert a RESET signal when either the SENSE pin voltage drops below VIT or the manual reset (MR) is driven low.
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TPS3808-EP www.ti.com ................................................................................................................................................. SBVS103C – APRIL 2008 – REVISED NOVEMBER 2008 1.2V affected by the choice of resistor. Figure 14b shows a fixed 20-ms delay time by leaving the CT pin open. Figure 14c shows a ground referenced capacitor connected to CT for a user-defined program time between 1.25 ms and 10 s. 3.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 20-Jul-2010 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) TPS3808G01MDBVTEP SOT-23 DBV 6 250 179.0 8.4 TPS3808G33MDBVREP SOT-23 DBV 6 3000 179.0 8.4 Pack Materials-Page 1 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3.2 3.2 1.4 4.0 8.0 Q3 3.2 3.2 1.4 4.0 8.
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PACKAGE MATERIALS INFORMATION www.ti.com 20-Jul-2010 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS3808G01MDBVTEP SOT-23 DBV TPS3808G33MDBVREP SOT-23 DBV 6 250 203.0 203.0 35.0 6 3000 203.0 203.0 35.
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