Datasheet
1
FEATURES DESCRIPTION
APPLICATIONS
RESET
GND
MR
6
5
4
V
DD
SENSE
C
T
1
2
3
DRVPACKAGE
2mmx2mmQFN
(TOPVIEW)
Power
PAD
DBVPACKAGE
SOT23
(TOPVIEW)
V
DD
SENSE
C
T
RESET
GND
MR
1
2
3
6
5
4
1.2V 3.3V
TPS3808G12 TPS3808G33 DSP
SENSE V
DD
V
DD
SENSE
V
I/O
V
CORE
GPIO
GNDGNDGND
RESET MR
C
T
C
T
RESET
TypicalApplicationCircuit
TPS3808
www.ti.com
.......................................................................................................................................................... SBVS050J – MAY 2004 – REVISED AUGUST 2008
Low Quiescent Current, Programmable-Delay
Supervisory Circuit
23
• Power-On Reset Generator with Adjustable
The TPS3808xxx family of microprocessor
Delay Time: 1.25ms to 10s
supervisory circuits monitor system voltages from
0.4V to 5.0V, asserting an open-drain RESET signal
• Very Low Quiescent Current: 2.4 µ A typ
when the SENSE voltage drops below a preset
• High Threshold Accuracy: 0.5% typ
threshold or when the manual reset ( MR) pin drops to
• Fixed Threshold Voltages for Standard Voltage
a logic low. The RESET output remains low for the
Rails from 0.9V to 5V and Adjustable Voltage
user-adjustable delay time after the SENSE voltage
Down to 0.4V Are Available
and manual reset ( MR) return above the respective
thresholds.
• Manual Reset ( MR) Input
The TPS3808 uses a precision reference to achieve
• Open-Drain RESET Output
0.5% threshold accuracy for V
IT
≤ 3.3V. The reset
• Temperature Range: – 40 ° C to +125 ° C
delay time can be set to 20ms by disconnecting the
• Small SOT23 and 2mm × 2mm QFN Packages
C
T
pin, 300ms by connecting the C
T
pin to V
DD
using
a resistor, or can be user-adjusted between 1.25ms
and 10s by connecting the C
T
pin to an external
capacitor. The TPS3808 has a very low typical
• DSP or Microcontroller Applications
quiescent current of 2.4 µ A so it is well-suited to
• Notebook/Desktop Computers
battery-powered applications. It is available in a small
• PDAs/Hand-Held Products
SOT23 and an ultra-small 2mm × 2mm QFN
• Portable/Battery-Powered Products
PowerPAD™ package, and is fully specified over a
• FPGA/ASIC Applications
temperature range of – 40 ° C to +125 ° C (T
J
).
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2 PowerPAD is a trademark of Texas Instruments.
3 All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 2004 – 2008, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.