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SLUS589B− NOVEMBER 2003 − REVISED FEBRUARY 2005

 

  

www.ti.com

FEATURES

Operating Input Voltage 2.25 V to 5.5 V

D Output Voltage as Low as 0.7 V

D 1% Internal 0.7 V Reference

D Predictive Gate Drivet N-Channel MOSFET

Drivers for Higher Efficiency

D Externally Adjustable Soft-Start and

Overcurrent Limit

D Fixed-Frequency Voltage-Mode Control

− TPS40007, 300 kHz

− TPS40009, 600 kHz

D Source/Sink with V

OUT

Prebias

D 10-Lead MSOP PowerPadt Package for

Higher Performance

D Thermal Shutdown

D Internal Boostrap Diode

SIMPLIFIED APPLICATION DIAGRAM

APPLICATIONS

Networking Equipment

D Telecom Equipment

D Base Stations

D Servers

D DSP Power

D Power Modules

DESCRIPTION

The TPS4000x are controllers for low-voltage,

non-isolated synchronous buck regulators. These

controllers drive an N-channel MOSFET for the

primary buck switch, and an N-channel MOSFET

for the synchronous rectifier switch, thereby

achieving very high-efficiency power conversion. In

addition, the device controls the delays from main

switch off to rectifier turn-on and from rectifier

turn-off to main switch turn-on in such a way as to

minimize diode losses (both conduction and

recovery) in the synchronous rectifier with TI’s

proprietary Predictive Gate Drivet technology. The

reduction in these losses is significant and increases

efficiency. For a given converter power level, smaller

FETs can be used, or heat sinking can be reduced

or even eliminated.

UDG−03161

OUT

1 ILIM 10BOOT

2FB 9HDRV

3 COMP

8SW

4 SS/SD

7VDD

5 GND 6LDRV

TPS40007

TPS40009

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PowerPADt and Predictive Gate Drivet are trademarks of Texas Instruments Incorporated.

Summary of content (28 pages)

PAGE 1
SLUS589B− NOVEMBER 2003 − REVISED FEBRUARY 2005 FEATURES D Operating Input Voltage 2.25 V to 5.5 V D Output Voltage as Low as 0.7 V D 1% Internal 0.
PAGE 2
SLUS589B− NOVEMBER 2003 − REVISED FEBRUARY 2005 DESCRIPTION (continued) The current-limit threshold is adjustable with a single resistor connected to the device. The TPS4000x controllers implement a closed-loop soft start function. Startup ramp time is set by a single external capacitor connected to the SS/SD pin. The SS/SD pin is also used for shutdown.
PAGE 3
SLUS589B− NOVEMBER 2003 − REVISED FEBRUARY 2005 ELECTRICAL CHARACTERISTICS temperature range, TA = −40_C to 85_C, VDD = 5.0 V, TA = TJ; all parameters measured at zero power dissipation (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT INPUT SUPPLY VDD VHGATE IDD UVLO Input voltage range 2.25 High-side gate voltage 5.5 6 V Shutdown current VBOOT − VSW SS/SD = 0 V, 0.25 0.45 Quiescent current FB = 0.8 V 1.4 2.
PAGE 4
SLUS589B− NOVEMBER 2003 − REVISED FEBRUARY 2005 ELECTRICAL CHARACTERISTICS temperature range, TA = −40_C to 85_C, VDD = 5.0 V, TA = TJ; all parameters measured at zero power dissipation (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT OUTPUT DRIVER RHDHI HDRV pull-up resistance VBOOT−VSW = 3.3 V, ISOURCE = −100 mA 3 5.5 RHDLO HDRV pull-down resistance VBOOT − VSW = 3.3 V, ISINK = 100 mA 1.
PAGE 5
SLUS589B− NOVEMBER 2003 − REVISED FEBRUARY 2005 Terminal Functions TERMINAL I/O DESCRIPTION NAME NO. BOOT 10 O Provides a bootstrapped supply for the topside MOSFET driver, enabling the gate of the topside MOSFET to be driven above the input supply rail COMP 3 O Output of the error amplifier FB 2 I Inverting input of the error amplifier. In normal operation the voltage at this pin is the internal reference level of 700 mV. GND 5 − Power supply return for the device.
PAGE 6
SLUS589B− NOVEMBER 2003 − REVISED FEBRUARY 2005 APPLICATION INFORMATION The TPS4000x series of synchronous buck controller devices is optimized for high-efficiency dc-to-dc conversion in non-isolated distributed power systems. A typical application circuit is shown in Figure 1. The TPS40007 and TPS40009 are the controllers of choice for general-purpose synchronous buck designs.
PAGE 7
SLUS589B− NOVEMBER 2003 − REVISED FEBRUARY 2005 APPLICATION INFORMATION ERROR AMPLIFIER The error amplifier has a bandwidth of greater than 5 MHz, with open loop gain of at least 55 dB. The COMP output voltage is clamped to a level above the oscillator ramp in order to improve large-scale transient response. OSCILLATOR The oscillator uses an internal resistor and capacitor to set the oscillation frequency. The ramp waveform is a sawtooth at the PWM frequency with a peak voltage of 1.
PAGE 8
SLUS589B− NOVEMBER 2003 − REVISED FEBRUARY 2005 APPLICATION INFORMATION GND Channel Conduction Body Diode Conduction Fixed Delay Adaptive Delay Predictive Delay UDG−03166 Figure 2. Switch Node Waveforms for Synchronous Buck Converter SHORT CIRCUIT PROTECTION Overcurrent conditions in the TPS4000x are sensed by detecting the voltage across the main MOSFET while it is on.
PAGE 9
SLUS589B− NOVEMBER 2003 − REVISED FEBRUARY 2005 APPLICATION INFORMATION Detailed Description During each switching cycle, a comparator looks at the voltage across the top side MOSFET while it is on. This comparator is enabled after the SW node reaches a voltage greater than (VDD−1.2 V) followed by a 100-ns blanking time. If the voltage across that MOSFET exceeds the programmed voltage, the current-switching pulse is terminated and a 3-bit counter is incremented by one count.
PAGE 10
SLUS589B− NOVEMBER 2003 − REVISED FEBRUARY 2005 APPLICATION INFORMATION Figure 4 shows the behavior of key signals during initial startup, during a fault and a successfully fault recovery. At time t0, power is applied to the converter. The voltage on the soft-start capacitor (VCSS) begins to ramp up. At t1, the soft-start period is completed and the converter is regulating its output at the desired voltage level.
PAGE 11
SLUS589B− NOVEMBER 2003 − REVISED FEBRUARY 2005 APPLICATION INFORMATION SETTING THE CURRENT LIMIT Connecting a resistor from VDD to ILIM sets the current limit. A 15-µA current sink internal to the device causes a voltage drop at ILIM that becomes the short circuit threshold. Ensure that (VDD−0.8 V) ≤ VILIM ≤ VDD. The tolerance of the current sink is too loose to do an accurate current limit. The main purpose is for hard fault protection of the power switches.
PAGE 12
SLUS589B− NOVEMBER 2003 − REVISED FEBRUARY 2005 APPLICATION INFORMATION A shutdown feature can be implemented as shown in Figure 6. The device shuts down when the voltage at the SS/SD pin falls below 260 mV. Because of this limitation, it is recommended that a MOSFET be used as the controlling device, as in Figure 6. During shutdown, the total leakage current on the SW pin (ISW) is less than 2 µA.
PAGE 13
SLUS589B− NOVEMBER 2003 − REVISED FEBRUARY 2005 APPLICATION INFORMATION Figure 8 shows startup waveforms of a 1.2-V VOUT voltage under different pre-bias scenarios. The first trace is when the output voltage starts with zero pre−bias. The second and third traces, respectively, the pre-bias levels are 0.5 V and 1.0 V. VIN = 5 V VOUT = 1.2 V (200 mV/div) PREBIAS = 1 V VHDRV PREBIAS = 0.5 V PREBIAS = 0 V VLDRV t − Time − 2 µs/div t − Time − 500 µs/div Figure 7.
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SLUS589B− NOVEMBER 2003 − REVISED FEBRUARY 2005 APPLICATION INFORMATION VDD 3.3 V 22 µF TPS40009 15 kΩ 1 nF 1 ILIM BOOT 10 2 FB HDRV FDS6894A 1.0 µH 9 VOUT 1.2 V 5A 1 µF 8.66 kΩ 68 pF 22 µF 3 COMP SW 8 4 SS/SD VDD 7 5 GND LDRV 6 2.2 Ω 22 µF 22 µF FDS6894A 4.7 nF PWP 1 µF 0.0033 µF 12.1 kΩ 470 pF 1 kΩ 16.9 kΩ UDG−03164 Figure 9. Small-Form Factor Converter for 3.3 V to 1.2 V at 5 A. 14 www.ti.
PAGE 15
+ 3.3 V VDD 330 µF 4.7 nF 6.19 kΩ 82 pF 2.2 nF 330 µF + www.ti.com LDRV VDD SW HDRV 6 7 8 9 BOOT 10 PWP GND SS/SD 4 5 COMP FB 2 3 ILIM TPS40007 1 11 kΩ 22 µF 1 µF 1 µF 22 µF Si4866DY Si4866DY 10 nF 2.2 Ω 1.5 µH 22 µF 22 µF 14 kW 22 µF 392 Ω 10 kΩ 22 µF 22 µF 1200 pF VOUT 1.2 V 10 A SLUS589B− NOVEMBER 2003 − REVISED FEBRUARY 2005 APPLICATION INFORMATION UDG−04014 Figure 10. High-Current Converter for 3.3 V to 1.2 V at 10 A.
PAGE 16
SLUS589B− NOVEMBER 2003 − REVISED FEBRUARY 2005 APPLICATION INFORMATION VDD 2.5 V 100 pF 22 µF FDS6894A TPS40009 1500 pF 22 µF BAT54 15 kΩ 1 µF 1 ILIM BOOT 10 2 FB HDRV 9 3 COMP SW 8 4 SS/SD VDD 7 1.0 µH L1 VOUT 1.2 V 5A 5.62 kΩ 2.2 Ω 22 µF 4.7 nF 22 µF FDS6894A 5 GND LDRV PWP 6 1 µF 3.3 nF 6.19 kΩ 536 Ω 1000 pF 8.66 kΩ UDG−04028 Figure 11. Ultra-Low-Input Voltage Converter for 2.5 V to 1.2 V at 5 A 16 www.ti.
PAGE 17
SLUS589B− NOVEMBER 2003 − REVISED FEBRUARY 2005 APPLICATION INFORMATION VIN = 3.3 V 1 2 + J1 3 + C2 330 µF C1 330 µF 4 R2 16.2 kΩ TPS40007DGQ 1 ILIM C7 1.5 nF 2 FB R4 5.9 kΩ 3 COMP 4 SS/SD C11 180 pF C13 4.7 nF C3 22 µF C5 22 µF C4 22 µF C6 1 µF Q1 Si4866DY BOOT 10 L1 1.0 µH HDRV 9 VOUT = 2.5 V 10 A SW 8 1 Q2 Si4866DY VDD 7 5 GND LDRV 6 PWP R3 2.2 Ω + 2 + 3 J2 C12 10n F C8 470 µF C9 470 µF 4 C14 1 µF R6 10 kΩ R7 698 Ω C15 6.8 nF R8 3.
PAGE 18
SLUS589B− NOVEMBER 2003 − REVISED FEBRUARY 2005 APPLICATION INFORMATION Layout Considerations Successful operation of the TPS4000x controllers is dependent upon proper converter layout and grounding techniques. High current returns for the SR MOSFET’s source, and ground connection of the input and output capacitors, should be kept on a single ground plane. Bypassing capacitors at the device should return closely to the GND (pin 5) of the device.
PAGE 19
SLUS589B− NOVEMBER 2003 − REVISED FEBRUARY 2005 TYPICAL CHARACTERISTICS OSCILLATOR FREQUENCY PERCENT CHANGE vs INPUT VOLTAGE OSCILLATOR FREQUENCY PERCENT CHANGE vs TEMPERATURE ∆fOSC − Change in Oscillator Frequency − % ∆fOSC − Change in Oscillator Frequency − % 6 5 4 3 2 1 0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 1 0 −1 −2 −3 −4 −5 −6 5.
PAGE 20
SLUS589B− NOVEMBER 2003 − REVISED FEBRUARY 2005 TYPICAL CHARACTERISTICS CURRENT LIMIT SINK CURRENT vs INPUT VOLTAGE CURRENT LIMIT SINK CURRENT vs TEMPERATURE 16.0 15.0 ILIMIT − Sink Current Limit − µA ILIMIT − Sink Current Limit − µA 15.5 14.5 14.0 13.5 15.5 15.0 14.5 13.0 12.5 14.0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.
PAGE 21
PACKAGE OPTION ADDENDUM www.ti.
PAGE 22
PACKAGE OPTION ADDENDUM www.ti.com (4) 1-Nov-2013 There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.
PAGE 23
PACKAGE MATERIALS INFORMATION www.ti.com 10-Feb-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS40007DGQR MSOPPower PAD DGQ 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TPS40007DGQR MSOPPower PAD DGQ 10 2500 330.0 12.4 5.3 3.3 1.3 8.0 12.0 Q1 TPS40009DGQR MSOPPower PAD DGQ 10 2500 330.0 12.4 5.3 3.3 1.3 8.0 12.
PAGE 24
PACKAGE MATERIALS INFORMATION www.ti.com 10-Feb-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS40007DGQR MSOP-PowerPAD DGQ 10 2500 364.0 364.0 27.0 TPS40007DGQR MSOP-PowerPAD DGQ 10 2500 346.0 346.0 35.0 TPS40009DGQR MSOP-PowerPAD DGQ 10 2500 346.0 346.0 35.0 TPS40009DGQR MSOP-PowerPAD DGQ 10 2500 364.0 364.0 27.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.