Datasheet

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OUT

BIAS

V 0.6 V 1

BIAS

COMPx

UDG-11111

VREF

OUTx

FBx

AGND

TPS40322

SLUSAF8D –JUNE 2011–REVISED JANUARY 2014

www.ti.com

FUNCTIONAL DESCRIPTION

General Description/Control Architecture

The TPS40322 is a flexible synchronous buck controller. It can be used as a dual-output controller, or as a two-

phase, single-output controller. It operates with a wide input range from 3 V to 20 V and can generate an

accurate regulated output as low as 600 mV.

In dual output mode, voltage mode control with input feed-forward architecture is implemented. With this

architecture, the benefits are less noise sensitivity, no control instability issues for small DCR applications, and a

smaller minimum controllable on-time, often desired for high conversion ratio applications.

In two-phase, single-output mode, a current-sharing loop is implemented to ensure a balance of current between

phases. Because the induced error current signal to the loop is much smaller when compared to the PWM ramp

amplitude, the control loop is modeled as voltage mode with input feed-forward.

DESIGN NOTE

• When the device is operating in dual output mode, DIFFO must be floating or tied to

BP6.

Voltage Reference

The 600-mV bandgap cell is internally connected to the non-inverting input of the error amplifier. The reference

voltage is trimmed with the error amplifier in a unity gain configuration to remove amplifier offset from the final

regulation voltage. The 0.5-% tolerance on the reference voltage allows the user to design a very accurate power

supply.

Output Voltage Setting

The output voltages of the TPS40322 are set by using external feedback resistor dividers as shown in Figure 15 .

The regulated output voltage (V

OUT

) is determined by Equation 1.

Figure 15. Setting the Output Voltage

(1)