Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - voltage regulators - DC DC switch controllers D-CAP™ VQFN 24

VO1

PGOOD

VBST1

DRVH1

VO2

VREG3

VBST2

DRVH2

TPS51125RGE

LL1

DRVL1

LL2

DRVL2

13 14 15 16 17 18

EN0

SKIPSEL

GND

VIN

VREG5

VCLK

6 5 4 3 2 1

ENTRIP2

VFB2

TONSEL

VREF

VFB1

ENTRIP1

PowerPAD

220 nF

20 kW 20 kW 30 kW

100 kW

VREG5

33 m F

5.1 W

0.1 m F

130 kW130 kW

3.3 m F

330 m F

VO1

5 V

VIN

VREG5

VIN

10 m F x 2

VIN

5.5 V

28 V

EN0

5.1 W

0.1 m F

3.3 m F

330 m F

VO2

3.3 V

10 m F x 2

10 m F

13 kW

UDG-09019

VIN

100 nF 1 m F

15 V

100 nF

620 kW

VO1VREF

TPS51125

www.ti.com

SLUS786G –OCTOBER 2007–REVISED JUNE 2012

Dual-Synchronous, Step-Down Controller with Out-of-Audio™ Operation

and 100-mA LDOs for Notebook System Power

Check for Samples: TPS51125

FEATURES

APPLICATIONS

• Wide Input Voltage Range: 5.5 V to 28 V

• Notebook Computers

• Output Voltage Range: 2 V to 5.5 V • I/O Supplies

• Built-in 100-mA 5-V/3.3-V LDO with Switches • System Power Supplies

• Built-in 1% 2-V Reference Output

DESCRIPTION

• With/Without Out-of-Audio™ Mode Selectable

The TPS51125 is a cost effective, dual-synchronous

Light Load and PWM only Operation

buck controller targeted for notebook system power

• Internal 1.6-ms Voltage Servo Softstart

supply solutions. It provides 5-V and 3.3-V LDOs and

• Adaptive On-Time Control Architecture with

requires few external components. The 270-kHz

VCLK output can be used to drive an external charge

Four Selectable Frequency Setting

pump, generating gate drive voltage for the load

• 4500 ppm/°C R

DS(on)

Current Sensing

switches without reducing the main converter’s

• Built-In Output Discharge

efficiency. The TPS51125 supports high efficiency,

• Power Good Output

fast transient response and provides a combined

power-good signal. Out-of-Audio™ mode light-load

• Built-in OVP/UVP/OCP

operation enables low acoustic noise at much higher

• Thermal Shutdown (Non-latch)

efficiency than conventional forced PWM operation.

• QFN, 24-Pin (RGE)

Adaptive on-time D-CAP™ control provides

convenient and efficient operation. The part operates

with supply input voltages ranging from 5.5 V to 28 V

and supports output voltages from 2 V to 5.5 V. The

TPS51125 is available in a 24-pin QFN package and

is specified from -40°C to 85°C ambient temperature

range.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2Out-of-Audio, D-CAP are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (37 pages)

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TPS51125 www.ti.com SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 Dual-Synchronous, Step-Down Controller with Out-of-Audio™ Operation and 100-mA LDOs for Notebook System Power Check for Samples: TPS51125 FEATURES APPLICATIONS • • • • • • • • 1 2 • • • • • • • • Wide Input Voltage Range: 5.5 V to 28 V Output Voltage Range: 2 V to 5.5 V Built-in 100-mA 5-V/3.3-V LDO with Switches Built-in 1% 2-V Reference Output With/Without Out-of-Audio™ Mode Selectable Light Load and PWM only Operation Internal 1.
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TPS51125 SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 www.ti.com ORDERING INFORMATION ORDERABLE DEVICE NUMBER TA PACKAGE -40°C to 85°C Plastic Quad Flat Pack (QFN) TPS51125RGET TPS51125RGER OUTPUT SUPPLY PINS 24 MINIMUM QUANTITY Tape-and-Reel 250 Tape-and-Reel 3000 ECO PLAN Green (RoHS and no Sb/Br) ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) VALUE PARAMETER Input voltage range (1) MIN MAX VBST1, VBST2 –0.3 36 VIN –0.
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TPS51125 www.ti.com SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 ELECTRICAL CHARACTERISTICS over operating free-air temperature range, VIN = 12 V (unless otherwise noted) PARAMETER CONDITIONS MIN TYP MAX UNIT SUPPLY CURRENT IVIN1 VIN supply current1 VIN current, T A = 25°C, no load, VO1 = 0 V, VO2 = 0 V, EN0=open, ENTRIPx = 5 V, VFB1 = VFB2 = 2.05 V IVIN2 VIN supply current2 VIN current, TA = 25°C, no load, VO1 = 5 V, VO2 = 3.3 V, EN0=open, ENTRIPx = 5 V, VFB1 = VFB2 = 2.
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TPS51125 SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 www.ti.com ELECTRICAL CHARACTERISTICS (continued) over operating free-air temperature range, VIN = 12 V (unless otherwise noted) PARAMETER CONDITIONS MIN TYP MAX UNIT VOUT DISCHARGE IDischg VOUT discharge current ENTRIPx = 0 V, VOx = 0.5 V 10 60 mA OUTPUT DRIVERS RDRVH DRVH resistance RDRVL DRVL resistance tD Dead time Source, VBSTx - DRVHx = 100 mV 4 8 1.5 4 4 8 Sink, VDRVLx = 100 mV 1.
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TPS51125 www.ti.com SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 ELECTRICAL CHARACTERISTICS (continued) over operating free-air temperature range, VIN = 12 V (unless otherwise noted) PARAMETER CONDITIONS MIN TYP MAX UNIT LOGIC THRESHOLD AND SETTING CONDITIONS Shutdown VEN0 EN0 setting voltage IEN0 EN0 current VEN ENTRIP1, ENTRIP2 threshold 0.4 Enable, VCLK = off 0.8 Enable, VCLK = on 2.4 1.6 VEN0 = 0.2 V 2 3.5 5 VEN0 = 1.5 V 1 1.75 2.
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TPS51125 SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 www.ti.com DEVICE INFORMATION Table 1. TERMINAL FUNCTIONS TABLE TERMINAL NAME NO. I/O DESCRIPTION VIN 16 I High voltage power supply input for 5-V/3.3-V LDO. GND 15 - Ground. VREG3 8 O 3.3-V power supply output. Connect 10-μF ceramic capacitor to Power GND near the device. A 1-μF ceramic capacitor is acceptable when not loaded. VREG5 17 O 5-V power supply output. Connect 33-μF ceramic capacitor to Power GND near the device.
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TPS51125 www.ti.
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TPS51125 SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 www.ti.
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TPS51125 www.ti.
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TPS51125 SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 www.ti.com TYPICAL CHARACTERISTICS VIN SUPPLY CURRENT1 vs JUNCTION TEMPERATURE VIN SUPPLY CURRENT1 vs INPUT VOLTAGE 800 800 IVIN1 - VIN Supply Current1 - mA IVIN1 - VIN Supply Current1 - mA 700 700 600 500 400 300 200 100 600 500 400 300 200 100 0 -50 0 50 100 0 150 5 TJ - Junction Temperature - °C 10 15 20 25 V IN - Input Voltage - V Figure 1. Figure 2.
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TPS51125 www.ti.com SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 TYPICAL CHARACTERISTICS (continued) VIN STANDBY CURRENT vs INPUT VOLTAGE VIN STANDBY CURRENT vs JUNCTION TEMPERATURE 250 IVINSTBY – VIN Standby Current – nA IVINSTBY - VIN Standby Current - mA 250 200 150 100 50 0 200 150 100 50 0 50 0 50 100 5 150 10 TJ - Junction Temperature - °C Figure 5. 20 25 Figure 6.
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TPS51125 SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) CURRENT SENSE CURRENT vs JUNCTION TEMPERATURE VCLK FREQUENCY vs JUNCTION TEMPERATURE 325 13 300 f CLK - VCLK Frequency - kHz IENTRIP - Current Sense Current - mA 14 12 11 10 9 8 275 250 225 200 7 175 -50 6 -50 0 50 100 150 0 50 100 T J - Junction Temperature - °C T J - Junction Temperature - °C Figure 9. Figure 10.
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TPS51125 www.ti.com SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 TYPICAL CHARACTERISTICS (continued) SWITCHING FREQUENCY vs INPUT VOLTAGE SWITCHING FREQUENCY vs INPUT VOLTAGE 500 500 CH2 400 f SW - Swithching Frequency - kHz f SW - Swithching Frequency - kHz TONSEL = 3.3V 300 CH1 200 100 0 CH2 TONSEL = 5V 400 CH1 300 200 100 0 6 8 10 12 14 16 18 20 22 24 26 6 8 10 V IN - Input Voltage - V 12 14 16 Figure 13. 20 22 24 26 Figure 14.
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TPS51125 SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) SWITCHING FREQUENCY vs OUTPUT CURRENT SWITCHING FREQUENCY vs OUTPUT CURRENT 500 500 400 TONSEL = 5V f SW - Swithching Frequency - kHz f SW - Swithching Frequency - kHz TONSEL = 3.3V CH2 PWM Only 300 CH1 PWM Only 200 CH2 Auto-skip 100 CH2 OOA CH2 PWM Only 400 CH1 PWM Only 300 200 CH2 Auto-skip CH2 OOA 100 CH1 OOA CH1 OOA CH1 Auto-skip CH1 Auto-skip 0 0.001 0.01 0.1 1 0 0.
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TPS51125 www.ti.com SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 TYPICAL CHARACTERISTICS (continued) VREG3 OUTPUT VOLTAGE vs OUTPUT CURRENT VREF OUTPUT VOLTAGE vs OUTPUT CURRENT 3.35 2.015 V VREF - VREF Output Voltage - V V VREG3 - VREG3 Output Voltage - V 2.020 3.3 3.25 2.010 2.005 2.000 1.995 1.990 1.985 3.2 1.980 0 20 40 60 80 100 0 IVREG3 - VREG3 Output Current - m A 20 Figure 21. 100 3.360 OOA OOA 5.050 V OUT2 - 3.3-V Output Voltage - V V OUT1 - 5-V Output Voltage - V 80 3.
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TPS51125 SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) 5-V OUTPUT VOLTAGE vs INPUT VOLTAGE 3.3-V OUTPUT VOLTAGE vs INPUT VOLTAGE 3.360 5.050 V OUT2 - 3.3-V Output Voltage - V V OUT1 - 5-V Output Voltage - V 5.075 IO = 0A 5.025 5.000 IO = 6A 4.975 4.950 3.330 IO = 0A 3.300 IO = 6A 3.270 3.240 6 8 10 12 14 16 18 20 22 24 26 6 8 10 V IN - Input Voltage - V Figure 25.
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TPS51125 www.ti.com SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 TYPICAL CHARACTERISTICS (continued) 5-V Load Transient Response 3.3-V Load Transient Response VOUT2 (100mV/div) VOUT1 (100mV/div) IIND (5A/div) IIND (5A/div) IOUT2 (5A/div) IOUT1 (5A/div) Figure 29. Figure 30. 5-V Startup Waveforms 3.3-V Startup Waveforms ENTRIP2 (2V/div) ENTRIP1 (2V/div) VOUT1 (2V/div) VOUT2 (2V/div) PGOOD (5V/div) PGOOD (5V/div) Figure 31. Figure 32.
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TPS51125 SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) 5-V Switchover Waveforms 3.3-V Switchover Waveforms VREG5 (200mV/div) VREG3 (200mV/div) VOUT2 (200mV/div) VOUT1 (200mV/div) Figure 33. Figure 34. 5-V Soft-stop Waveforms 3.3-V Soft-stop Waveforms ENTRIP1 (5V/div) ENTRIP2 (5V/div) VOUT1 (2V/div) VOUT2 (2V/div) PGOOD (5V/div) PGOOD (5V/div) DRVL2 (5V/div) DRVL1 (5V/div) Figure 35. 18 Figure 36.
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TPS51125 www.ti.com SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 APPLICATION INFORMATION PWM Operations The main control loop of the switch mode power supply (SMPS) is designed as an adaptive on-time pulse width modulation (PWM) controller. It supports a proprietary D-CAP™ mode. D-CAP™ mode does not require external compensation circuit and is suitable for low external component count configuration when used with appropriate amount of ESR at the output capacitor(s).
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TPS51125 SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 www.ti.com Loop Compensation From small-signal loop analysis, a buck converter using D-CAPTM mode can be simplified as below. VIN R1 DRVH PWM VFB + + R2 Control logic & Driver Lx Ic IL DRVL Io 2V ESR Vc Voltage Divider RL Switching Modulator Co Output Capacitor Figure 37. Simplifying the Modulator The output voltage is compared with internal reference voltage after divider resistors, R1 and R2.
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TPS51125 www.ti.com SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 Light Load Condition in Auto-Skip Operation The TPS51125 automatically reduces switching frequency at light load conditions to maintain high efficiency. This reduction of frequency is achieved smoothly and without increase of VOUT ripple. Detail operation is described as follows.
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TPS51125 SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 www.ti.com Out-of-Audio™ Light-Load Operation Out-of-Audio™ (OOA) light-load mode is a unique control feature that keeps the switching frequency above acoustic audible frequencies toward virtually no load condition while maintaining best of the art high conversion efficiency.
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TPS51125 www.ti.com SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 VREG5 Switch Over When the VO1 voltage becomes higher than 4.7 V AND channel-1 internal powergood flag is generated, internal 5-V LDO regulator is shut off and the VREG5 output is connected to VO1 by internal switch over MOSFET. The 510-μs powergood delay helps a switch over without glitch. VREG3 Switch Over When the VO2 voltage becomes higher than 3.15 V AND channel-2 internal powergood flag is generated, internal 3.
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TPS51125 SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 www.ti.com VCLK for Charge Pump 270-kHz clock signal can be used for charge pump circuit to generate approximately 15-V dc voltage. The clock signal becomes available when EN0 becomes higher than 2.4 V or open state. Example of control circuit is shown in Figure 38. Note that the clock driver uses VO1 as its power supply. Regardless of enable or disable of VCLK, power consumption of the TPS51125 is almost the same.
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TPS51125 www.ti.com SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 Current Protection TPS51125 has cycle-by-cycle over current limiting control. The inductor current is monitored during the ‘OFF’ state and the controller keeps the ‘OFF’ state during the inductor current is larger than the over current trip level. In order to provide both good accuracy and cost effective solution, TPS51125 supports temperature compensated MOSFET RDS(on) sensing.
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TPS51125 SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 www.ti.com UVLO Protection TPS51125 has VREG5 under voltage lock out protection (UVLO). When the VREG5 voltage is lower than UVLO threshold voltage both switch mode power supplies are shut off. This is non-latch protection. When the VREG3 voltage is lower than (VO2 - 1 V), both switch mode power supplies are also shut off. Thermal Shutdown TPS51125 monitors the temperature of itself.
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TPS51125 www.ti.com SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 Layout Considerations Certain points must be considered before starting a layout work using the TPS51125. • TPS51125 has only one GND pin and special care of GND trace design makes operation stable, especially when both channels operate.
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TPS51125 SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 www.ti.com SGND VIN VIN 220 nF VOUT2 5 3 2 VFB2 VREF VFB1 DRVL2 VOUT1 DRVL1 12 19 TPS51125 VREG5 PowerPAD GND VREG3 PGND PGND 17 15 33 mF 8 15 V OUT 10 mF VCLK Charge Pump SGND UDG-09020 Figure 40.
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TPS51125 www.ti.com SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 * CH1 Vout divider Driver and switch node traces are shown for CH1 only.
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TPS51125 SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 www.ti.com Application Circuit SGND R1 13kW R2 20kW R4 30kW R3 20kW C6 0.22mF R5 130kW R6 130kW 3.3V/100mA SGND SGND VREF VIN 7 VO2 F 1 VIN 5.5 ~ 28V RI P1 2 EN T 3 VR E EL VF B2 C2 10mF 4 TO NS RI P2 EN T C1 10mF 5 VF B1 VIN 6 VO1 24 PGOOD 23 VBST1 22 R8 100kW C3 10mF 8 VREG3 PGND VREG5 PGND PGND Q1 IRF7821 L1 3.3mH C9 10mF C8 10mF 9 VBST2 C4 0.1mF R7 5.1W C7 0.1mF R9 5.
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TPS51125 www.ti.com SLUS786G – OCTOBER 2007 – REVISED JUNE 2012 REVISION HISTORY Changes from Revision E (May 2011) to Revision F • Page Added Input voltage range parameter, LL1, LL2, pulse width < 20 ns with a value of -5 V to 30 V. ................................... 2 Changes from Revision F (March 2012) to Revision G • Page Added electrostatic discharge ratings in ABSOLUTE MAXIMUM RATINGS table ..............................................................
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS51125RGER VQFN RGE 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 TPS51125RGER VQFN RGE 24 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 TPS51125RGET VQFN RGE 24 250 180.0 12.4 4.25 4.25 1.15 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS51125RGER VQFN RGE 24 3000 367.0 367.0 35.0 TPS51125RGER VQFN RGE 24 3000 367.0 367.0 35.0 TPS51125RGET VQFN RGE 24 250 210.0 185.0 35.0 TPS51125RGET VQFN RGE 24 250 210.0 185.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.