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Table Of Contents

V5IN

TPS51916

VREF

VBST

DRVH

DRVL

REFIN

PGND

GND

MODE

18 TRIP

PGOOD

VDDQSNS

VLDOIN

VTT

VTTSNS

VTTGND

VTTREF

UDG-10193

VDDQ

VTT

PGND

5VIN

PGND

VIN

VTTREF

AGNDAGND

Powergood

PGND

TPS51916

www.ti.com

SLUSAE1D –DECEMBER 2010–REVISED JUNE 2012

Complete DDR2, DDR3 and DDR3L Memory Power Solution Synchronous Buck

Controller, 2-A LDO, Buffered Reference

FEATURES

DESCRIPTION

The TPS51916 provides a complete power supply for

• Synchronous Buck Controller (VDDQ)

DDR2, DDR3 and DDR3L memory systems in the

– Conversion Voltage Range: 3 V to 28 V

lowest total cost and minimum space. It integrates a

– Output Voltage Range: 0.7 V to 1.8 V

synchronous buck regulator controller (VDDQ) with a

2-A sink/source tracking LDO (VTT) and buffered low

– 0.8% V

REF

Accuracy

noise reference (VTTREF). The TPS51916 employs

– Selectable Control Architecture

D-CAP™ mode coupled with 300 kHz/400 kHz

– D-CAP™ Mode for Fast Transient

frequencies for ease-of-use and fast transient

Response

response or D-CAP2™ mode coupled with higher

500 kHz/670 kHz frequencies to support ceramic

– D-CAP2™ Mode for Ceramic Output

output capacitor without an external compensation

Capacitors

circuit. The VTTREF tracks VDDQ/2 within excellent

– Selectable 300 kHz/ 400 kHz/ 500 kHz/

0.8% accuracy. The VTT, which provides 2-A

670 kHz Switching Frequencies

sink/source peak current capabilities, requires only

– Optimized Efficiency at Light and Heavy 10-μF of ceramic capacitance. In addition, a

dedicated LDO supply input is available.

Loads with Auto-skip Function

– Supports Soft-Off in S4/S5 States

The TPS51916 provides rich useful functions as well

as excellent power supply performance. It supports

– OCL/OVP/UVP/UVLO Protections

flexible power state control, placing VTT at high-Z in

– Powergood Output

S3 and discharging VDDQ, VTT and VTTREF (soft-

• 2-A LDO(VTT), Buffered Reference(VTTREF)

off) in S4/S5 state. Programmable OCL with low-side

MOSFET R

DS(on)

sensing, OVP/UVP/UVLO and

– 2-A (Peak) Sink and Source Current

thermal shutdown protections are also available.

– Requires Only 10-μF of Ceramic Output

Capacitance

The TPS51916 is available in a 20-pin, 3 mm × 3

mm, QFN package and is specified for ambient

– Buffered, Low Noise, 10-mA VTTREF

temperature from –40°C to 85°C.

Output

– 0.8% VTTREF, 20-mV VTT Accuracy

– Support High-Z in S3 and Soft-Off in S4/S5

• Thermal Shutdown

• 20-Pin, 3 mm × 3 mm, QFN Package

APPLICATIONS

• DDR2/DDR3/DDR3L Memory Power Supplies

• SSTL_18, SSTL_15, SSTL_135 and HSTL

Termination

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2D-CAP, D-CAP2 are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (34 pages)

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TPS51916 www.ti.com SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 Complete DDR2, DDR3 and DDR3L Memory Power Solution Synchronous Buck Controller, 2-A LDO, Buffered Reference FEATURES DESCRIPTION • The TPS51916 provides a complete power supply for DDR2, DDR3 and DDR3L memory systems in the lowest total cost and minimum space. It integrates a synchronous buck regulator controller (VDDQ) with a 2-A sink/source tracking LDO (VTT) and buffered low noise reference (VTTREF).
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TPS51916 SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
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TPS51916 www.ti.com SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 RECOMMENDED OPERATING CONDITIONS MIN Supply voltage 5.5 VBST –0.1 33.5 VBST (1) –0.1 5.5 -3 28 SW (2) –4.5 28 VLDOIN, VDDQSNS, REFIN –0.1 3.5 VTTSNS –0.1 3.5 PGND, VTTGND –0.1 0.1 S3, S5, TRIP, MODE –0.1 5.5 –3 33.5 DRVH Output voltage range TA (1) (2) MAX 4.5 SW Input voltage range TYP V5IN DRVH (1) –0.1 5.5 DRVH (2) –4.5 33.5 VTTREF, VREF –0.1 3.5 VTT –0.1 3.5 DRVL –0.1 5.5 PGOOD –0.1 5.
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TPS51916 SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 www.ti.
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TPS51916 www.ti.com SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 ELECTRICAL CHARACTERISTICS (continued) over operating free-air temperature range, VV5IN = 5 V, VLDOIN is connected to VDDQ output, VMODE= 0 V, VS3= VS5= 5 V (unless otherwise noted) PARAMETER TEST CONDITION MIN TYP MAX Source, IDRVH = –50 mA 1.6 3.0 Sink, IDRVH = 50 mA 0.6 1.5 Source, IDRVL = –50 mA 0.9 2.0 Sink, IDRVL = 50 mA 0.5 1.
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TPS51916 SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 www.ti.
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TPS51916 www.ti.com SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 DEVICE INFORMATION PGOOD MODE TRIP S3 S5 RUK PACKAGE (TOP VIEW) 20 19 18 17 16 VTTSNS 1 15 VBST VLDOIN 2 14 DRVH VTT 3 13 SW VTTGND 4 12 V5IN 11 DRVL 7 8 REFIN 9 10 PGND 6 GND 5 VDDQSNS Thermal Pad VREF VTTREF TPS51916 PIN FUNCTIONS PIN I/O DESCRIPTION NAME NO. DRVH 14 O High-side MOSFET gate driver output. DRVL 11 O Low-side MOSFET gate driver output. GND 7 – Signal ground.
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TPS51916 SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 www.ti.com FUNCTIONAL BLOCK DIAGRAM VREFIN –32% + UV VREFIN +8/16 % + 20 PGOOD + OV Delay + VREFIN +20% VREFIN –8/16 % VDDQSNS 9 G 15 ?A VREF 6 1.
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TPS51916 www.ti.com SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 TYPICAL CHARACTERISTICS 10 V5IN Shutdown Current (µA) V5IN Suppy Current (µA) 1000 800 600 400 200 0 −50 −25 0 25 50 75 Junction Temperature (°C) 100 4 2 −25 0 25 50 75 Junction Temperature (°C) 100 125 Figure 2. V5IN Shutdown Current vs Junction Temperature 10 16 14 8 TRIP Source Current (µA) VLDOIN Suppy Current (µA) 6 0 −50 125 Figure 1.
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TPS51916 SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) 800 8 Switching Frequency (kHz) VTT Discharge Current (mA) 10 6 4 2 700 600 500 400 300 0 −50 −25 0 25 50 75 Junction Temperature (°C) 100 200 125 Figure 7. VTT Discharge Current vs Junction Temperature 500 400 Switching Frequency (kHz) Switching Frequency (kHz) 600 300 12 14 16 Input Voltage (V) 18 20 22 VVDDQ = 1.20 V VVDDQ = 1.35 V VVDDQ = 1.
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TPS51916 www.ti.com SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 TYPICAL CHARACTERISTICS (continued) 800 800 600 500 400 300 200 100 0 600 500 400 300 200 0 2 4 6 8 10 12 14 VDDQ Output Current (A) 16 18 0 20 800 1.55 700 1.54 600 500 400 RMODE = 1 kΩ VIN = 12 V 300 200 VVDDQ = 1.20 V VVDDQ = 1.35 V VVDDQ = 1.50 V 100 0 2 4 6 VDDQ Output Current (A) 8 0 4 6 VDDQ Output Current (A) 8 10 RMODE = 200 kΩ VIN = 12 V 1.53 1.52 1.51 1.50 1.49 1.48 1.47 1.46 1.45 10 0 Figure 15.
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TPS51916 SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) 0.695 0.620 0.690 0.615 VTTREF Voltage (V) VTTREF Voltage (V) 0.685 0.680 0.675 0.670 0.665 0.660 0.655 0.610 0.605 0.600 0.595 0.590 0.585 VVDDQ = 1.35 V 0.650 −10 −5 VVDDQ = 1.2 V 0 VTTREF Current (mA) 5 0.580 −10 10 −5 5 10 Figure 20. VTTREF Load Regulation 0.790 0.715 0.780 0.705 0.770 0.695 VTT Voltage (V) VTT Voltage (V) Figure 19.
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TPS51916 www.ti.com SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 TYPICAL CHARACTERISTICS (continued) Figure 25. 1.5-V Load Transient Response Figure 26. VTT Load Transient Response Figure 27. 1.5-V Startup Waveforms Figure 28. 1.5-V Startup Waveforms (0.
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TPS51916 SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) 180 80 180 60 135 60 135 40 90 40 90 20 45 20 45 0 0 0 0 −40 −60 −80 100 −20 −45 −90 −40 −90 −135 −60 −45 VIN = 12 V IVDDQ = 10 A Gain Phase Gain Phase IVTT = −1 A 1000 10000 Frequency (Hz) 100000 −180 1000000 −80 10000 100000 1000000 Frequency (Hz) Gain (dB) Figure 31. VDDQ Bode Plot −180 10000000 Figure 32.
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TPS51916 www.ti.com SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 APPLICATION INFORMATION VDDQ Switch Mode Power Supply Control The TPS51916 supports two SMPS control architectures, D-CAP™ mode and D-CAP2™ mode. Both control modes do not require complex external compensation networks and are suitable for designs with small external components counts. The D-CAP™ mode provides fast transient response with appropriate amount of equivalent series resistance (ESR) on the output capacitors.
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TPS51916 SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 www.ti.com Power State Control The TPS51916 has two input pins, S3 and S5, to provide simple control scheme of power state. All of VDDQ, VTTREF and VTT are turned on at S0 state (S3=S5=high). In S3 state (S3=low, S5=high), VDDQ and VTTREF voltages are kept on while VTT is turned off and left at high impedance state (high-Z). The VTT output floats and does not sink or source current in this state.
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TPS51916 www.ti.com SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 D-CAP™ Mode Figure 35 shows a simplified model of D-CAP™ mode architecture. VIN VDDQSNS DRVH 9 14 Lx PWM + REFIN Control Logic and Driver 8 R1 VREF R2 DRVL 1.8 V VDDQ ESR 6 + High-Side MOSFET 11 Low-Side MOSFET RLOAD COUT UDG-10136 Figure 35. Simplified D-CAP™ Model The VDDQSNS voltage is compared with REFIN voltage. The PWM comparator creates a set signal to turn on the high-side MOSFET.
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TPS51916 SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 www.ti.com Jitter is another attribute caused by signal-to-noise ratio of the feedback signal. One of the major factors that determine jitter performance in D-CAP™ mode is the down-slope angle of the VDDQSNS ripple voltage. Figure 36 shows, in the same noise condition, that jitter is improved by making the slope angle larger. VVDDQSNS Slope (1) Jitter (2) Slope (2) Jitter 20 mV (1) VREFIN VREFIN +Noise tON tOFF UDG-10139 Figure 36.
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TPS51916 www.ti.com SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 D-CAP2™ Mode Operation Figure 37 shows simplified model of D-CAP2™ architecture. VIN CC1 VDDQSNS SW RC1 9 13 CC2 RC2 DRVH 14 G Σ REFIN R1 PWM + 8 LX VDDQ Control Logic and Driver DRVL C OUT R LOAD 11 VREF 6 + R2 1.8 V TPS51916 UDG-10198 Figure 37.
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TPS51916 SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 www.ti.com VTT and VTTREF TPS51916 integrates two high performance, low-drop-out linear regulators, VTT and VTTREF, to provide complete DDR2/DDR3/DDR3L power solutions. The VTTREF has a 10-mA sink/source current capability, and tracks ½ of VDDQSNS with ±1% accuracy using an on-chip ½ divider. A 0.22-μF (or larger) ceramic capacitor must be connected close to the VTTREF terminal to ensure stable operation.
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TPS51916 www.ti.com SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 The undervoltage protection (UVP) latch is set when the VDDQSNS voltage remains lower than 68% (typ) of the REFIN voltage for 1 ms or longer. In this fault condition, the controller latches DRVH low and DRVL low and discharges the VDDQ, VTT and VTTREF outputs. UVP detection function is enabled after 1.2 ms of SMPS operation to ensure startup.
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TPS51916 SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 www.ti.com External Components Selection The external components selection is simple in D-CAP™ mode. 1. DETERMINE THE VALUE OF R1 AND R2 The output voltage is determined by the value of the voltage-divider resistor, R1 and R2 as shown in Figure 35. R1 is connected between VREF and REFIN pins, and R2 is connected between the REFIN pin and GND. Setting R1 as 10-kΩ is a good starting point. Determine R2 using Equation 7. R1 R2 = æ ö ç ÷ ç ÷ 1.
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TPS51916 www.ti.com SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 RC ´ CC f £ SW 2p ´ G ´ L X ´ COUT 3 where • • RC×CC time constant is 23 µs for 500 kHz operation (or 14.6 µs for 670 kHz operation) G = 0.25 (13) TPS51916 Application Circuits V5IN 4.5 V to 5.5 V R2 200 kW R1 100 kW R3 36 kW S5 S3 16 MODE TRIP S3 S5 1 VTTSNS 2 VLDOIN 3 VTT 4 VTTGND 5 VTTREF DRVH 14 U1 TPS51916RUK R6 0W C5 0.1 mF C7 0.1 mF C8 10 mF C9 10 mF C10 10 mF R7 0 W PGND Q1 FDMS8680 L1 0.56 mH VDDQ 1.
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TPS51916 SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 V5IN 4.5 V to 5.5 V www.ti.com R2 1 kW R1 100 kW R3 36 kW S5 S3 16 MODE TRIP S3 S5 1 VTTSNS 2 VLDOIN DRVH 14 U1 TPS51916RUK VTT 4 VTTGND 5 VTTREF C7 0.1 mF C5 0.1 mF R7 0 W Q1 FDMS8680 V5IN 12 6 7 8 9 10 VTTREF 0.75 V R6 0W C8 10 mF C9 10 mF L1 1 mH PGND VDDQ 1.5 V/10 A SW 13 PGND 3 VIN 8 V to 20 V VBST 15 VDDQSNS PGND 17 REFIN VTTGND 18 GND C1 10 mF 19 VREF VTT 0.
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TPS51916 www.ti.com SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 Layout Considerations Certain issues must be considered before designing a layout using the TPS51916. 2 VLDOIN VTT VTT TPS51916 VIN 3 10 mF VTTGND VTTGND 4 V5IN VTTREF #2 1 mF 5 VOUT DRVL MODE 0.22 mF #1 12 11 19 TRIP #3 PGND 18 10 VREF 6 REFIN 8 GND 7 0.1 mF 10 nF AGND UDG-10197 PGND Figure 41.
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TPS51916 SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 • • • • • • • • • • 26 www.ti.com output capacitor(s), VTTGND, GND and PGND pins should be connected to system GND plane near the device as shown in Figure 41. Because the TPS51916 controls output voltage referring to voltage across VOUT capacitor, VDDQSNS should be connected to the positive node of VOUT capacitor using different trace from that for VLDOIN. Remember that this sensing potential is the reference voltage of VTTREF.
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TPS51916 www.ti.com SLUSAE1D – DECEMBER 2010 – REVISED JUNE 2012 Changes from Revision B (AUGUST 2011) to Revision D Page • Added clarity to FUNCTIONAL BLOCK DIAGRAM .............................................................................................................. 8 • Added clarity to Figure 37 ...................................................................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS51916RUKR WQFN RUK 20 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS51916RUKT WQFN RUK 20 250 180.0 12.4 3.3 3.3 1.1 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS51916RUKR WQFN RUK 20 3000 367.0 367.0 35.0 TPS51916RUKT WQFN RUK 20 250 210.0 185.0 35.
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