Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - DC/DC voltage regulator Holder HTSSOP 14

V (50mV/div)

OUT

I (1 A/div)

OUT

100 s/divm

TPS54225

www.ti.com

SLVSA15C –OCTOBER 2009– REVISED FEBRUARY 2011

4.5V to 18V Input, 2-A Synchronous Step-Down SWIFT

Converter

Check for Samples: TPS54225

FEATURES

DESCRIPTION

• D-CAP2™ Mode Enables Fast Transient

Response

The TPS54225 is an adaptive on-time D-CAP2™

mode synchronous buck converter. The TPS54225

• Low Output Ripple and Allows Ceramic Output

enables system designers to complete the suite of

Capacitor

various end equipment’s power bus regulators with a

• Wide V

Input Voltage Range: 4.5 V to 18 V

cost effective, low component count, low standby

• Wide V

Input Voltage Range: 2 V to 18 V

current solution. The main control loop for the

TPS54225 uses the D-CAP2™ mode control which

• Output Voltage Range: 0.76 V to 5.5 V

provides a fast transient response with no external

• Highly Efficient Integrated FET’s Optimized

compensation components.

for Lower Duty Cycle Applications

The TPS54225 also has a proprietary circuit that

- 160 mΩ (High Side) and 110 mΩ (Low Side)

enables the device to adapt to both low equivalent

• High Efficiency, less than 10 μA at shutdown

series resistance (ESR) output capacitors, such as

• High Initial Bandgap Reference Accuracy

POSCAP or SP-CAP, and ultra-low ESR ceramic

• Adjustable Soft Start

capacitors. The device operates from 4.5-V to 18-V

input , and from 2-V to 18-V VIN input power

• Pre-Biased Soft Start

supply voltage. The output voltage can be

• 700-kHz Switching Frequency (f

)

programmed between 0.76 V and 5.5 V. The device

• Cycle-By-Cycle Overcurrent Limit

also features an adjustable slow start time and a

power good function. The TPS54225 is available in

• Power Good Output

the 14 pin HTSSOP package, and designed to

operate from –40°C to 85°C.

APPLICATIONS

• Wide Range of Applications for Low Voltage

System

– Digital TV Power Supply

– High Definition Blu-ray Disc™ Players

– Networking Home Terminal

– Digital Set Top Box (STB)

space

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2D-CAP2, PowerPAD are trademarks of Texas Instruments.

3Blu-ray Disc is a trademark of Blu-ray Disc Association.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (25 pages)

PAGE 1
TPS54225 SLVSA15C – OCTOBER 2009 – REVISED FEBRUARY 2011 www.ti.com 4.5V to 18V Input, 2-A Synchronous Step-Down SWIFTTM Converter Check for Samples: TPS54225 FEATURES 1 • 23 • • • • • • • • • • • • D-CAP2™ Mode Enables Fast Transient Response Low Output Ripple and Allows Ceramic Output Capacitor Wide VCC Input Voltage Range: 4.5 V to 18 V Wide VIN Input Voltage Range: 2 V to 18 V Output Voltage Range: 0.76 V to 5.
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TPS54225 SLVSA15C – OCTOBER 2009 – REVISED FEBRUARY 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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TPS54225 SLVSA15C – OCTOBER 2009 – REVISED FEBRUARY 2011 www.ti.com RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply input voltage range 4.5 18 V VIN Power input voltage range 2 18 V VBST –0.1 24 VBST (vs SW1, SW2) –0.1 5.7 SS, PG –0.1 5.7 EN –0.1 18 VO, VFB –0.1 5.5 SW1, SW2 –1.8 18 VI Input voltage range –3 18 PGND1, PGND2 –0.1 0.
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TPS54225 SLVSA15C – OCTOBER 2009 – REVISED FEBRUARY 2011 www.ti.com ELECTRICAL CHARACTERISTICS (continued) over operating free-air temperature range, VCC, VIN = 12V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tON On time VIN = 12 V, VO = 1.05 V 145 tOFF(MIN) Minimum off time TA = 25°C, VFB = 0.7 V 260 310 ns ns 2.6 μA SOFT START ISSC Charge current VSS = 0 V 1.4 2 ISSD Discharge current VSS = 0.5 V 0.1 0.
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TPS54225 SLVSA15C – OCTOBER 2009 – REVISED FEBRUARY 2011 www.ti.com PIN FUNCTIONS PIN NAME NO. DESCRIPTION VO 1 Connect to output of converter. This pin is used for On-Time Adjustment. VFB 2 Converter feedback input. Connect with feedback resistor divider. VREG5 3 5.5 V power supply output. A capacitor (typical 1μF) should be connected to GND. SS 4 Soft-start control. A external capacitor should be connected to GND.
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TPS54225 SLVSA15C – OCTOBER 2009 – REVISED FEBRUARY 2011 www.ti.
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TPS54225 SLVSA15C – OCTOBER 2009 – REVISED FEBRUARY 2011 www.ti.com shot timer expires. This one shot timer is set by the converter input voltage ,VIN, and the output voltage ,VO, to maintain a pseudo-fixed frequency over the input voltage range, hence it is called adaptive on-time control. The one-shot timer is reset and the high-side MOSFET is turned on again when the feedback voltage falls below the reference voltage.
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TPS54225 SLVSA15C – OCTOBER 2009 – REVISED FEBRUARY 2011 www.ti.com There are some important considerations for this type of over-current protection. The load current one half of the peak-to-peak inductor current higher than the over-current threshold. Also when the current is being limited, the output voltage tends to fall as the demanded load current may be higher than the current available from the converter. This may cause the output under-voltage protection circuit to be activated.
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TPS54225 SLVSA15C – OCTOBER 2009 – REVISED FEBRUARY 2011 www.ti.com TYPICAL CHARACTERISTICS 1200 8 IVCCSDN - Shutdown Current - mA IVCC Supply Current - mA 1000 800 600 400 200 0 -50 0 50 100 TJ - Junction Temperature - °C 6 4 2 0 -50 150 Figure 1. VCC TEMPERATURE vs. JUNCTION TEMPERATURE 0 50 100 TJ - Junction Temperature - °C 150 Figure 2. VCC SHUTDOWN CURRENT vs. JUNCTION TEMPERATURE 100 1.1 VOUT - Output Voltage - V EN Input Current - mA 80 60 40 1.075 VI = 18 V 1.
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TPS54225 SLVSA15C – OCTOBER 2009 – REVISED FEBRUARY 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) 1.1 VOUT - Output Voltage - V VOUT - 50 mV/div 1.075 IO = 0 A 1.05 IO = 1 A IOUT - 2 A/div 1.025 100 ms/div 1 0 5 10 15 VIN - Input Voltage - V 20 Figure 5. 1.05-V OUTPUT VOLTAGE vs INPUT VOLTAGE Figure 6. 1.05-V, 0-A TO 2-A-LOAD TRANSIENT RESPONSE 100 VO = 3.3 V EN - 10 V/div 90 VO = 2.5 V VOUT - 0.5 V/div Efficiency - % 80 VO = 1.8 V 70 60 PG - 5 V/div 50 400 ms/div 40 Figure 7.
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TPS54225 SLVSA15C – OCTOBER 2009 – REVISED FEBRUARY 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) 900 fsw - Switching Frequency - kHz fsw - Switching Frequency - kHz 900 800 VO = 1.8 V 700 600 VO = 3.3 V 800 VO = 1.8 V 700 VO = 3.3 V 600 500 500 0 5 10 15 VIN - Input Voltage - V 20 Figure 9. SWICHING FREQUENCY vs. INPUT VOLTAGE 0 0.5 1 1.5 IO - Output Current - A 2 Figure 10. SWITCHING FREQUENCY vs. OUTPUT CURRENT VO = 1.05 V VO = 1.
PAGE 12
TPS54225 SLVSA15C – OCTOBER 2009 – REVISED FEBRUARY 2011 www.ti.com DESIGN GUIDE Step By Step Design Procedure To • • • • • begin the design process, the following application parameters must be known: Input voltage range Output voltage Output current Output voltage ripple Input voltage ripple VIN 4.5 to 18V U1 TPS542225PWP 14 13 1 2 4 7 VCC SW1 VIN SW2 VO VBST VFB PG SS VREG5 EN PGND1 5 GND VOUT 1.05V, 2A 10 11 12 6 3 8 PGND2 9 PwPd 15 Figure 13.
PAGE 13
TPS54225 SLVSA15C – OCTOBER 2009 – REVISED FEBRUARY 2011 www.ti.com At low frequencies, the overall loop gain is set by the output set-point resistor divider network and the internal gain of the TPS54225. The low frequency phase is 180 degrees. At the output filter pole frequency, the gain rolls off at a -40 dB per decade rate and the phase drops rapidly.
PAGE 14
TPS54225 SLVSA15C – OCTOBER 2009 – REVISED FEBRUARY 2011 www.ti.com Bootstrap Capacitor Selection A 0.1 µF ceramic capacitor must be connected between the VBST to SW pin for proper operation. It is recommended to use a ceramic capacitor. VREG5 Capacitor Selection A 1.0 µF ceramic capacitor must be connected between the VREG5 to GND pin for proper operation. It is recommended to use a ceramic capacitor.
PAGE 15
TPS54225 SLVSA15C – OCTOBER 2009 – REVISED FEBRUARY 2011 www.ti.com LAYOUT CONSIDERATIONS 1. Keep the input switching current loop as small as possible. 2. Keep the SW node as physically small and short as possible to minimize parasitic capacitance and inductance and to minimize radiated emissions. Kelvin connections should be brought from the output to the feedback pin of the device. 3. Keep analog and non-switching components away from switching components. 4.
PAGE 16
TPS54225 SLVSA15C – OCTOBER 2009 – REVISED FEBRUARY 2011 www.ti.com REVISION HISTORY Changes from Original (October 2009) to Revision A • Page Changed the device from Product Preview to Production .................................................................................................... 1 Changes from Revision A (October 2009) to Revision B Page • Changed TPS54225PWPR tape and reel quantity From: 3000 To: 2000 ............................................................................
PAGE 17
PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
PAGE 19
PACKAGE MATERIALS INFORMATION www.ti.com 2-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPS54225PWPR Package Package Pins Type Drawing SPQ HTSSOP 2000 PWP 14 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 330.0 12.4 Pack Materials-Page 1 6.9 B0 (mm) K0 (mm) P1 (mm) 5.6 1.6 8.0 W Pin1 (mm) Quadrant 12.
PAGE 20
PACKAGE MATERIALS INFORMATION www.ti.com 2-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS54225PWPR HTSSOP PWP 14 2000 367.0 367.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.