Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - DC/DC voltage regulator Holder HTSSOP 20

TPS54311, TPS54312

TPS54313, TPS54314

TPS54315, TPS54316

SLVS416B − FEBRUARY 2002 − REVISED APRIL 2005

3-V TO 6-V INPUT, 3-A OUTPUT SYNCHRONOUS-BUCK PWM

SWITCHER WITH INTEGRATED FETs (SWIFT™)

(6,3 mm x 6,4 mm)

Typical Size

FEATURES

D 60-mΩ MOSFET Switches for High Efficiency

at 3-A Continuous Output Source or Sink

Current

D 0.9-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V and 3.3-V Fixed

Output Voltage Devices With 1% Initial

Accuracy

D Internally Compensated for Low Parts Count

D Fast Transient Response

D Wide PWM Frequency: Fixed 350 kHz, 550

kHz, or Adjustable 280 kHz to 700 kHz

D Load Protected by Peak Current Limit and

Thermal Shutdown

D Integrated Solution Reduces Board Area and

Total Cost

APPLICATIONS

D Low-Voltage, High-Density Systems With

Power Distributed at 5 V or 3.3 V

D Point of Load Regulation for High

Performance DSPs, FPGAs, ASICs, and

Microprocessors

D Broadband, Networking and Optical

Communications Infrastructure

D Portable Computing/Notebook PCs

DESCRIPTION

As members of the SWIFT family of dc/dc regulators, the

TPS54311, TPS54312, TPS54313, TPS54314,

TPS54315 and TPS54316 low-input-voltage high-output-

current synchronous-buck PWM converters integrate all

required active components. Included on the substrate

with the listed features are a true, high performance,

voltage error amplifier that provides high performance

under transient conditions; an undervoltage-lockout circuit

to prevent start-up until the input voltage reaches 3 V; an

internally and externally set slow-start circuit to limit

in-rush currents; and a power good output useful for

processor/logic reset, fault signaling, and supply

sequencing.

The TPS54311, TPS54312, TPS54313, TPS54314,

TPS54315 and TPS54316 devices are available in a

thermally enhanced 20-pin TSSOP (PWP) PowerPAD™

package, which eliminates bulky heatsinks. TI provides

evaluation modules and the SWIFT

designer software tool

to aid in quickly achieving high-performance power supply

designs to meet aggressive equipment development

cycles.

0 0.5 1 1.5 2 2.5 3

Load Current − A

Efficiency − %

= 25°C

= 5 V

= 3.3 V

EFFICIENCY

LOAD CURRENT

VIN

TPS54316

BOOT

PGND

VSENSE

GND

VBIAS

Input Output

Simplified Schematic

PRODUCTION DATA information is current as of publication date. Products

conform to specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all parameters.

PowerPAD and SWIFT are trademarks of Texas Instruments.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments

semiconductor products and disclaimers thereto appears at the end of this data sheet.

www.ti.com

Summary of content (22 pages)

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Typical Size (6,3 mm x 6,4 mm) TPS54311, TPS54312 TPS54313, TPS54314 TPS54315, TPS54316 www.ti.
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TPS54311, TPS54312 TPS54313, TPS54314 TPS54315, TPS54316 www.ti.com SLVS416B − FEBRUARY 2002 − REVISED APRIL 2005 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION PACKAGED DEVICES PLASTIC HTSSOP (PWP)(1)(2) OUTPUT VOLTAGE TA −40°C 40 C to 85 85°C C TA OUTPUT VOLTAGE PACKAGED DEVICES PLASTIC HTSSOP (PWP)(1)(2) 0.
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TPS54311, TPS54312 TPS54313, TPS54314 TPS54315, TPS54316 www.ti.com SLVS416B − FEBRUARY 2002 − REVISED APRIL 2005 ELECTRICAL CHARACTERISTICS TJ = −40°C to 125°C, VIN = 3 V to 6 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX 6.2 9.6 8.4 12.8 1 1.4 2.95 3 UNIT SUPPLY VOLTAGE, VIN VIN input voltage range 3 Quiescent current fs = 350 kHz, FSEL = 0.8 V, RT open fs = 550 kHz, Phase pin open FSEL ≥ 2.
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TPS54311, TPS54312 TPS54313, TPS54314 TPS54315, TPS54316 www.ti.
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TPS54311, TPS54312 TPS54313, TPS54314 TPS54315, TPS54316 www.ti.com SLVS416B − FEBRUARY 2002 − REVISED APRIL 2005 PIN ASSIGNMENTS PWP PACKAGE (TOP VIEW) AGND VSENSE NC PWRGD BOOT PH PH PH PH PH 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 RT FSEL SS/ENA VBIAS VIN VIN VIN PGND PGND PGND NC − No internal connection Terminal Functions TERMINAL NAME DESCRIPTION NO. AGND 1 Analog ground.
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TPS54311, TPS54312 TPS54313, TPS54314 TPS54315, TPS54316 www.ti.com SLVS416B − FEBRUARY 2002 − REVISED APRIL 2005 FUNCTIONAL BLOCK DIAGRAM AGND VBIAS VIN Enable 5 µA Comparator SS/ENA 1.2 V Hysteresis: 0.03 V Falling Edge Deglitch VIN UVLO Comparator VIN 2.95 V Hysteresis: 0.16 V VIN ILIM Comparator Thermal Shutdown 145°C 2.5 µs REG VBIAS SHUTDOWN Falling and Rising Edge Deglitch 100 ns BOOT 2.5 µs SS_DIS SHUTDOWN Internal/External Slow-Start (Internal Slow-Start Time = 3.3 ms to 6.
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TPS54311, TPS54312 TPS54313, TPS54314 TPS54315, TPS54316 www.ti.com SLVS416B − FEBRUARY 2002 − REVISED APRIL 2005 TYPICAL CHARACTERISTICS DRAIN-SOURCE ON-STATE RESISTANCE vs JUNCTION TEMPERATURE DRAIN-SOURCE ON-STATE RESISTANCE vs JUNCTION TEMPERATURE VI = 3.3 V 100 IO = 3 A 80 60 40 20 0 −40 0 25 85 VI = 5 V IO = 3 A 80 60 40 20 0 −40 125 TJ − Junction Temperature − °C 0 25 125 600 RT = 100 k 500 400 RT = 180 k 300 0.891 0.889 0.
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TPS54311, TPS54312 TPS54313, TPS54314 TPS54315, TPS54316 www.ti.com SLVS416B − FEBRUARY 2002 − REVISED APRIL 2005 APPLICATION INFORMATION Figure 10 shows the schematic diagram for a typical TPS54314 application. The TPS54314 (U1) can provide up to 3 A of output current at a nominal output voltage of VI J1 2 + 1 GND C2 R1 10 kΩ 1 PWRGD J3 2 GND 1 L1 5.2 µH 1 VO 1.8 V.
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TPS54311, TPS54312 TPS54313, TPS54314 TPS54315, TPS54316 www.ti.com SLVS416B − FEBRUARY 2002 − REVISED APRIL 2005 Connect the output filter capacitor(s) as shown between the VOUT trace and PGND. It is important to keep the loop formed by the PH pins, Lout, Cout and PGND as small as practical. that should tie directly to the power ground plane are the input capacitors, the output capacitors, the input voltage decoupling capacitor, and the PGND pins of the TPS54311−16.
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TPS54311, TPS54312 TPS54313, TPS54314 TPS54315, TPS54316 www.ti.com SLVS416B − FEBRUARY 2002 − REVISED APRIL 2005 LAYOUT CONSIDERATIONS FOR THERMAL PERFORMANCE For operation at full rated load current, the analog ground plane must provide adequate heat dissipating area. A 3 inch by 3 inch plane of 1 ounce copper is recommended, though not mandatory, depending on ambient temperature and airflow.
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TPS54311, TPS54312 TPS54313, TPS54314 TPS54315, TPS54316 www.ti.com SLVS416B − FEBRUARY 2002 − REVISED APRIL 2005 PERFORMANCE GRAPHS OUTPUT VOLTAGE vs LOAD CURRENT EFFICIENCY vs LOAD CURRENT 60 1.9 100 LOOP RESPONSE 180 Efficiency at 700 kHz 135 45 80 70 1.85 90 30 3.3 VI 1.8 5 VI 45 Gain 15 0 0 1.75 −45 −15 60 1.
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TPS54311, TPS54312 TPS54313, TPS54314 TPS54315, TPS54316 www.ti.com SLVS416B − FEBRUARY 2002 − REVISED APRIL 2005 DETAILED DESCRIPTION The actual slow-start is likely to be less than the above approximation due to the brief ramp-up at the internal rate. Under Voltage Lock Out (UVLO) The TPS54311 − 16 incorporates an under voltage lockout circuit to keep the device disabled when the input voltage (VIN) is insufficient.
PAGE 13
TPS54311, TPS54312 TPS54313, TPS54314 TPS54315, TPS54316 www.ti.com SLVS416B − FEBRUARY 2002 − REVISED APRIL 2005 values of 4.7 µH to 10 µH are typical and available from several vendors. The resulting designs exhibit good noise and ripple characteristics, along with exceptional transient response. Transient recovery times are typically in the range of 10 to 20 µs. PWM Control Signals from the error amplifier output, oscillator, and current limit circuit are processed by the PWM control logic.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) TPS54312PWPR HTSSOP PWP 20 2000 330.0 16.4 TPS54313PWPR HTSSOP PWP 20 2000 330.0 TPS54314PWPR HTSSOP PWP 20 2000 330.0 TPS54315PWPR HTSSOP PWP 20 2000 TPS54316PWPR HTSSOP PWP 20 2000 6.95 7.1 1.6 8.0 16.0 Q1 16.4 6.95 7.1 1.6 8.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS54312PWPR HTSSOP PWP 20 2000 367.0 367.0 38.0 TPS54313PWPR HTSSOP PWP 20 2000 367.0 367.0 38.0 TPS54314PWPR HTSSOP PWP 20 2000 367.0 367.0 38.0 TPS54315PWPR HTSSOP PWP 20 2000 367.0 367.0 38.0 TPS54316PWPR HTSSOP PWP 20 2000 367.0 367.0 38.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.