Product Folder Sample & Buy Support & Community Tools & Software Technical Documents TPS54340 SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 TPS54340 42 V Input, 3.5 A, Step Down DC-DC Converter with Eco-mode™ 1 Features 3 Description • • The TPS54340 is a 42 V, 3.5 A, step down regulator with an integrated high side MOSFET. The device survives load dump pulses up to 45 V per ISO 7637. Current mode control provides simple external compensation and flexible component selection.
TPS54340 SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Simplified Schematic............................................. Revision History..................................................... Terminal Configuration and Functions..............
TPS54340 www.ti.com SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 6 Terminal Configuration and Functions HSOIC PACKAGE (TOP VIEW) 8 SW 7 GND 3 6 COMP 4 5 FB BOOT 1 VIN 2 EN RT/CLK Thermal Pad 9 Terminal Functions TERMINAL NAME NO. I/O DESCRIPTION BOOT 1 O A bootstrap capacitor is required between BOOT and SW. If the voltage on this capacitor is below the minimum required to operate the high side MOSFET, the output is switched off until the capacitor is refreshed.
TPS54340 SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VIN –0.3 45 EN –0.3 8.4 BOOT Input voltage 53 FB –0.3 COMP –0.3 3 RT/CLK –0.3 3.6 8 SW SW, 10-ns Transient Operating junction temperature (1) V 3 BOOT-SW Output voltage UNIT –0.
TPS54340 www.ti.com SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 7.5 Electrical Characteristics TJ = –40°C to 150°C, VIN = 4.5 V to 42 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 42 V 4.3 4.48 V SUPPLY VOLTAGE (VIN TERMINAL) Operating input voltage Internal undervoltage lockout threshold 4.5 Rising 4.1 Internal undervoltage lockout threshold hysteresis 325 mV Shutdown supply current EN = 0 V, 25°C, 4.5 V ≤ VIN ≤ 42 V 1.3 3.
TPS54340 SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 www.ti.com 7.6 Timing Requirements PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ENABLE AND UVLO (EN TERMINAL) Enable to COMP active VIN = 12 V , TA = 25°C 540 µs INTERNAL SOFT-START TIME Soft-Start Time fSW = 500 kHz, 10% to 90% 2.1 ms Soft-Start Time fSW = 2.5 MHz, 10% to 90% 0.
TPS54340 www.ti.com SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 550 500 540 450 FSW - Switching Frequency (kHz) FS - Switching Frequency (kHz) Typical Characteristics (continued) 530 520 510 500 490 480 470 460 450 400 350 300 250 200 150 100 50 0 ±50 ±25 0 25 50 75 100 125 TJ - Junction Temperature (C) VIN = 12 V 150 200 300 400 500 600 700 800 900 RT/CLK - Resistance (k ) C029 1000 C030 ƒsw (kHz) = 92417 x RT (kΩ) -0.991 RT (kΩ) = 101756 x ƒsw (kHz) -1.
TPS54340 SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 www.ti.com ±0.5 −4 ±0.7 −4.1 ±0.9 −4.2 ±1.1 −4.3 ±1.3 −4.4 IEN (µA) IEN (µA) Typical Characteristics (continued) ±1.5 ±1.7 −4.5 −4.6 ±1.9 −4.7 ±2.1 −4.8 ±2.3 −4.9 −5 −50 ±2.5 ±50 ±25 0 25 50 75 100 125 150 TJ - Junction Temperature (C) VIN = 5 V 150 G012 IEN = Threshold +50 mV 100 VFB Falling VFB Rising % of Nominal Switching Frequency ±2.7 ±2.9 IEN - Hysteresis (µA) 125 Figure 13.
TPS54340 www.ti.com SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 Typical Characteristics (continued) 210 190 190 VIN − Supply Current (µA) 210 IVIN (µA) 170 150 130 110 170 150 130 110 90 90 70 70 ±50 ±25 0 25 50 75 100 125 150 TJ - Junction Temperature (C) 2.6 35 40 45 G018 4.5 BOOT-SW UVLO Falling BOOT-SW UVLO Rising 4.4 2.4 4.3 Input Voltage (V) VIN − (BOOT−SW) (dB) 15 20 25 30 VIN − Input Voltage (V) Figure 19. VIN Supply Current vs Input Voltage Figure 18.
TPS54340 SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 www.ti.com 8 Detailed Description 8.1 Overview The TPS54340 is a 42 V, 3.5 A, step-down (buck) regulator with an integrated high side n-channel MOSFET. The device implements constant frequency, current mode control which reduces output capacitance and simplifies external frequency compensation. The wide switching frequency range of 100 kHz to 2500 kHz allows either efficiency or size optimization when selecting the output filter components.
TPS54340 www.ti.com SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 8.2 Functional Block Diagram EN VIN Thermal Shutdown UVLO Enable Comparator OV Shutdown Shutdown Logic Enable Threshold Boot Charge Voltage Reference Boot UVLO Minimum Clamp Pulse Skip Error Amplifier Current Sense PWM Comparator FB BOOT Logic Shutdown 6 Slope Compensation SW COMP Frequency Foldback Reference DAC for Soft- Start Maximum Clamp Oscillator with PLL 8/8/ 2012 A 0192789 GND POWERPAD RT/ CLK 8.
TPS54340 SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 www.ti.com Feature Description (continued) 8.3.3 Pulse Skip Eco-mode The TPS54340 operates in a pulse skipping Eco-mode at light load currents to improve efficiency by reducing switching and gate drive losses. If the output voltage is within regulation and the peak switch current at the end of any switching cycle is below the pulse skipping current threshold, the device enters Eco-mode.
TPS54340 www.ti.com SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 Feature Description (continued) 5.6 5.5 VI - Input Voltage - V 5.4 5.3 5.2 5.1 Dropout Voltage 5 4.9 Dropout Voltage 4.8 4.7 Start 4.6 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 Stop 0.4 0.45 0.5 Load Current - A Figure 23. 5V Start/Stop Voltage 8.3.5 Error Amplifier The TPS54340 voltage regulation loop is controlled by a transconductance error amplifier.
TPS54340 SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 www.ti.com Feature Description (continued) VIN TPS54340 i1 ihys RUVLO1 EN Optional VEN RUVLO2 Figure 24. Adjustable Undervoltage Lockout (UVLO) - VSTOP V RUVLO1 = START IHYS RUVLO2 = (2) VENA VSTART - VENA + I1 RUVLO1 (3) 8.3.8 Internal Soft-Start The TPS54340 has an internal digital soft-start that ramps the reference voltage from zero volts to its final value in 1024 switching cycles.
TPS54340 www.ti.com SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 Feature Description (continued) 8.3.10 Accurate Current Limit Operation and Maximum Switching Frequency The TPS54340 implements peak current mode control in which the COMP terminal voltage controls the peak current of the high side MOSFET. A signal proportional to the high side switch current and the COMP terminal voltage are compared each cycle.
TPS54340 SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 www.ti.com Feature Description (continued) fSW(shift) = fDIV æç ICL ´ Rdc + VOUT(sc ) + Vd ´ tON ç VIN - ICL ´ RDS(on ) + Vd è IO Output current ICL Current limit Rdc inductor resistance VIN maximum input voltage ö ÷ ÷ ø (8) VOUT output voltage VOUTSC output voltage during short Vd diode voltage drop RDS(on) switch on resistance tON controllable on time ƒDIV frequency divide equals (1, 2, 4, or 8) 8.3.
TPS54340 www.ti.com SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 Feature Description (continued) SW SW EXT EXT IL IL Figure 27. Plot of Synchronizing in CCM Figure 28. Plot of Synchronizing in DCM SW EXT IL Figure 29. Plot of Synchronizing in Eco-Mode 8.3.12 Overvoltage Protection The TPS54340 incorporates an output overvoltage protection (OVP) circuit to minimize voltage overshoot when recovering from output fault conditions or strong unload transients in designs with low output capacitance.
TPS54340 SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 www.ti.com Feature Description (continued) The OVP feature minimizes output overshoot when using a low value output capacitor by comparing the FB terminal voltage to the rising OVP threshold which is nominally 109% of the internal voltage reference. If the FB terminal voltage is greater than the rising OVP threshold, the high side MOSFET is immediately disabled to minimize output overshoot.
TPS54340 www.ti.com SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 Feature Description (continued) As the load current increases and decreases, the low-frequency gain decreases and increases, respectively. This variation with the load may seem problematic at first glance, but fortunately the dominant pole moves with the load current (see Equation 11). The combined effect is highlighted by the dashed line in the right half of Figure 31.
TPS54340 SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 www.ti.com Feature Description (continued) VO R1 FB gmea Type 2A COMP Type 2B Type 1 Vref R2 RO R3 CO C2 C1 R3 C2 C1 Figure 32. Types of Frequency Compensation Aol A0 P1 Z1 P2 A1 BW Figure 33.
TPS54340 www.ti.
TPS54340 SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 www.ti.com 8.4 Device Functional Modes 8.4.1 Operation with VIN < 4.5 V (Minimum VIN) The device is recommended to operate with input voltages above 4.5 V. The typical VIN UVLO threshold is 4.3 V and the device may operate at input voltages down to the UVLO voltage. At input voltages below the actual UVLO voltage, the device will not switch.
TPS54340 www.ti.com SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 Device Functional Modes (continued) 8.4.3.2 Split Rail Power Supply The TPS54340 can be used to convert a positive input voltage to a negative output voltage. Idea applications are amplifiers requiring a negative power supply. For a more detailed example see SLVA317. VIN + Cin Cboot Lo Cd VIN BOOT GND SW R1 + GND TPS54340 R2 FB Co VOUT EN COMP Rcomp RT/CLK RT Czero Cpole Figure 35.
TPS54340 SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 www.ti.com 9 Application and Implementation 9.1 Application Information The TPS54340 is a 42 V, 3.5 A, step down regulator with an integrated high side MOSFET. Idea applications are: 12 V, 24 V Industrial, Automotive and Communications Power Systems. 9.2 Typical Application L1 5.6uH 3.3V, 3.5A VOUT C4 0.1uF U1 TPS54340DDA VIN 6V to 42V 2 3 C1 C2 2.2uF 2.2uF R1 365k 4 BOOT SW VIN GND EN COMP RT/CLK PWRPD 1 9 GND R2 86.
TPS54340 www.ti.com SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 Equation 7 and Equation 8 should be used to calculate the upper limit of the switching frequency for the regulator. Choose the lower value result from the two equations. Switching frequencies higher than these values results in pulse skipping or the lack of overcurrent protection during a short circuit. The typical minimum on time, tonmin, is 135 ns for the TPS54340. For this example, the output voltage is 3.
TPS54340 SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 LO(min ) = VIN(max ) - VOUT IOUT ´ KIND ´ www.ti.com VOUT 42 V - 3.3 V 3.3 V = ´ = 4.8 mH VIN(max ) ´ fSW 3.5 A x 0.3 42 V ´ 600 kHz (26) spacer IRIPPLE = VOUT ´ (VIN(max ) - VOUT ) VIN(max ) ´ LO ´ fSW = 3.3 V x (42 V - 3.3 V) = 0.905 A 42 V x 5.6 mH x 600 kHz (27) spacer IL(rms ) = (IOUT ) 2 ( æ 1 ç VOUT ´ VIN(max ) - VOUT + ´ 12 çç VIN(max ) ´ LO ´ fSW è )÷ö 2 ÷ = ÷ ø 2 (3.5 A ) 2 æ 3.3 V ´ (42 V - 3.3 V ) ö 1 + ´ ç ÷ = 3.
TPS54340 www.ti.com SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 Capacitance de-ratings for aging, temperature and dc bias increases this minimum value. For this example, 100 μF ceramic capacitors with 5 mΩ of ESR is used. The derated capacitance is 70 µF, well above the minimum required capacitance of 44.9 µF. Capacitors are generally rated for a maximum ripple current that can be filtered without degrading capacitor reliability.
TPS54340 SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 www.ti.com 9.2.2.5 Input Capacitor The TPS54340 requires a high quality ceramic type X5R or X7R input decoupling capacitor with at least 3 μF of effective capacitance. Some applications will benefit from additional bulk capacitance. The effective capacitance includes any loss of capacitance due to dc bias effects. The voltage rating of the input capacitor must be greater than the maximum input voltage.
TPS54340 www.ti.com SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 9.2.2.7 Undervoltage Lockout Set Point The Undervoltage Lockout (UVLO) can be adjusted using an external voltage divider on the EN terminal of the TPS54340. The UVLO has two thresholds, one for power up when the input voltage is rising and one for power down or brown outs when the input voltage is falling. For the example design, the supply should turn on and start switching once the input voltage increases above 5.75 V (UVLO start).
TPS54340 SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 www.ti.com To determine the compensation resistor, R4, use Equation 45. Assume the power stage transconductance, gmps, is 12 A/V. The output voltage, VO, reference voltage, VREF, and amplifier transconductance, gmea, are 5 V, 0.8 V and 350 μA/V, respectively. R4 is calculated to be 11.6 kΩ and a standard value of 11.5 kΩ is selected. Use Equation 46 to set the compensation zero to the modulator pole frequency.
TPS54340 www.ti.com IQ SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 is the operating nonswitching supply current. Therefore, PTOT = PCOND + PSW + PGD + PQ = 0.31 W + 0.123 W + 0.022 W + 0.0018 W = 0.457 W (53) For given TA, TJ = TA + RTH ´ PTOT (54) For given TJMAX = 150°C TA (max ) = TJ(max ) - RTH ´ PTOT (55) Where: Ptot is the total device power dissipation (W), TA is the ambient temperature (°C). TJ is the junction temperature (°C). RTH is the thermal resistance of the package (°C/W).
TPS54340 SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 500 mA/div C4: IL C2: VOUT ac coupled 10 mV/div 20 mV/div 10 V/div C1 1 A/div 10 V/div C1: SW www.ti.com C2 C4 C1: SW C1 C4: IL C4 C2 C2: VOUT ac coupled Time = 2 ms/div Time = 2 ms/div IOUT = 3.5 A IOUT = 100 mA 10 V/div Figure 42. Output Ripple DCM C1: SW C1 C1: SW C1 1 A/div C4: IL C4: IL C4 C2: VOUT ac coupled C3: VIN ac coupled C2 200 mV/div 20 mV/div 200 mA/div 10 V/div Figure 41.
TPS54340 SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 2 V/div 2 V/div www.ti.com VIN VIN VOUT VOUT Time = 40 ms/div EN Floating IOUT = 100 mA IOUT = 1 A Figure 48. Low Dropout Operation 100 100 90 90 80 80 70 70 Efficiency - % Efficiency - % Figure 47. Low Dropout Operation 60 50 40 30 20 60 50 40 30 20 6Vin 12Vin 24Vin 10 36Vin 42Vin 0 0.5 1.0 1.5 2.5 2.0 3.0 6Vin 12Vin 24Vin 10 0 0 0.001 3.5 VOUT = 3.3 V 36Vin 42Vin 0.1 0.
TPS54340 SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 www.ti.com 180 60 1 0.8 20 60 Gain 0 0 -60 -20 -40 -120 -60 -180 10 100 VIN = 12 V 1000 10000 100000 Output Voltage Deviation - % 120 Phase - degree Gain - dB Phase 40 0.6 0.4 0.2 0 -0.2 0.4 -0.6 -0.8 -1 0 1000000 0.5 1.0 1.5 2.0 2.5 3.0 3.5 IO - Output Current - A Frequency - Hz VOUT = 3.3 V IOUT = 3.5 A VIN = 12 V Figure 53. Overall Loop Frequency Response VOUT = 3.3 V ƒsw = 600 kHz Figure 54.
TPS54340 www.ti.com SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 11 Layout 11.1 Layout Guidelines Layout is a critical portion of good power supply design. There are several signal paths that conduct fast changing currents or voltages that can interact with stray inductance or parasitic capacitance to generate noise or degrade performance • To reduce parasitic effects, the VIN terminal should be bypassed to ground with a low ESR ceramic bypass capacitor with X5R or X7R dielectric.
TPS54340 SLVSBK0B – OCTOBER 2012 – REVISED MARCH 2014 www.ti.com 12 Device and Documentation Support 12.1 Trademarks Eco-mode, PowerPAD, WEBENCH are trademarks of Texas Instruments. 12.2 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.3 Glossary SLYZ022 — TI Glossary.
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PACKAGE OPTION ADDENDUM www.ti.com 31-Oct-2013 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PACKAGE MATERIALS INFORMATION www.ti.com 13-May-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPS54340DDAR Package Package Pins Type Drawing SO Power PAD DDA 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.8 Pack Materials-Page 1 6.4 B0 (mm) K0 (mm) P1 (mm) 5.2 2.1 8.0 W Pin1 (mm) Quadrant 12.
PACKAGE MATERIALS INFORMATION www.ti.com 13-May-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS54340DDAR SO PowerPAD DDA 8 2500 366.0 364.0 50.
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