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Vout(50mV/div)

Iout(2A/div)

100us/div

TPA54427DDA

TPS54427

www.ti.com

SLVSB43A –NOVEMBER 2011–REVISED JUNE 2013

4.5V to 18 V Input, 4-A Output Single Synchronous Step-Down Switcher with Integrated

FET (SWIFT™)

Check for Samples: TPS54427

FEATURES

DESCRIPTION

The TPS54427 is an adaptive on-time D-CAP2™

• D-CAP2™ Mode Enables Fast Transient

mode synchronous buck converter. The TPS54427

Response

enables system designers to complete the suite of

• Low Output Ripple and Allows Ceramic Output

various end equipment’s power bus regulators with a

Capacitor

cost effective, low component count, low standby

current solution.

• Wide V

Input Voltage Range: 4.5 V to 18 V

• Output Voltage Range: 0.76 V to 7.0 V

The main control loop for the TPS54427 uses the D-

CAP2™ mode control which provides a fast transient

• Highly Efficient Integrated FETs Optimized

response with no external compensation

for Lower Duty Cycle Applications

components.

– 70 mΩ (High Side) and 53 mΩ (Low Side)

The TPS54427 also has a proprietary circuit that

• High Efficiency, Less Than 10 μA at Shutdown

enables the device to adopt to both low equivalent

• High Initial Bandgap Reference Accuracy

series resistance (ESR) output capacitors, such as

• Adjustable Soft Start

POSCAP or SP-CAP, and ultra-low ESR ceramic

• Pre-Biased Soft Start capacitors.

• 650-kHz Switching Frequency (f

)

The device operates from 4.5-V to 18-V VIN input.

The output voltage can be programmed between

• Cycle By Cycle Over Current Limit

0.76 V and 7 V.

APPLICATIONS

The device also features an adjustable soft start time.

• Wide Range of Applications for Low Voltage

The TPS54427 is available in the 8-pin DDA package

System

and 10-pin DRC, and is designed to operate from

–40°C to 85°C.

– Digital TV Power Supply

– High Definition Blu-ray Disc™ Players

– Networking Home Terminal

– Digital Set Top Box (STB)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2D-CAP2 is a trademark of Texas Instruments.

3Blu-ray Disc is a trademark of Blu-ray Disc Association.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (26 pages)

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TPS54427 www.ti.com SLVSB43A – NOVEMBER 2011 – REVISED JUNE 2013 4.5V to 18 V Input, 4-A Output Single Synchronous Step-Down Switcher with Integrated FET (SWIFT™) Check for Samples: TPS54427 FEATURES DESCRIPTION • The TPS54427 is an adaptive on-time D-CAP2™ mode synchronous buck converter. The TPS54427 enables system designers to complete the suite of various end equipment’s power bus regulators with a cost effective, low component count, low standby current solution.
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TPS54427 SLVSB43A – NOVEMBER 2011 – REVISED JUNE 2013 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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TPS54427 www.ti.com SLVSB43A – NOVEMBER 2011 – REVISED JUNE 2013 RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) VIN Supply input voltage range Input voltage range MAX 4.5 18 –0.1 24 VBST (10 ns transient) -0.1 27 VBST(vs SW) –0.1 6 SS –0.1 5.7 EN –0.1 18 VFB –0.1 5.5 SW –1.8 18 VBST VI MIN SW (10 ns transient) UNIT V V –3 21 GND –0.1 0.1 –0.1 5.
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TPS54427 SLVSB43A – NOVEMBER 2011 – REVISED JUNE 2013 www.ti.com ELECTRICAL CHARACTERISTICS (continued) over operating free-air temperature range, VIN = 12 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT THERMAL SHUTDOWN TSDN Thermal shutdown threshold Shutdown temperature (2) 170 Hysteresis (2) °C 35 ON-TIME TIMER CONTROL tON On time VIN = 12 V, VO = 1.05 V 150 tOFF(MIN) Minimum off time TA = 25°C, VFB = 0.7 V 260 310 ns 7.
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TPS54427 www.ti.com SLVSB43A – NOVEMBER 2011 – REVISED JUNE 2013 DEVICE INFORMATION DEVICE INFORMATION DRC PACKAGE (TOP VIEW) DDA PACKAGE (TOP VIEW) 10 VIN EN 1 1 VIN EN 8 VFB 2 Exposed Thermal Die PAD on Underside PGND VREG5 3 2 POWER PAD VFB VBST 7 SS 4 GND 5 TPS54427 3 DDA VREG5 SW 6 GND 5 9 VIN 8 VBST 7 SW 6 SW HSOP8 4 SS PIN FUNCTIONS PIN NAME DESCRIPTION DDA DRC EN 1 1 Enable input control. Active high and must be pulled up to enable the device.
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TPS54427 SLVSB43A – NOVEMBER 2011 – REVISED JUNE 2013 www.ti.
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TPS54427 www.ti.com SLVSB43A – NOVEMBER 2011 – REVISED JUNE 2013 OVERVIEW The TPS54427 is a 4-A synchronous step-down (buck) converter with two integrated N-channel MOSFETs. It operates using D-CAP2™ mode control. The fast transient response of D-CAP2™ control reduces the output capacitance required to meet a specific level of performance. Proprietary internal circuitry allows the use of low ESR output capacitors including ceramic and special polymer types.
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TPS54427 SLVSB43A – NOVEMBER 2011 – REVISED JUNE 2013 www.ti.com cycle begins. In subsequent switching cycles, the on-time is set to a fixed value and the current is monitored in the same manner. If the over current condition exists for 7 consecutive switching cycles, the internal OCL threshold is set to a lower level, reducing the available output current.
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TPS54427 www.ti.com SLVSB43A – NOVEMBER 2011 – REVISED JUNE 2013 TYPICAL CHARACTERISTICS (continued) VIN = 12 V, TA = 25°C (unless otherwise noted) Figure 5. 1.05V OUTPUT VOLTAGE vs VIN VOLTAGE Figure 6. 1.05V 0A to 4-A LOAD TRANSIENT RESPONSE Figure 7. START UP WAVE FORM Figure 8. EFFICIENCY vs OUTPUT CURRENT Figure 9. SWITCHING FREQUENCY vs INPUT VOLTAGE Figure 10.
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TPS54427 SLVSB43A – NOVEMBER 2011 – REVISED JUNE 2013 www.ti.com TYPICAL CHARACTERISTICS (continued) VIN = 12 V, TA = 25°C (unless otherwise noted) 0.780 0.775 0.770 0.765 0.760 0.755 0.750 -50 0 50 100 Figure 11. VFB VOLTAGE vs JUNCTION TEMPERATURE Figure 12. VOLTAGE RIPPLE AT OUTPUT (IO = 4A) VIN (50mV/div) Figure 13.
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TPS54427 www.ti.com SLVSB43A – NOVEMBER 2011 – REVISED JUNE 2013 DESIGN GUIDE Step By Step Design Procedure To • • • • • begin the design process, you must know a few application parameters: Input voltage range Output voltage Output current Output voltage ripple Input voltage ripple VIN 4.5 to 18V VIN C1 10uF C2 10uF C3 0.1uF 1 2 U1 TPS54427DDA R3 10.0k EN 1 VIN EN 2 VOUT VBST VFB R1 8.25k 3 C4 1 SW VREG5 R2 22.1k C5 1uF 4 GND SS C6 8200pF 8 7 C7 0.1uF 6 5 VOUT 1.
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TPS54427 SLVSB43A – NOVEMBER 2011 – REVISED JUNE 2013 www.ti.com At low frequencies, the overall loop gain is set by the output set-point resistor divider network and the internal gain of the TPS54427. The low frequency phase is 180 degrees. At the output filter pole frequency, the gain rolls off at a –40 dB per decade rate and the phase drops rapidly.
PAGE 13
TPS54427 www.ti.com SLVSB43A – NOVEMBER 2011 – REVISED JUNE 2013 Bootstrap Capacitor Selection A 0.1-µF ceramic capacitor must be connected between the VBST to SW pin for proper operation. It is recommended to use a ceramic capacitor. VREG5 Capacitor Selection A 1-µF ceramic capacitor must be connected between the VREG5 to GND pin for proper operation. It is recommended to use a ceramic capacitor.
PAGE 14
TPS54427 SLVSB43A – NOVEMBER 2011 – REVISED JUNE 2013 www.ti.com LAYOUT CONSIDERATIONS 1. The TPS54427 can supply relatively large current up to 4A. So heat dissipation may be a concern. The top side area adjacent to the TPS54427 should be filled with ground as much as possible to dissipate heat. 2. The bottom side area directly below the IC should a dedicated ground area. It should be directed connected to the thermal pad of the using vias as shown. The ground area should be as large as practical.
PAGE 15
TPS54427 www.ti.com SLVSB43A – NOVEMBER 2011 – REVISED JUNE 2013 VIN FEEDBACK RESISTORS TO ENABLE CONTROL EN VIN HIGH FREQENCY BYPASS VIN CAPACITOR VFB VIN VBST VREG5 BIAS CAP SLOW START CAP ANALOG GROUND TRACE VIN INPUT BYPASS CAPACITOR SS SW GND SW BOOST CAPACITOR OUTPUT INDUCTOR OUTPUT FILTER CAPACITOR EXPOSED THERMAL PAD AREA Connection to POWER GROUND on internal or bottom layer VOUT POWER GROUND VIA to Ground Plane Figure 17.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 12-Jun-2014 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.
PAGE 18
PACKAGE MATERIALS INFORMATION www.ti.com 16-Jul-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS54427DDAR SO Power PAD DDA 8 2500 330.0 12.8 6.4 5.2 2.1 8.0 12.0 Q1 TPS54427DRCR SON DRC 10 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS54427DRCT SON DRC 10 250 180.0 12.4 3.3 3.3 1.1 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 16-Jul-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS54427DDAR SO PowerPAD DDA 8 2500 366.0 364.0 50.0 TPS54427DRCR SON DRC 10 3000 367.0 367.0 35.0 TPS54427DRCT SON DRC 10 250 210.0 185.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.