Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - DC/DC voltage regulator Holder QFN 14

PVIN

GND

BOOT

VSENSE

COMP

TPS54521

RT/CLK

SS/TR

Exposed Thermal PAD

Css

Rrt

Cboot

Cin

VIN

VOUT

PWRGD

100

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5

Load Current - A

Efficiency - %

VOUT = 5 V

VOUT = 3.3 V

VOUT = 1.8 V

VIN = 12 V,

Fsw = 500 kHz

TPS54521

www.ti.com

SLVS981C –JUNE 2010–REVISED AUGUST 2013

4.5V to 17V Input, 5A Synchronous Step Down Converter

Check for Samples: TPS54521

FEATURES

• Integrated 57mΩ / 50mΩ MOSFETs

• Power Good Output for Undervoltage and

Overvoltage Monitoring

• Split Power Rail: 1.6V to 17V on PVIN

• Adjustable Input Undervoltage Lockout

• 200kHz to 900kHz Switching Frequency

• Supported by SwitcherPro™ Software Tool

• Synchronizes to External Clock

• 0.8V Voltage Reference

APPLICATIONS

• Low 2uA Shutdown Quiescent Current

• Flat Panel Digital TVs

• Hiccup Overcurrent Protection

• Set Top Boxes, Personal Video Recorders

• Monotonic Start-Up into Prebiased Outputs

• Net Books

• –40°C to 125°C Operating Junction

• High Density 3.3V/5V Power Distribution from

Temperature Range

12 V Bus

• Pin-to-Pin Compatible with the TPS54620

• Adjustable Slow Start/Power Sequencing

DESCRIPTION

The TPS54521 is a full featured 17V, 5A synchronous step down converter which is optimized for small designs

through high efficiency and integrated high-side and low-side MOSFETs. Further space savings are achieved

through current mode control, which reduces component count, and by selecting a high switching frequency,

reducing the inductor's footprint.

The output voltage startup ramp is controlled by the SS/TR pin which allows operation as either a stand alone

power supply or in tracking situations. Power sequencing is also possible by correctly configuring the enable and

the open drain power good pins.

Cycle by cycle current limiting on the high-side FET protects the device in overload situations and is enhanced

by a low-side sourcing current limit which prevents current runaway. Hiccup protection will be triggered if the

overcurrent condition has persisted for longer than the preset time. Thermal shutdown disables the part when die

temperature exceeds thermal shutdown temperature. The TPS54521 is available in a 14 pin, 3.5mm x 3.5mm

QFN, thermally enhanced package.

WHITE SPACE

SIMPLIFIED SCHEMATIC

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2SwitcherPro is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (41 pages)

PAGE 1
TPS54521 www.ti.com SLVS981C – JUNE 2010 – REVISED AUGUST 2013 4.5V to 17V Input, 5A Synchronous Step Down Converter Check for Samples: TPS54521 FEATURES 1 • • • • • • • • • 2 • • • Integrated 57mΩ / 50mΩ MOSFETs Split Power Rail: 1.6V to 17V on PVIN 200kHz to 900kHz Switching Frequency Synchronizes to External Clock 0.
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TPS54521 SLVS981C – JUNE 2010 – REVISED AUGUST 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
PAGE 3
TPS54521 www.ti.com SLVS981C – JUNE 2010 – REVISED AUGUST 2013 THERMAL INFORMATION TPS54521 THERMAL METRIC (1) (2) QFN UNITS 14 PINS θJA 47.2 (3) θJA Junction-to-ambient thermal resistance θJCtop Junction-to-case (top) thermal resistance 64.8 θJB Junction-to-board thermal resistance 14.4 ψJT Junction-to-top characterization parameter 0.5 ψJB Junction-to-board characterization parameter 14.7 θJCbot Junction-to-case (bottom) thermal resistance 3.
PAGE 4
TPS54521 SLVS981C – JUNE 2010 – REVISED AUGUST 2013 www.ti.com ELECTRICAL CHARACTERISTICS TJ= –40°C to 125°C, VIN = 4.5V to 17V, PVIN = 1.6V to 17V (unless otherwise noted) DESCRIPTION CONDITIONS MIN TYP MAX UNIT SUPPLY VOLTAGE (VIN AND PVIN PINS) PVIN operating input voltage 1.6 17 V VIN operating input voltage 4.5 17 V 4.5 V VIN internal UVLO threshold VIN rising 4.
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TPS54521 www.ti.com SLVS981C – JUNE 2010 – REVISED AUGUST 2013 ELECTRICAL CHARACTERISTICS (continued) TJ= –40°C to 125°C, VIN = 4.5V to 17V, PVIN = 1.
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TPS54521 SLVS981C – JUNE 2010 – REVISED AUGUST 2013 www.ti.com DEVICE INFORMATION PIN ASSIGNMENTS RT/CLK 1 PWRGD 14 GND 2 13 BOOT GND 3 PVIN 4 PVIN 5 12 PH Exposed Thermal Pad (15) VIN 6 11 PH 10 EN 9 SS/TR 7 VSENSE 8 COMP PIN FUNCTIONS PIN NAME DESCRIPTION No. RT/CLK 1 Automatically selects between RT mode and CLK mode. An external timing resistor adjusts the switching frequency of the device; In CLK mode, the device synchronizes to an external clock.
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TPS54521 www.ti.
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TPS54521 SLVS981C – JUNE 2010 – REVISED AUGUST 2013 www.ti.com TYPICAL CHARACTERISTICS CHARACTERISTIC CURVES HIGH-SIDE Rdson vs TEMPERATURE LOW-SIDE Rdson vs TEMPERATURE 75 VIN = 12 V RDS(on) – On Resistance – mΩ RDS(on) – On Resistance – mΩ 80 70 60 50 40 –50 –25 0 25 50 75 100 VIN = 12 V 65 55 45 35 –50 125 –25 TJ – Junction Temperature – °C 0 Figure 1.
PAGE 9
TPS54521 www.ti.com SLVS981C – JUNE 2010 – REVISED AUGUST 2013 TYPICAL CHARACTERISTICS (continued) EN PIN PULL-UP CURRENT vs TEMPERATURE EN PIN UVLO THRESHOLD vs TEMPERATURE 1.20 1.24 VIN = 12 V EN – UVLO Threshold – V Ip – Pullup Current – µA VIN = 12 V EN = 1.1 V 1.15 1.10 1.05 1.00 –50 –25 0 25 50 75 100 1.23 1.22 1.21 1.20 –50 125 –25 TJ – Junction Temperature – °C 0 75 100 125 Figure 8.
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TPS54521 SLVS981C – JUNE 2010 – REVISED AUGUST 2013 www.ti.com TYPICAL CHARACTERISTICS (continued) HIGH-SIDE CURRENT LIMIT THRESHOLD vs INPUT VOLTAGE MINIMUM CONTROLLABLE ON TIME vs TEMPERATURE Tonmin – Minimum Controllable On Time – ns Icl – Current Limit Threshold – A 11 TJ = –40°C 10 TJ = 25°C 9 8 TJ = 125°C 13 8 VIN = 12 V IOUT = 2 A 110 100 90 80 70 –50 7 3 120 18 –25 0 Figure 13. 75 100 125 BOOT-PH UVLO THRESHOLD vs TEMPERATURE 6 2.
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TPS54521 www.ti.com SLVS981C – JUNE 2010 – REVISED AUGUST 2013 TYPICAL CHARACTERISTICS (continued) The device reduces the external component count by integrating the boot recharge circuit. The bias voltage for the integrated high-side MOSFET is supplied by a capacitor between the BOOT and PH pins. The boot capacitor voltage is monitored by a BOOT to PH UVLO (BOOT-PH UVLO) circuit allowing PH pin to be pulled low to recharge the boot capacitor.
PAGE 12
TPS54521 SLVS981C – JUNE 2010 – REVISED AUGUST 2013 www.ti.com Adjusting the Output Voltage The output voltage is set with a resistor divider from the output (VOUT) to the VSENSE pin. It is recommended to use 1% tolerance or better divider resistors. Referring to the application schematic of Figure 34, start with a 10 kΩ resistor for R9 and use Equation 1 to calculate R8. To improve efficiency at light loads, consider using larger value resistors.
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TPS54521 www.ti.com SLVS981C – JUNE 2010 – REVISED AUGUST 2013 TPS54521 VIN ip ih R1 R2 EN Figure 17. Adjustable VIN Under Voltage Lock Out TPS54521 PVIN ip ih R1 R2 EN Figure 18. Adjustable PVIN Under Voltage Lock Out, VIN ≥ 4.5V TPS54521 PVIN VIN ip ih R1 R2 EN Figure 19.
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TPS54521 SLVS981C – JUNE 2010 – REVISED AUGUST 2013 www.ti.com In RT mode, a resistor (RT resistor) is connected between the RT/CLK pin and GND. The switching frequency of the device is adjustable from 200 kHz to 900 kHz by using a maximum of 240 kΩ and minimum of 53 kΩ respectively. In CLK mode, an external clock is connected directly to the RT/CLK pin. The device is synchronized to the external clock frequency with a PLL. The CLK mode overrides the RT mode.
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TPS54521 www.ti.com SLVS981C – JUNE 2010 – REVISED AUGUST 2013 RT/CLK mode select TPS54521 RT/CLK Rrt Figure 21. Works with Both RT mode and CLK mode Slow Start (SS/TR) The device uses the lower voltage of the internal voltage reference or the SS/TR pin voltage as the reference voltage and regulates the output accordingly. A capacitor on the SS/TR pin to ground implements a slow start time. The device has an internal pull-up current source of 2.3μA that charges the external slow start capacitor.
PAGE 16
TPS54521 SLVS981C – JUNE 2010 – REVISED AUGUST 2013 www.ti.com The sequential method is illustrated in Figure 22 using two TPS54521 devices. The power good of the first device is coupled to the EN pin of the second device which enables the second power supply once the primary supply reaches regulation. Figure 23 shows the results of Figure 22. TPS54521 TPS54521 PWRGD = 2 V / div PWRGD EN EN SS/TR SS/TR EN = 2 V / div Vout1 = 1 V / div PWRGD Vout2 = 1 v / div Time = 2 msec / div Figure 22.
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TPS54521 www.ti.com SLVS981C – JUNE 2010 – REVISED AUGUST 2013 The deltaV variable is zero volts for simultaneous sequencing. To minimize the effect of the inherent SS/TR to VSENSE offset (Vssoffset, 29mV) in the slow start circuit and the offset created by the pull-up current source (Iss, 2.3μA) and tracking resistors, the Vssoffset and Iss are included as variables in the equations. Figure 29 shows the result when deltaV = 0V.
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TPS54521 SLVS981C – JUNE 2010 – REVISED AUGUST 2013 www.ti.com EN = 2 V / div Vout1 = 1 V / div Vout2 = 1 V / div Time = 2 msec / div Figure 28. Ratio-metric Startup with Vout2 Leading Vout1 EN = 2 V / div Vout1 = 1 V / div Vout2 = 1 V / div Time = 2 msec / div Figure 29. Simultaneous Startup Output Overvoltage Protection (OVP) The device incorporates an output overvoltage protection (OVP) circuit to minimize output voltage overshoot.
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TPS54521 www.ti.com SLVS981C – JUNE 2010 – REVISED AUGUST 2013 During normal operation, the device implements current mode control which uses the COMP pin voltage to control the turn off of the high-side MOSFET and the turn on of the low-side MOSFET, on a cycle by cycle basis. Each cycle, the switch current and the current reference generated by the COMP pin voltage are compared. When the peak switch current intersects the current reference, the high-side switch is turned off.
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TPS54521 SLVS981C – JUNE 2010 – REVISED AUGUST 2013 www.ti.com Simple Small Signal Model for Peak Current Mode Control Figure 31 is a simple small signal model that can be used to understand how to design the frequency compensation. The device's power stage can be approximated to a voltage controlled current source (duty cycle modulator) supplying current to the output capacitor and load resistor.
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TPS54521 www.ti.com ¦z = SLVS981C – JUNE 2010 – REVISED AUGUST 2013 1 CO ´ RESR ´ 2p (13) Where gmea is the GM amplifier gain (1300μA/V) gmps is the power stage gain (12A/V). RL is the load resistance CO is the output capacitance. RESR is the equivalent series resistance of the output capacitor.
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TPS54521 SLVS981C – JUNE 2010 – REVISED AUGUST 2013 www.ti.com RESR ´ Co R4 (16) 5. Type III compensation can be implemented with the addition of one capacitor, C11. This allows for slightly higher loop bandwidths and higher phase margins. If used, C11 is calculated from Equation 17.
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TPS54521 www.ti.com SLVS981C – JUNE 2010 – REVISED AUGUST 2013 Operating Frequency The first step is to decide on a switching frequency for the regulator. There is a trade off between higher and lower switching frequencies. Higher switching frequencies may produce a smaller solution size using lower valued inductors and smaller output capacitors compared to a power supply that switches at a lower frequency.
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TPS54521 SLVS981C – JUNE 2010 – REVISED AUGUST 2013 www.ti.com change in load current and output voltage and adjust the duty cycle to react to the change. The output capacitor must be sized to supply the extra current to the load until the control loop responds to the load change. The output capacitance must be large enough to supply the difference in current for 2 clock cycles while only allowing a tolerable amount of droop in the output voltage.
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TPS54521 www.ti.com SLVS981C – JUNE 2010 – REVISED AUGUST 2013 The value of a ceramic capacitor varies significantly over temperature and the amount of DC bias applied to the capacitor. The capacitance variations due to temperature can be minimized by selecting a dielectric material that is stable over temperature. X5R and X7R ceramic dielectrics are usually selected for power regulator capacitors because they have a high capacitance to volume ratio and are fairly stable over temperature.
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TPS54521 SLVS981C – JUNE 2010 – REVISED AUGUST 2013 www.ti.
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TPS54521 www.ti.com SLVS981C – JUNE 2010 – REVISED AUGUST 2013 Application Curves from the Design Example STARTUP with VIN (1 Ω Load) LOAD TRANSIENT Vin = 12 V Vout = 50 mV / div (AC coupled) Vin = 10 V / div EN = 2 V / div SS/TR = 1 V / div Iout = 1 A / div (0 A to 3 A load step) Vout = 2 V / div Time = 2 msec / div Time = 50 μsec / div Figure 35. Figure 36.
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TPS54521 SLVS981C – JUNE 2010 – REVISED AUGUST 2013 www.ti.com STARTUP and SHUTDOWN on EN with PRE-BIAS (1 Ω Load) SHUTDOWN with VIN (1 Ω Load) Vin = 10 V / div EN = 2 V / div EN = 2 V / div SS/TR = 1 V / div Vout = 2 V / div Vout = 2 V / div Vout starting and stopping from 1 V pre-bias voltage Time = 2 msec / div Time = 2 msec / div Figure 41. Figure 42.
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TPS54521 www.ti.com SLVS981C – JUNE 2010 – REVISED AUGUST 2013 CLOSED LOOP RESPONSE LINE REGULATION 0.05 180 60 150 50 0.04 Phase 40 120 30 90 Gain - dB Gain 10 30 0 0 -30 -10 -60 -20 -90 -30 Vin = 12 V Load = 5 A -40 -120 Percent Line Regulation - % 60 20 Phase - Deg 0.03 0.02 Iout = 5 A 0.01 0 Iout = 2.5 A -0.01 -0.02 -0.03 -60 -180 100000 10000 100 Frequency - Hz Iout = 0 A -0.04 1000000 -150 1000 -50 -0.05 8 9 10 11 12 13 14 15 16 Figure 47.
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TPS54521 SLVS981C – JUNE 2010 – REVISED AUGUST 2013 www.ti.com EFFICIENCY vs LOAD CURRENT 100 95 90 Efficiency - % 85 Vin = 8 V Vin = 12 V 80 Vin = 17 V 75 70 65 60 55 50 0 1 3 2 Load Current - A 4 5 Figure 53. Thermal Performance Figure 54. Thermal Signature of Example Circuit Operating at VIN=12V,VOUT=5V/5A, TA = Room Temperature Table 2. Bill of Materials COUNT 30 RefDes Value Description Size Part Number MFR 1 C2 10µF Capacitor, Ceramic, 25V, X5R, 20% 1206 Std Std 1 C3 4.
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TPS54521 www.ti.com SLVS981C – JUNE 2010 – REVISED AUGUST 2013 Table 2. Bill of Materials (continued) COUNT 1 RefDes U1 Value Description Size Part Number MFR TPS54521RHL IC, 17V Input, 5A Output, Sync. Step Down Switcher With Integrated FET QFN14 TPS54521RHL TI PCB Layout Guidelines Layout is a critical portion of good power supply design. See Figure 55 for a PCB layout example. The top layer contains the main power traces for VIN, VOUT, and the PH node.
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TPS54521 SLVS981C – JUNE 2010 – REVISED AUGUST 2013 www.ti.com TOPSIDE GROUND AREA FREQUENCY SET RESISTOR PVIN INPUT BYPASS CAPACITOR RT/CLK PWRGD GND GND OUTPUT FILTER CAPACITOR BOOT CAPACITOR BOOT EXPOSED THERMAL PAD AREA PH PVIN PH PVIN EN VIN SS/TR VSENSE PVIN OUTPUT INDUCTOR VOUT PH COMP VIN SLOW START CAPACITOR UVLO SET RESISTORS VIN INPUT BYPASS CAPACITOR FEEDBACK RESISTORS COMPENSATION NETWORK ANALOG GROUND TRACE 0.010 in.
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TPS54521 www.ti.com SLVS981C – JUNE 2010 – REVISED AUGUST 2013 REVISION HISTORY Changes from Original (July 2010) to Revision A Page • Added "Type 3" block around C11 ..................................................................................................................................... 21 • Changed Equation 25 .........................................................................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 8-Feb-2014 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
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PACKAGE MATERIALS INFORMATION www.ti.com 19-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS54521RHLR VQFN RHL 14 3000 330.0 12.4 3.75 3.75 1.15 8.0 12.0 Q1 TPS54521RHLT VQFN RHL 14 250 180.0 12.4 3.75 3.75 1.15 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 19-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS54521RHLR VQFN RHL 14 3000 367.0 367.0 35.0 TPS54521RHLT VQFN RHL 14 250 210.0 185.0 35.
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