Datasheet

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VIN

GND

BOOT

VSENSE

COMP

TPS55010

RT/CLK

FAULT

boot

3 V

5.5 V

1:2.5

PRI

5 V

200mA

100

0.00 0.05 0.10 0.15 0.20 0.25 0.30

Output Current (A)

Efficiency (%)

= 5V

OUT

= 5V

= 350kHz

G040

TPS55010

www.ti.com

SLVSAV0A –APRIL 2011–REVISED JUNE 2011

2.95V To 6V Input, 2W, Isolated DC/DC Converter with Integrated FETs

Check for Samples: TPS55010

FEATURES

DESCRIPTION

The TPS55010 is a transformer driver designed to

• Isolated Fly-Buck™ Topology

provide isolated power for isolated interfaces, such as

• Primary Side Feedback

RS-485 and RS-232, from 3.3V or 5V input supply.

• 100 kHz to 2000 kHz Switching Frequency

The device uses fixed frequency current mode control

• Synchronizes to External Clock

and half bridge power stage with primary side

• Adjustable Slow Start

feedback to regulate the output voltage for power

levels up to 2W. The switching frequency is

• Adjustable Input Voltage UVLO

adjustable from 100 kHz to 2000 kHz so solution size,

• Open Drain Fault Output

efficiency and noise can be optimized. The switching

• Cycle-by-Cycle Current Limit

frequency is set with a resistor or is synchronized to

external clock using the RT/CLK pin. To minimize

• Thermal Shutdown Protection

inrush currents, a small capacitor can be connected

• 3 mm x 3 mm 16 Pin QFN Package

to the SS pin. The EN pin can be used as an enable

pin or to increase the default input UVLO voltage

APPLICATIONS

from 2.6V.

• Noise Immunity in PLCs, Data Acquisition and

With the same transformer the TPS55010 can

Measurement Equipment

provide a solution for different input and output

• Isolated RS-232 and RS-485 Communication voltage combinations by adjusting the primary side

voltage. Off the shelf transformers are available to

Channels

provide single positive, or dual positive and negative

• Powers Line Drivers, ISO Amplifiers, Sensors,

output voltages.

CAN Transceivers

The TPS55010 is available in a 3 mm x 3 mm 16 pin

• Floating Supplies for IGBT Gate Drivers

QFN package with thermal pad.

• Promotes Safety in Medical Equipment

Figure 1. SIMPLIFIED SCHEMATIC

Figure 2. Efficiency vs Load Current

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2Fly-Buck is a trademark of Texas Instruments.

3All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (41 pages)

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TPS55010 www.ti.com SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 2.95V To 6V Input, 2W, Isolated DC/DC Converter with Integrated FETs Check for Samples: TPS55010 FEATURES DESCRIPTION • • • • • • • • • • The TPS55010 is a transformer driver designed to provide isolated power for isolated interfaces, such as RS-485 and RS-232, from 3.3V or 5V input supply.
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TPS55010 SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. PIN CONFIGURATION VIN EN FAULT BOOT RTE PACKAGE (TOP VIEW) 16 15 14 13 VIN 1 VIN 2 5 6 7 8 RT/CLK 4 COMP GND VSENSE 3 GND GND Thermal Pad (17) 12 PH 11 PH 10 PH 9 SS Table 1.
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TPS55010 www.ti.
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TPS55010 SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 ABSOLUTE MAXIMUM RATINGS www.ti.com (1) over operating free-air temperature range (unless otherwise noted) PARAMETER CONDITIONS MIN MAX UNIT VIN EN -0.3 7 V -0.3 3.6 V PH + 7 V BOOT Voltage VSENSE -0.3 3 V COMP -0.3 3 V FAULT -0.3 7 V SS -0.3 3 V RT/CLK -0.3 6 V 7 V 7 V BOOT-PH PH -0.
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TPS55010 www.ti.com SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 ELECTRICAL CHARACTERISTICS TJ = –40°C TO 150°C, VIN = 2.95V TO 6V (unless otherwise noted) DESCRIPTION CONDITIONS MIN Operating input voltage VIN 2.95 Shutdown current EN = 0V, 25°C Operating current VSENSE = 0.9V, 25°C TYP MAX UNIT SUPPLY VOLTAGE Internal undervoltage lockout 6 V 2 5 µA 360 575 µA 2.6 2.9 V 1.25 1.37 V ENABLE Enable threshold Input current rising falling 1.15 1.18 Threshold - 50mV -1.
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TPS55010 SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 www.ti.com ELECTRICAL CHARACTERISTICS (continued) TJ = –40°C TO 150°C, VIN = 2.95V TO 6V (unless otherwise noted) DESCRIPTION CONDITIONS MIN TYP MAX UNIT Charge current V(SS) = 0.4 V 0.5 SS to VSENSE matching V(SS) = 0.4 V SS to reference Crossover 98% reference 1.1 V SS discharge current (overload) VSENSE = 0 V 325 µA SS discharge voltage VSENSE = 0V 46 mV SS discharge current (UVLO, EN, thermal fault) V(SS) = 0.5 V 1.
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TPS55010 www.ti.com SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 TYPICAL CHARACTERISTICS (continued) 1.240 300 VIN = 5V 1.235 1.230 VENA− Enable (V) Transconductance (µA) 250 200 150 100 1.225 1.220 Rising Falling 1.215 1.210 1.205 1.200 1.195 50 1.190 0 −50 −25 0 25 50 75 100 Junction Temperature (°C) 125 0 25 50 75 100 Junction Temperature (°C) 125 150 G006 Figure 8. EN PIN VOLTAGE vs TEMPERATURE −0.1 −3.24 VIN = 5V −0.2 VIN = 5V −3.26 ENA− Enable Hyst (µA) −0.3 −0.4 −0.5 −0.6 −0.
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TPS55010 SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) 2.5 400 EN = Open VSENSE = 0.9V 2.0 380 Supply Current (µA) Shutdown Current (µA) EN = 0V 1.5 1.0 0.5 360 340 320 VIN = 5V VIN = 3.3V 0.0 −50 −25 0 25 50 75 100 Junction Temperature (°C) 125 VIN = 5V VIN = 3.3V 300 −50 150 Figure 13. SHUTDOWN SUPPLY CURRENT vs TEMPERATURE 0.831 0.830 0.829 0.828 0.827 0.
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TPS55010 www.ti.com SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 Detailed Description The TPS55010 is a half bridge transformer driver designed to implement a high efficiency, low power isolated supply. The primary side feedback implemented using two resistors and a primary side capacitor provides excellent regulation over line and load compared to an open loop push pull converter. The half bridge power stage consists of two integrated n-channel MOSFETs with 45 mΩ on resistance.
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TPS55010 SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 www.ti.com N VOUT = VPRI × SEC - Vfd NPRI (2) spacer VIN Npri:Nsec PH VFD VO CO TPS55010 VSENSE - RHS + 0.829V VPRI RLS GND CPRI Figure 19. Setting the Output Voltage Enable and Adjusting Undervoltage Lockout The TPS55010 is disabled when the VIN pin voltage falls below 2.6 V.
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TPS55010 www.ti.com SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 RUVLO1 × VENfalling VSTOP - VENfalling + RUVLO1 × (I1 + IHYS ) RUVLO2 = (4) Adjusting Slow Start Time A capacitor on the SS pin to ground implements a slow start time to minimize inrush current during startup. The TPS55010 regulates to the lower of the SS pin and the internal reference voltage. The TPS55010 has an internal pull-up current source of 2.2 µA which charges the external slow start capacitor.
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TPS55010 SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 www.ti.com TPS55010 TPS55010 RT/CLK RT/CLK PLL PLL RT Clock Source Hi-Z Clock Source RT Figure 21. Synchronizing to a System Clock Overcurrent Protection The TPS55010 implements a cycle by cycle current limit. During each switching cycle the high side switch current is compared to the voltage on the COMP pin. When the instantaneous switch current intersects the COMP voltage, the high side switch is turned off.
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TPS55010 www.ti.com SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 During the off time of SHS, SLS conducts and the voltage on CPRI continues to increase during a portion of the SLS conduction time. The voltage increase is due to the energy transfer from LPRI to CPRI. For the remaining portion of the SLS conduction time, the CPRI voltage decreases because of current in LPRI reverses; see the ILPRI and VPRI waveforms in Figure 23.
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TPS55010 SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 www.ti.com 2 æ æN ö÷ ÷ö çç RO ç PRI ÷÷ ÷÷÷ RLM + çç × çç ççè (1- D) èç NSEC ø÷÷ ÷÷ø V̂PRI » æ V̂C s ÷÷ö Ri × ççç1 + ÷ 2 × p x fPOLE ÷÷ø èç (9) Spacer fPOLE = 1 2 2 æ æN ö ÷ö æç æN ö ÷ö ç RO ÷ ÷ ÷ ç ÷ ç SEC ç PRI ç 2 × p ×çç × çç ÷÷ ÷÷ × ç(1 - D) × CO × çç ÷÷ + CPRI ÷÷÷ çè NPRI ÷÷ø çèç(1 - D) çè NSEC ÷÷ø ÷÷ø ççè ÷ø (10) SHS SLS ILpri_pospk ILpri Im_valley ILpri_negpk Vpri ID1_pk ID1 DTs (1-D) x Ts Figure 23.
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TPS55010 www.ti.com SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 Overview The following design example illustrates how to determine the components for a single output isolated power supply. TI offers an EVM (TPS55010EVM-009) with user guide (SLVU459) and excel calculator tool (SLVC363) to expedite the design process. The support material is available on the TPS55010 product folder at www.ti.com. INPUT VIN BOOT +5V CIN TPS55010 CBOOT T1 1:2.
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TPS55010 SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 www.ti.com TURNS RATIO The transformer turns ratio is calculated using the desired output voltage, diode voltage and the primary voltage. Assuming a diode voltage of 0.5 V, VOUT of 5 V, VPRI of 2.2 V yields a NPRI:NSEC turns ratio of 1:2.5. NSEC = NPRI VOUT + VFD VPRI (12) VOLTAGE FEEDBACK Selecting 61.9 kΩ for the RLS, RHS is calculated to be 102.4 kΩ using Equation 13. Choose 100 kΩ as the nearest standard value.
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TPS55010 www.ti.
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TPS55010 SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 www.ti.com SECONDARY SIDE DIODE The diode should be selected to handle the voltage stress and rms current calculated in Equation 26 and Equation 27. Typically, a low duty cycle or high turns ratio design will have a larger voltage stress on the diode. At the maximum input voltage of 5.5V, the Vdiode_max voltage is calculated at 13.3 V. The rms current is calculated as 0.31 A. The diode peak current is 0.
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TPS55010 www.ti.com SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 The input capacitance is calculated 12.6 µF using Equation 32 and the rms current is 0.46 A. A 47 µF/10V X5R ceramic capacitor is used on the input. A 0.1 µF ceramic capacitor is placed as close to the VIN and GND pins as possible for a good bias supply.
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TPS55010 SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 wPOLE 2×p < fCO < 20 × www.ti.com wPOLE 2×p (34) Spacer æ RO ÷ö çç R ÷÷ + æ 2×p×f ö ççç LM (1 - D)÷÷ CO ÷÷ ÷÷ - 20 × logççç A COMP = 20 × logç ÷÷ ç ÷ Ri èç 2 × p × fPOLE ÷ø ÷÷÷ ççç ÷ø çè (35) Spacer VPRI fCOMP_POLE = 10 Acomp 20 × fCO × A OL × VREF (36) Spacer 1 CCOMP = 2×p× A OL gmea - × fCOMP_POLE gmea 2 × p × BW (37) VENDORS At the time of the product release, there are two catalog transformers available for the TPS55010.
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TPS55010 www.ti.com SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 HOW TO SPECIFY A Fly-Buck TRANSFORMER If a catalog or standard off the shelf transformer is not available, use this section to determine the transformer specifications to supply a vendor. Selecting the magnetizing inductance is similar to the conventional flyback converter operating in continuous conduction mode. One distinction is the voltage across the transformer during the on time is different.
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TPS55010 SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 www.ti.com CHARACTERISTICS 6 100 90 5.75 80 5.5 Output Voltage (V) Efficiency (%) 70 60 50 40 VOUT = 5V FSW = 350kHz 30 10 0 0.00 0.05 0.10 0.15 0.20 Output Current (A) 0.25 5 4.75 4.5 VIN = 4.5V VIN = 4.75V VIN = 5V VIN = 5.25V VIN = 5.5V 20 5.25 VIN = 4.5V VIN = 4.75V VIN = 5V VIN = 5.25V VIN = 5.5V 4.25 0.30 4 0 0.05 0.1 0.15 0.2 Output Current (A) 0.25 0.3 G040 Figure 26. Efficiency vs Output Current G025 Figure 27.
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TPS55010 www.ti.com SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 VIN = 5 V / div EN = 5 V / div VOUT = 2 V / div VOUT = 2 V / div VPRI = 2 V / div VPRI = 2 V / div ILOAD = 200 mA / div ILOAD = 200 mA / div Time = 20 msec / div Time = 10 msec / div Figure 30. Power Up with Enable Pin Figure 31.
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TPS55010 SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 www.ti.com VPRI = 500 mV / div (ac coupled) VIN = 50 mV / div (ac coupled) RT/CLK = 5 V / div VIN = 5 V VIN = 5 V IOUT = 200 mA IOUT = 200 mA PH = 5 V / div RT/CLK = 5 V / div PH = 5 V / div VOUT = 50 mV / div (ac coupled) VOUT = 50 mV / div (ac coupled) Time = 1 ms / div Time = 1 ms / div Figure 34. Output Ripple Voltage Figure 35.
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TPS55010 www.ti.com SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 VIN = 2 V / div VIN = 2 V / div VOUT = 50 mV / div (ac coupled) VOUT = 50 mV / div (ac coupled) ILOAD = 100 mA / div ILOAD = 100 mA / div IOUT = 200 mA IOUT = 200 mA Time = 40 ms / div Time = 40 ms / div Figure 38. Line Step Response Figure 39.
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TPS55010 SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 www.ti.com POWER DISSIPATION BOOT INPUT VIN +5V CBOOT PH TPS55010 CIN EN NPRI FAULT Rt + COpos Nsec1 VOpos COneg Nsec2 + _ VOneg _ VSENSE SS RT/CLK GND COMP CSS T1 Dpos 1:8:8 RHS Dneg CPRI RLS CY CC Figure 42. 5V to 15V/-15V Isolated Power Supply DESIGN GUIDE – STEP-BY-STEP DESIGN PROCEDURE Table 5. Input Voltage 5V nominal (4.5V to 5.
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TPS55010 www.ti.com SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 Turns Ratio The transformer turns ratio is calculated using the desired output voltages, diode voltages and the primary voltage. Assuming diode voltages of 0.5 V, VOpos of 15 V, VOneg of -15V and a VPRI of 1.93 V yields a NPRI x NSEC1 x NSEC2 turns ratio of 1:8:8.
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TPS55010 SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 Im_ ripple = www.ti.com VIN × D × (1 - D) f sw × LOPRI (46) Spacer 1 æ ö2 D IHS _ rms » ççD × IOPN2 + × Im_ripple2 ÷÷÷ çè ø 12 (47) Spacer 1 æ 3×D-1 ö÷2 Im_ripple 1-D ILS _ rms » ççç × IOPN2 + × IOPN + × Im_ripple2 ÷÷ ÷ø çè 3 × (1 - D) 3 12 (48) PRIMARY SIDE CAPACITOR The ΔVPRI voltage should be less than 10% of VPRI. The rated RMS current of CPRI should be greater than Equation 49.
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TPS55010 www.ti.com SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 I I Idiode_peak = 2 × OPOS = 2 × ONEG 1-D 1-D (54) Spacer 1 2 æ 1 ÷÷ö = 2 x I Idiode _ rms = 2 x IOPOS x çç ONEG çè 3 x (1 - D) ÷ø 1 æ ö÷2 1 xç ÷ çç è 3 x (1 - D) ø÷ (55) Spacer Pdiode = VFD × IOPOS = VFD × IONEG (56) SECONDARY SIDE CAPACITOR The ΔVCOPOS and ΔVCONEG voltage should be 0.25% to 1% of the respective nominal voltage.
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TPS55010 SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 www.ti.com capacitor ripple voltage is <1%. Type 2 or 3 compensation should be considered if a low primary ripple design is preferred. To get started, the modulator pole frequency, fPOLE, determined from Equation 61 should be used to select the crossover frequency, fCO. In this example, 0.4 kHz is selected as the crossover frequency. The next step is to determine the compensation gain, ACOMP , at the crossover frequency to compensate the loop.
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TPS55010 www.ti.com SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 18 100 −12 VIN = 5 V IOPOS = IONEG IOPOS = IONEG 95 17 −13 16 −14 15 −15 14 −16 90 Positive Voltage (V) 85 Efficiency (%) 80 75 70 65 13 60 VIN = 4.5V VIN = 4.75V VIN = 5V 55 50 0.00 0.01 0.02 0.03 Output Current (A) 0.04 −17 VOPOS VONEG 12 0 0.01 0.05 0.02 0.03 Output Current (A) 0.04 −18 0.05 G051 G050 Figure 43. Efficiency vs Output Current Figure 44.
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TPS55010 SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 www.ti.com VIN = 5 V IOPOS = IONEG = 40 mA EN = 5 V / div VIN = 2 V / div VOPOS = 10 V / div VOPOS = 10 V / div VONEG = 10 V / div VONEG = 10 V / div VPRI = 2 V / div VPRI = 2 V / div VIN = 5 V IOPOS = IONEG = 40 mA Time = 20 ms / div Time = 20 ms / div Figure 47. Power Up with Enable Pin Figure 48.
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TPS55010 www.ti.com SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 VOPOS = 500 mV / div VOPOS = 500 mV / div (ac coupled) VONEG = 500 mV / div (ac coupled) VONEG = 500 mV / div (ac coupled) VIN = 2 V / div VIN = 5 V / div IPOS = 50 mA / div VIN = 5 V IOPOS = IONEG = 40 mA to 20 mA VIN = 4.5 V to 5.5 V IOPOS = IONEG = 40 mA IPOS = 50 mA / div Time = 40 ms / div Time = 40 ms / div Figure 51. Load Step Response Figure 52.
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TPS55010 SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 www.ti.com VIN = 5 V IOPOS = IONEG = 40 mA VIN = 50 mV / div (ac coupled) Gain (dB) VONEG = 50 mV / div (ac coupled) 50 180 40 135 30 90 20 45 10 0 IDPOS = 100 mA / div 0 −45 −10 −90 VIN = 5 V IOPOS = IONEG = 40 mA ILPRI = 2 A / div −20 −135 Gain Phase −30 Time = 400 ns / div 1 10 100 1k 10k Frequency (Hz) 100k −180 1M G055 Figure 55. Steady State Waveforms Figure 56. Frequency Response Table 6.
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TPS55010 www.ti.com SLVSAV0A – APRIL 2011 – REVISED JUNE 2011 PCB LAYOUT Layout is a critical portion of good power supply design. There are several signal paths that conduct fast changing currents or voltages that can interact with stray inductance or parasitic capacitance to generate noise or degrade the power supplies performance. Care should be taken to minimize the loop area formed by the bypass capacitor connections and the VIN pins. See Figure 57 for a PCB layout example.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS55010RTER WQFN RTE 16 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS55010RTET WQFN RTE 16 250 180.0 12.4 3.3 3.3 1.1 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS55010RTER WQFN RTE 16 3000 367.0 367.0 35.0 TPS55010RTET WQFN RTE 16 250 210.0 185.0 35.
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