Datasheet

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VIN

BOOT

ILIM

COMP

PGD

EN/SS

TPS56221

BPVDD

GND

OUT

UDG-11045

TPS56221

www.ti.com

SLUSAH5B –MARCH 2011–REVISED SEPTEMBER 2012

4.5-V to 14-V Input High-Current Synchronous Buck Converter

Check for Samples: TPS56221

FEATURES

DESCRIPTION

• 4.5-V to 14-V Input Voltage Range

TPS56221 is a high-efficiency and high-current

• Incorporates Power Block Technology

synchronous buck converter designed to operate

• Up to 25-A Output Current

from a supply between 4.5 V and 14 V. The device is

capable of producing an output voltage as low as

• Fixed Frequency Options of 300 kHz, 500 kHz

0.6 V at loads up to 25 A. Integrated NexFET™

and 1 MHz

Power MOSFETs provide a small foot print and ease

• High-Side and Low-Side MOSFET R

DS(on)

of use.

Sensing

The device implements a voltage-mode control with

• Programmable Soft-Start

voltage feed-forward compensation that responds

• 600-mV Reference Voltage with 1% Accuracy

instantly to input voltage change.

• Voltage Mode Control with Feed-Forward

TPS56221 is available in a thermally enhanced 22-

• Supports Pre-Biased Output

pin PQFN (DQP) PowerPAD™ package.

• Thermal Shutdown

The device offers design flexibility with a variety of

• 22-Pin 5 mm x 6 mm PQFN PowerPAD™

user programmable functions, including soft-start,

Package

overcurrent protection (OCP) levels, and loop

compensation. OCP levels are programmed by a

single external resistor connected from the ILIM pin to

APPLICATIONS

the circuit ground. During the initial power-on

• Point-of-Load (POL) Power Modules

sequence, the device enters a calibration cycle,

• High Density DC-DC Converters for Telecom

measures the voltage at the ILIM pin, and sets an

and Networking Applications

internal OCP voltage level. During operation, the

programmed OCP voltage level is compared to the

voltage drop across the low-side FET when it is on to

determine whether there is an overcurrent condition.

It then enters a shutdown/restart cycle until the fault

is removed.

SIMPLIFIED APPLICATION

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2PowerPAD, NexFET are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (33 pages)

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TPS56221 www.ti.com SLUSAH5B – MARCH 2011 – REVISED SEPTEMBER 2012 4.5-V to 14-V Input High-Current Synchronous Buck Converter Check for Samples: TPS56221 FEATURES 1 • • • • 2 • • • • • • • DESCRIPTION 4.
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TPS56221 SLUSAH5B – MARCH 2011 – REVISED SEPTEMBER 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
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TPS56221 www.ti.com SLUSAH5B – MARCH 2011 – REVISED SEPTEMBER 2012 ELECTRICAL CHARACTERISTICS –40°C ≤ TJ ≤ 125°C, VVDD = 12 V, all parameters at zero power dissipation (unless otherwise noted) PARAMETER UNIT S TEST CONDITIONS MIN TYP MAX TJ = 25°C, 4.5 V ≤ VVDD ≤ 14 V 597 600 603 –40°C ≤ TJ ≤ 125°C, 4.5 V ≤ VVDD ≤ 14 V 594 600 606 14 V 80 120 µA 2.5 VOLTAGE REFERENCE VFB FB input voltage mV INPUT SUPPLY VVDD Input supply voltage range IVDDSD Shutdown supply current VEN/SS = 0.
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TPS56221 SLUSAH5B – MARCH 2011 – REVISED SEPTEMBER 2012 www.ti.
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TPS56221 www.ti.com SLUSAH5B – MARCH 2011 – REVISED SEPTEMBER 2012 DEVICE INFORMATION DQP PACKAGE PQFN-22 (TOP VIEW) COMP 1 22 PGD FB 2 21 EN/SS GND 3 20 VDD BOOT 4 19 BP GND 5 18 ILIM SW 6 17 VIN SW 7 16 VIN SW 8 15 VIN SW 9 14 VIN SW 10 13 VIN SW 11 12 VIN GND (Thermal Pad) Note: The thermal pad is also an electrical ground connection. PIN FUNCTIONS PIN I/O DESCRIPTION NAME NO. BOOT 4 O Gate drive voltage for the high-side FET.
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TPS56221 SLUSAH5B – MARCH 2011 – REVISED SEPTEMBER 2012 www.ti.com PIN FUNCTIONS (continued) PIN NAME I/O DESCRIPTION NO. 12 13 14 VIN I 15 Power input to the high-side FET. 16 17 FUNCTIONAL BLOCK DIAGRAM + 10 mA Soft Start 0.6 VREF + 12.5% SS BP SS FB + EN/SS SD 0.6 VREF –12.5% Clock 6-V Regulator VDD BP BOOT Fault Controller + OC 0.
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TPS56221 www.ti.com SLUSAH5B – MARCH 2011 – REVISED SEPTEMBER 2012 TYPICAL CHARACTERISTICS 602 306 Switching Frequency (kHz) FB Pin Reference Voltage (mV) fSW = 300 kHz 601 600 599 598 597 596 305 304 303 302 301 595 594 −40 −25 −10 5 20 35 50 65 80 Junction Temperature (°C) 95 VVDD = 4.5 V VVDD = 12 V 300 −40 −25 −10 110 125 Figure 1. Reference Voltage vs. Junction Temperature 5 20 35 50 65 80 Junction Temperature (°C) 95 110 125 Figure 2. Switching Frequency vs.
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TPS56221 SLUSAH5B – MARCH 2011 – REVISED SEPTEMBER 2012 www.ti.com 2.44 80 2.43 Quiescent Current (mA) Shutdown Current (µA) TYPICAL CHARACTERISTICS (continued) 82 78 76 74 72 2.42 2.41 2.40 2.39 VVDD = 12 V 70 −40 −25 −10 5 20 35 50 65 80 Junction Temperature (°C) 95 VVDD = 12 V 2.38 −40 −25 −10 110 125 10.5 975 10.4 950 10.3 10.2 10.1 10.0 9.9 9.8 9.7 110 125 925 900 875 850 825 800 775 750 9.
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TPS56221 www.ti.com SLUSAH5B – MARCH 2011 – REVISED SEPTEMBER 2012 TYPICAL CHARACTERISTICS Figure 13 to Figure 18 are measured on a 2.5" x 2.5", 0.062" thick FR4 board with 4 layers and 2 oz. copper, a 0.32-µH output inductor and a DCR of 0.32 mΩ. 750 Power−Good Threshold Voltage (mV) High−Side Overcurrent Threshold (A) 54 52 50 48 46 44 42 VVDD = 4.5 V VVDD = 12 V 40 −40 −25 −10 5 20 35 50 65 80 Junction Temperature (°C) 95 600 550 500 100 100 95 95 90 90 85 85 80 75 VOUT = 0.
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TPS56221 SLUSAH5B – MARCH 2011 – REVISED SEPTEMBER 2012 www.ti.com APPLICATION INFORMATION Introduction The TPS56221 is a 25-A high performance synchronous buck converter with two integrated N-channel NexFET™ power MOSFETs. The device implements a voltage-mode control with voltage feed-forward compensation that responds instantly to input voltage change. Pre-bias capability eliminates concerns about damaging sensitive loads.
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TPS56221 www.ti.com SLUSAH5B – MARCH 2011 – REVISED SEPTEMBER 2012 The voltage at EN/SS is internally clamped to 1.3 V before and/or during calibration to minimize the discharging time once calibration is complete. The discharging current is from an internal current source of 140 μA and it pulls the voltage down to 0.4 V. It then initiates the soft-start by charging up the capacitor using an internal current source of 10 μA.
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TPS56221 SLUSAH5B – MARCH 2011 – REVISED SEPTEMBER 2012 www.ti.com An overcurrent (OC) condition is detected by sensing voltage drop across the low-side FET and across the highside FET. If the voltage drop across either FET exceeds OC threshold, a count increments one count. If no OC condition is detected on either FET, the fault counter decrements by one counter. If three OC pulses are summed, a fault condition is declared which cycles the soft-start function in a hiccup mode.
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TPS56221 www.ti.com SLUSAH5B – MARCH 2011 – REVISED SEPTEMBER 2012 Thermal Shutdown If the junction temperature of the device reaches the thermal shutdown limit of 145°C, both high-side FET and low-side FET are kept off. When the junction cools to the required level (125°C typical), the PWM initiates soft start as during a normal power-up cycle.
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TPS56221 SLUSAH5B – MARCH 2011 – REVISED SEPTEMBER 2012 www.ti.com DESIGN EXAMPLE Introduction This design example describes a 25-A, 12-V to 1.0-V design using the TPS56221 high-current integrated buck converter. The system specifications are listed in Table 1. Table 1. Design Example Parameters PARAMETER TEST CONDITIONS VIN Input voltage VIN(ripple) Input ripple IOUT = 25 A VOUT Output voltage 0 A ≤ IOUT ≤ 25 A Line regulation 8 V ≤ VIN ≤ 14 V MIN TYP 8.
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TPS56221 SLUSAH5B – MARCH 2011 – REVISED SEPTEMBER 2012 + www.ti.com Figure 20.
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TPS56221 SLUSAH5B – MARCH 2011 – REVISED SEPTEMBER 2012 www.ti.com Design Procedure Switching Frequency Selection To achieve a balance between small size and high efficiency for this design, use switching frequency of 500 kHz. Inductor Selection Synchronous buck power inductors are typically sized for between approximately 20% and 40% peak-to-peak ripple current (IP-P). Using this target ripple current, the required inductor size can be calculated as shown in Equation 3. VIN(max) - VOUT V 1 14 V - 1.
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TPS56221 www.ti.com SLUSAH5B – MARCH 2011 – REVISED SEPTEMBER 2012 Inductor Peak Current Rating With output capacitance, it is possible to calculate the charge current during start-up and determine the minimum saturation current rating for the inductor. The start-up charging current is approximated by Equation 8. V ´ COUT 1.0 V ´ 500 mF ICHARGE = OUT = = 0.25 A tSS 2ms (8) The peak current in the inductor IL(peak) is approximated by Equation 9.
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TPS56221 SLUSAH5B – MARCH 2011 – REVISED SEPTEMBER 2012 www.ti.com VDD Bypass Capacitor (C11) Per the TPS56221 recommended pin terminations, VDD is bypassed to GND with a 1.0-µF capacitor. BP5 Bypass Capacitor (C12) Per the datasheet recommended pin terminations, BP5 is bypassed to GND with at least 1.0-µF capacitor. For additional filtering and noise immunity a 4.7-µF capacitor is selected.
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TPS56221 www.ti.com SLUSAH5B – MARCH 2011 – REVISED SEPTEMBER 2012 DESIGN EXAMPLE PERFORMANCE CHARACTERISTICS 95 40 200 90 30 160 20 120 10 80 0 40 80 Gain (dB) Efficiency (%) 85 75 −10 0 −20 −40 65 −30 −80 60 −40 70 fSW = 500 kHz VVIN = 5 V TA = 25°C 55 50 0 5 VIN = 8 V VIN = 12 V VIN = 14 V 10 15 Load Current (A) 20 −50 −60 1000 25 Phase (°) Output voltage 12 V to 1.0 V, input current 0 A to 25 A.
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TPS56221 SLUSAH5B – MARCH 2011 – REVISED SEPTEMBER 2012 www.ti.com Table 3. List of Materials for TPS56221 Design Example REFERENCE DESiGNATOR QTY C1, C2, C3, C4 4 22 µF Capacitor, Ceramic, 25 V, X5R, 20% 1210 Std Std C5, C11 2 1.0 µF Capacitor, Ceramic, 25 V, X7R, 20% 0805 Std Std C6 0 100 µF Capacitor, Ceramic, 16 Vdc, ±20% Code D8 Std EEEFP1C101AP C7, C8, C9, C10, C19 5 100 µF Capacitor, Ceramic, 6.3 V, X5R, 20% 1210 Std Std C12 1 4.
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TPS56221 www.ti.com SLUSAH5B – MARCH 2011 – REVISED SEPTEMBER 2012 Layout Recommendations • • • • • • • Place input capacitors next to the VIN pin and on the same side as the device. Use wide and short traces or copper planes for the connection from the VIN pin to the input capacitor and from the input capacitor to the power pad of the device. Place the BP decoupling capacitor close to the BP pin and on the same side as the device in order to avoid the use of vias.
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TPS56221 SLUSAH5B – MARCH 2011 – REVISED SEPTEMBER 2012 www.ti.com Figure 26. TPS56221EVM Top Copper (Top View) Figure 27. TPS56221EVM Internal 1 (Top View) Figure 28. TPS56221EVM Internal 2 (Top View) Figure 29.
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TPS56221 www.ti.com SLUSAH5B – MARCH 2011 – REVISED SEPTEMBER 2012 Changes from Original (MARCH 2011) to Revision A Page • Added conditions to Electrical Characteristics table ............................................................................................................. 3 • Added conditions to Electrical Characteristics table .............................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
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PACKAGE MATERIALS INFORMATION www.ti.com 30-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS56221DQPR SON DQP 22 2500 330.0 12.4 5.3 6.3 1.8 8.0 12.0 Q1 TPS56221DQPT SON DQP 22 250 180.0 12.4 5.3 6.3 1.8 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 30-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS56221DQPR SON DQP 22 2500 367.0 367.0 35.0 TPS56221DQPT SON DQP 22 250 210.0 185.0 35.
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