Datasheet
( )
P P
OCSET
OUT max
I
R I 95 62.5
2
-
æ ö
æ ö
= - ´ +
ç ÷
ç ÷
è ø
è ø
æ ö
= ´
ç ÷
è ø
SS
SS SS
FB
I
C t
V
TPS56221
www.ti.com
SLUSAH5B –MARCH 2011–REVISED SEPTEMBER 2012
The voltage at EN/SS is internally clamped to 1.3 V before and/or during calibration to minimize the discharging
time once calibration is complete. The discharging current is from an internal current source of 140 μA and it
pulls the voltage down to 0.4 V. It then initiates the soft-start by charging up the capacitor using an internal
current source of 10 μA. The resulting voltage ramp on this pin is used as a second non-inverting input to the
error amplifier after an 800 mV (typical) downward level-shift; therefore, the actual soft-start does not take place
until the voltage at this pin reaches 800 mV.
If the EN/SS pin is left floating, the controller starts automatically. EN/SS must be pulled down to less than 270
mV to ensure that the chip is in shutdown mode.
Soft-Start Time
The soft-start time of the TPS56221 is user programmable by selecting a single capacitor. The EN/SS pin
sources 10 μA to charge this capacitor. The actual output ramp-up time is the amount of time that it takes for the
10 μA to charge the capacitor through a 600 mV range. There is some initial lag due to calibration and an offset
(800 mV) from the actual EN/SS pin voltage to the voltage applied to the error amplifier.
The soft-start is accomplished in a closed-loop, meaning that the error amplifier controls the output voltage at all
times during the soft-start period and the feedback loop is never open as occurs in duty cycle limit soft-start
schemes. The error amplifier has two non-inverting inputs, one connected to the 600-mV reference voltage, and
the other connected to the offset EN/SS pin voltage. The lower of these two voltages is what the error amplifier
controls the FB pin to. As the voltage on the EN/SS pin ramps up past approximately 1.4 V (800 mV offset
voltage plus the 600 mV reference voltage), the 600-mV reference voltage becomes the dominant input and the
converter has reached its final regulation voltage.
The capacitance required for a given soft-start ramp time for the output voltage is calculated in Equation 1.
where
• C
SS
is the required capacitance on the EN/SS pin (nF)
• I
SS
is the soft-start source current (10 μA)
• V
FB
is the feedback reference voltage (0.6 V)
• t
SS
is the desired soft-start ramp time (ms) (1)
Oscillator
The oscillator frequency is internally fixed at 500 KHz if there is no resistor connected from COMP pin to GND.
Optionally, a 40.2-kΩ resistor from the COMP pin to GND sets the frequency to 300 KHz. Alternatively, a 13.3-kΩ
resistor from COMP pin GND sets the frequency to 1 MHz.
Overcurrent Protection (OCP)
Programmable OCP level at ILIM is from 6 mV to 50 mV. With a scale factor of 2, the actual OC trip point across
the low-side FET is in the range of 12 mV to 100 mV.
If the voltage drop across R
OCSET
reaches 300 mV during calibration (No R
OCSET
resistor included), it disables
OC protection. Once disabled, there is no low-side or high-side current sensing.
OCP level for the high-side FET is fixed at 54 A (typical). The high-side OCP provides pulse-by-pulse current
limiting.
OCP sensing for the low-side FET is a true inductor valley current detection, using sample and hold. Equation 2
can be used to calculate R
OCSET
:
where
• I
P-P
is the peak-to-peak inductor current (A)
• I
OUT(max)
is the trip point for OCP (A)
• R
OCSET
is the resistor used for setting the OCP level (Ω) (2)
Copyright © 2011–2012, Texas Instruments Incorporated 11
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