Datasheet

( )
FB
OUT FB
V R4
0.600 V 20.5k
R7 30.8k
1.0 V 0.600 V
V V
´
´ W
= = = W
-
-
P P
OCSET OUT(max)
I
5.8 A
R 95 I 62.5 95 30 A 62.5 2.83 k
2 2
-
æ ö
æ ö
æ ö
æ ö
= ´ - + W = ´ - + W = W
ç ÷
ç ÷
ç ÷
ç ÷
è ø
è ø
è ø
è ø
SS
SS SS
FB
I
10 A
C t 2.0ms 33nF
V 0.6 V
m
= ´ = ´ =
TPS56221
SLUSAH5B –MARCH 2011–REVISED SEPTEMBER 2012 www.ti.com
VDD Bypass Capacitor (C11)
Per the TPS56221 recommended pin terminations, VDD is bypassed to GND with a 1.0-µF capacitor.
BP5 Bypass Capacitor (C12)
Per the datasheet recommended pin terminations, BP5 is bypassed to GND with at least 1.0-µF capacitor. For
additional filtering and noise immunity a 4.7-µF capacitor is selected.
Soft-Start Capacitor (C13)
The soft-start capacitor provides a constant ramp voltage to the error amplifier to provide controlled, smooth
start-up. The soft-start capacitor is sized using Equation 14.
(14)
Current Limit (R1)
The TPS56221 uses the negative drop across the internal low-side FET at the end of the OFF-time to measure
the valley of the inductor current. Allowing for a minimum of 30% over maximum load, the programming resistor
is selected using Equation 15.
(15)
A standard 2.87-kΩ resistor is selected from the E-48 series.
Feedback Divider (R4, R7)
The TPS56221 converter uses a full operational amplifier with an internally fixed 0.600-V reference. R4 is
selected between 10 kΩ and 50 kΩ for a balance of feedback current and noise immunity. With R4 set to
20.5 kΩ, The output voltage is programmed with a resistor divider given by Equation 16.
(16)
A standard 30.1-kΩ resistor is selected from the E-48 series.
Compensation (C15, C16, C17, R3, R6)
Using the TPS40k Loop Stability Tool for 50 kHz of bandwidth and 60 degrees of phase margin with an R4 value
of 20.5 kΩ, the following values are obtained.
• C17 = C_1 = 680 pF
• C15 = C_2 = 2200 pF
• C16 = C_3 = 100 pF
• R6 = R_2 = 1.00 kΩ
• R3 = R_3 = 7.87 kΩ
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