Datasheet

TPS56221
SLUSAH5B –MARCH 2011–REVISED SEPTEMBER 2012 www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
–40°C ≤ T
J
≤ 125°C, V
VDD
= 12 V, all parameters at zero power dissipation (unless otherwise noted)
UNIT
PARAMETER TEST CONDITIONS MIN TYP MAX
S
POWER GOOD
Feedback upper voltage limit for
V
OV
655 675 700 mV
PGOOD
Feedback lower voltage limit for
V
UV
500 525 550
PGOOD
V
PGD-HYST
PGOOD hysteresis voltage at FB 30 45
R
PGD
PGOOD pull down resistance V
FB
= 0 V, I
FB
= 5 mA 30 70 Ω
550 mV < V
FB
< 655 mV,
I
PGDLK
PGOOD leakage current 10 20 µA
V
PGOOD
= 5 V
OUTPUT STAGE
R
HI
High-side device resistance T
J
= 25°C, (V
BOOT
– V
SW
) = 5.5 V 4.5 6.5 mΩ
R
LO
Low side device resistance T
J
= 25°C 1.9 2.7
OVERCURRENT PROTECTION (OCP)
Minimum pulse time during short
t
PSSC(min)
(2)
250 ns
circuit
Switch leading-edge blanking pulse
t
BLNKH
(2)
150
time (high-side detection)
I
OCH
OC threshold for high-side FET T
J
= 25°C, (V
BOOT
– V
SW
) = 5.5 V 45 54 65 A
I
ILIM
ILIM current source T
J
= 25°C 10.0 µA
Programmable OC range for low side
V
OCLPRO
(2)
T
J
= 25°C 12 100 mV
FET
t
OFF
OC retry cycles on EN/SS pin 4 Cycle
BOOT DIODE
V
DFWD
Bootstrap diode forward voltage I
BOOT
= 5 mA 0.8 V
THERMAL SHUTDOWN
T
JSD
(2)
Junction shutdown temperature 145 ºC
T
JSDH
(2)
Hysteresis 20 ºC
(2) Ensured by design. Not production tested
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