Datasheet

EN
TPS54160
3
SS/TR
4
PWRGD
6
EN
TPS54160
3
SS/TR4
PWRGD
6
TPS57040-Q1
TPS57040-Q1
EN1,EN2
VOUT1
VOUT2
EN1
PWRGD1
VOUT1
VOUT2
SS /TR
TPS57040-Q1
EN
PWRGD
SS/TR
EN
PWRGD
TPS57040-Q1
SLVSAP4C –DECEMBER 2010–REVISED OCTOBER 2012 www.ti.com
DETAILED DESCRIPTION (continued)
Sequencing
Many of the common power supply sequencing methods can be implemented using the SS/TR, EN and PWRGD
pins. The sequential method can be implemented using an open drain output of a power on reset pin of another
device. The sequential method is illustrated in Figure 31 using two TPS57040-Q1 devices. The power good is
coupled to the EN pin on the TPS57040-Q1 which will enable the second power supply once the primary supply
reaches regulation. If needed, a 1-nF ceramic capacitor on the EN pin of the second power supply will provide a
1-ms start-up delay. Figure 32 shows the results of Figure 31.
Figure 31. Schematic for Sequential Start-Up Figure 32. Sequential Startup Using EN and
Sequence PWRGD
Figure 33. Schematic for Ratiometric Startup Using Figure 34. Ratiometric Startup using Coupled
Coupled SS/TR Pins SS/TR pins
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