Datasheet

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VIN

POWERPAD

BOOT

VSENSE

COMP

TPS57112-Q1

RT /CLK

SS/TR

PWRGD

BOOT

VOUT

VIN

AGND

GND

Efficiency-%

I -OutputCurrent- A

100

0 10.5 1.5 2

3Vin

5Vin

f =500kHz

Vout=1.8V

TPS57112-Q1

www.ti.com

SLVSAL8 –DECEMBER 2010

2.95-V to 6-V Input, 2-A Output, 2-MHz, Synchronous Step-Down

Switcher With Integrated FETs ( SWIFT™)

Check for Samples: TPS57112-Q1

FEATURES

DESCRIPTION

• Qualified for Automotive Applications

The TPS57112-Q1 device is a full featured 6 V, 2 A,

synchronous step down current mode converter with

• Two 12-mΩ (typical) MOSFETs for High

two integrated MOSFETs.

Efficiency at 2-A Loads

• 200 kHz to 2 MHz Switching Frequency

The TPS57112-Q1 enables small designs by

integrating the MOSFETs, implementing current

• 0.8 V ± 1% Voltage Reference Over

mode control to reduce external component count,

Temperature (–40°C to 150°C)

reducing inductor size by enabling up to 2 MHz

• Synchronizes to External Clock

switching frequency, and minimizing the IC footprint

• Adjustable Slow Start/Sequencing

with a small 3 mm x 3 mm thermally enhanced QFN

package.

• UV and OV Power Good Output

The TPS57112-Q1 provides accurate regulation for a

• –40°C to 150°C Operating Junction

variety of loads with an accurate ±1% Voltage

Temperature Range

Reference (VREF) over temperature.

• Thermally Enhanced 3mm × 3mm 16-pin QFN

Efficiency is maximized through the integrated 12 mΩ

• Pin Compatible to TPS54418

MOSFETs and 515 mA typical supply current. Using

the enable pin, shutdown supply current is reduced to

APPLICATIONS

5.5 µA by entering a shutdown mode.

• Low-Voltage, High-Density Power Systems

Under voltage lockout is internally set at 2.45 V, but

• Point of Load Regulation for High Performance

can be increased by programming the threshold with

DSPs, FPGAs, ASICs and Microprocessors

a resistor network on the enable pin. The output

• Broadband, Networking and Optical

voltage startup ramp is controlled by the slow start

Communications Infrastructure

pin. An open drain power good signal indicates the

output is within 93% to 107% of its nominal voltage.

SIMPLIFIED SCHEMATIC

Frequency fold back and thermal shutdown protects

vertical spacer

the device during an over-current condition.

vertical spacer

The TPS57112-Q1 is supported in the SwitcherPro™

Software Tool at www.ti.com/switcherpro.

For more SWIFT

documentation, see the TI

website at www.ti.com/swift.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2SWIFT, SwitcherPro, PowerPAD are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (36 pages)

PAGE 1
TPS57112-Q1 www.ti.com SLVSAL8 – DECEMBER 2010 2.95-V to 6-V Input, 2-A Output, 2-MHz, Synchronous Step-Down Switcher With Integrated FETs ( SWIFT™) Check for Samples: TPS57112-Q1 FEATURES DESCRIPTION • • The TPS57112-Q1 device is a full featured 6 V, 2 A, synchronous step down current mode converter with two integrated MOSFETs. 1 2 • • • • • • • • Qualified for Automotive Applications Two 12-mΩ (typical) MOSFETs for High Efficiency at 2-A Loads 200 kHz to 2 MHz Switching Frequency 0.
PAGE 2
TPS57112-Q1 SLVSAL8 – DECEMBER 2010 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION TA –40°C to 125°C PACKAGE QFN – RTE Reel of 2500 ORDERABLE PART NUMBER TPS57112QRTERQ1 TOP-SIDE MARKING 7112Q ABSOLUTE MAXIMUM RATINGS (1) VALUES MIN MAX VIN –0.3 7 EN –0.3 7 BOOT Input voltage PH + 7 VSENSE –0.
PAGE 3
TPS57112-Q1 www.ti.com SLVSAL8 – DECEMBER 2010 THERMAL INFORMATION TPS57112-Q1 THERMAL METRIC (1) (2) (3) (RTE) UNITS (QFN-16) PINS Junction-to-ambient thermal resistance qJA 56.4 (4) qJA Junction-to-ambient thermal resistance yJT Junction-to-top characterization parameter 0.9 yJB Junction-to-board characterization parameter 22.2 qJC(top) Junction-to-case(top) thermal resistance 28.7 qJC(bottom) Junction-to-case(bottom) thermal resistance 12.
PAGE 4
TPS57112-Q1 SLVSAL8 – DECEMBER 2010 www.ti.com ELECTRICAL CHARACTERISTICS TJ = –40°C to 150°C, VIN = 2.95 to 6 V (unless otherwise noted) DESCRIPTION CONDITIONS MIN TYP MAX UNIT SUPPLY VOLTAGE (VIN PIN) Operating input voltage Internal under voltage lockout threshold 6.0 V VIN UVLO START 2.95 2.28 2.5 V VIN UVLO STOP 2.45 2.6 V Shutdown supply current EN = 0 V, 25°C, 2.95 V ≤ VIN ≤ 6 V 5.5 15 mA Quiescent Current - Iq VSENSE = 0.
PAGE 5
TPS57112-Q1 www.ti.com SLVSAL8 – DECEMBER 2010 ELECTRICAL CHARACTERISTICS (continued) TJ = –40°C to 150°C, VIN = 2.95 to 6 V (unless otherwise noted) DESCRIPTION CONDITIONS MIN TYP MAX UNIT PH (PH PIN) Minimum On time Minimum Off time Rise Time Fall Time Measured at 50% points on PH, IOUT = 2 A 75 Measured at 50% points on PH, VIN = 6 V, IOUT = 0 A 120 ns 60 ns Prior to skipping off pulses, BOOT-PH = 2.95 V, IOUT = 2A VIN = 6 V, 2 A 2.
PAGE 6
TPS57112-Q1 SLVSAL8 – DECEMBER 2010 www.ti.com DEVICE INFORMATION PIN CONFIGURATION VIN 1 VIN 2 GND GND VIN EN PWRGD BOOT QFN16 RTE PACKAGE (TOP VIEW) 16 15 14 13 12 PH 11 PH 3 10 PH 4 9 PowerPAD (17) 8 RT/CLK 7 COMP 6 VSENSE AGND 5 SS/TR PIN FUNCTIONS PIN NAME DESCRIPTION NO. AGND 5 Analog Ground should be electrically connected to GND close to the device. BOOT 13 A bootstrap capacitor is required between BOOT and PH.
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TPS57112-Q1 www.ti.
PAGE 8
TPS57112-Q1 SLVSAL8 – DECEMBER 2010 www.ti.com TYPICAL CHARACTERISTICS CURVES FREQUENCY vs TEMPERATURE 0.025 525 520 0.023 RT = 400 kW, Vin = 5 V High Side Rdson Vin = 3.3 V 0.021 Low Side Rdson Vin = 3.3 V 0.019 0.017 0.015 0.013 High Side Rdson Vin = 5 V 0.011 515 fs - Switching Frequency - kHz RDSON - Static Drain-Source On-State Resistance - W HIGH SIDE AND LOW SIDE RDS(ON) vs TEMPERATURE Low Side Rdson Vin = 5 V 0.009 510 505 500 495 490 485 480 0.007 0.
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TPS57112-Q1 www.ti.com SLVSAL8 – DECEMBER 2010 TYPICAL CHARACTERISTICS CURVES (continued) TRANSCONDUCTANCE (SLOW START) vs JUNCTION TEMPERATURE TRANSCONDUCTANCE vs TEMPERATURE 105 310 Vin = 3.3 V 100 Vin = 3.3 V EA - Transconductance - mA/V EA - Transconductance - mA/V 290 270 250 230 210 95 90 85 80 75 70 65 190 60 170 -50 -25 0 25 50 75 100 TJ - Junction Temperature - °C 125 55 -50 150 -25 0 25 50 75 100 TJ - Junction Temperature - °C Figure 7. 125 150 Figure 8.
PAGE 10
TPS57112-Q1 SLVSAL8 – DECEMBER 2010 www.ti.com TYPICAL CHARACTERISTICS CURVES (continued) INPUT VOLTAGE vs TEMPERATURE SHUTDOWN SUPPLY CURRENT vs TEMPERATURE 2.8 8 2.7 7 Shutdown Supply Current - mA Vin = 3.3 V VI - Input Voltage - V 2.6 UVLO Stop Switching 2.5 2.4 2.3 UVLO Start Switching 2.2 6 5 4 3 2 1 2.1 2 -50 -25 0 25 50 75 100 TJ - Junction Temperature - °C 125 0 -50 150 -25 0 Figure 13. 125 150 Figure 14.
PAGE 11
TPS57112-Q1 www.ti.com SLVSAL8 – DECEMBER 2010 TYPICAL CHARACTERISTICS CURVES (continued) SS/TR to VSENSE OFFSET vs TEMPERATURE 100 100 90 90 80 80 70 SSTR - Vsense Offset - mV RDSON - Static Drain-Source On-State Resistance - W PWRGD ON-RESISTANCE vs TEMPERATURE VI = 5 V 60 50 40 30 70 60 50 40 30 20 20 10 10 0 -50 -25 0 25 50 75 100 TJ - Junction Temperature - °C 125 150 Vin = 5 V, SS = 0.4 V 0 -50 -25 0 25 50 75 100 TJ - Junction Temperature - °C Figure 19.
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TPS57112-Q1 SLVSAL8 – DECEMBER 2010 www.ti.com DETAILED DESCRIPTION FIXED FREQUENCY PWM CONTROL The TPS57112-Q1 uses an adjustable fixed frequency, peak current mode control. The output voltage is compared through external resistors on the VSENSE pin to an internal voltage reference by an error amplifier which drives the COMP pin. An internal oscillator initiates the turn on of the high side power switch. The error amplifier output is compared to the high side power switch current.
PAGE 13
TPS57112-Q1 www.ti.com SLVSAL8 – DECEMBER 2010 TPS57112-Q1 VO R1 VSENSE R2 0.8 V + Figure 21. Voltage Divider Circuit ENABLE AND ADJUSTING UNDER-VOLTAGE LOCKOUT The TPS57112-Q1 is disabled when the VIN pin voltage falls below 2.6 V. If an application requires a higher under-voltage lockout (UVLO), use the EN pin as shown in Figure 22 to adjust the input voltage UVLO by using two external resistors. It is recommended to use the EN resistors to set the UVLO falling threshold (VSTOP) above 2.6 V.
PAGE 14
TPS57112-Q1 SLVSAL8 – DECEMBER 2010 www.ti.com SLOW START / TRACKING PIN The TPS57112-Q1 regulates to the lower of the SS/TR pin and the internal reference voltage. A capacitor on the SS/TR pin to ground implements a slow start time. The TPS57112-Q1 has an internal pull-up current source of 2 mA which charges the external slow start capacitor.
PAGE 15
TPS57112-Q1 www.ti.com SLVSAL8 – DECEMBER 2010 TPS57112-Q1 EN1 SS/TR1 EN PWRGD1 SS TPS57112-Q1 VO1 EN2 VO2 SS/TR2 PWRGD2 Figure 25. Schematic for Ratiometric Start-Up Sequence Figure 26. Ratio-metric Startup with Vout1 Leading Vout2 Ratio-metric and simultaneous power supply sequencing can be implemented by connecting the resistor network of R1 and R2 shown in Figure 27 to the output of the power supply that needs to be tracked or another voltage reference source.
PAGE 16
TPS57112-Q1 SLVSAL8 – DECEMBER 2010 www.ti.com TPS57112-Q1 EN1 VOUT1 EN1 SS/TR1 PWRGD1 SS2 Vout1 TPS57112-Q1 EN2 Vout2 VOUT 2 R1 SS/TR2 R2 PWRGD2 Figure 27. Ratio-metric and Simultaneous Startup Sequence Figure 28.
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TPS57112-Q1 www.ti.com SLVSAL8 – DECEMBER 2010 REVERSE OVERCURRENT PROTECTION The TPS57112-Q1 implements low side current protection by detecting the voltage across the low side MOSFET. When the converter sinks current through its low side FET, the control circuit turns off the low side MOSFET if the reverse current is typically more than 4.5 A.
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TPS57112-Q1 SLVSAL8 – DECEMBER 2010 www.ti.com SMALL SIGNAL MODEL FOR LOOP RESPONSE Figure 31 shows an equivalent model for the TPS57112-Q1 control loop which can be modeled in a circuit simulation program to check frequency response and dynamic load response. The error amplifier is a transconductance amplifier with a gm of 245 mA/V. The error amplifier can be modeled using an ideal voltage controlled current source.
PAGE 19
TPS57112-Q1 www.ti.com SLVSAL8 – DECEMBER 2010 VO Adc VC RESR fp RL gmps COUT fz Figure 32.
PAGE 20
TPS57112-Q1 SLVSAL8 – DECEMBER 2010 www.ti.com The design guidelines for TPS57112-Q1 loop compensation are as follows: 1. The modulator pole, fpmod, and the esr zero, fz1 must be calculated using Equation 15 and Equation 16. Derating the output capacitor (COUT) may be needed if the output voltage is a high percentage of the capacitor rating. Use the capacitor manufacturer information to derate the capacitor value.
PAGE 21
TPS57112-Q1 www.ti.com SLVSAL8 – DECEMBER 2010 APPLICATION INFORMATION DESIGN GUIDE – STEP-BY-STEP DESIGN PROCEDURE This example details the design of a high frequency switching regulator design using ceramic output capacitors. This design is available as the HPA375 evaluation module (EVM). A few parameters must be known in order to start the design process. These parameters are typically determined on the system level. For this example, we start with the following known parameters: Output Voltage 1.
PAGE 22
TPS57112-Q1 SLVSAL8 – DECEMBER 2010 www.ti.com For this design example, use KIND = 0.3 and the inductor value is calculated to be 1.36 mH. For this design, a nearest standard value was chosen: 1.5 mH. For the output filter inductor, it is important that the RMS current and saturation current ratings not be exceeded. The RMS and peak inductor current can be found from Equation 24 and Equation 25. For this design, the RMS inductor current is 2 A and the peak inductor current is 2.42 A.
PAGE 23
TPS57112-Q1 www.ti.com SLVSAL8 – DECEMBER 2010 vertical spacer Co > 1 ´ 8 ´ ¦ sw 1 Voripple Iripple Where ΔIout is the change in output current, Fsw is the regulators switching frequency and ΔVout is the allowable change in the output voltage. (27) vertical spacer Equation 28 calculates the maximum ESR an output capacitor can have to meet the output voltage ripple specification. Equation 28 indicates the ESR should be less than 55 mΩ.
PAGE 24
TPS57112-Q1 SLVSAL8 – DECEMBER 2010 www.ti.com nominal programmed value during power up. This is useful if a load requires a controlled voltage slew rate. This is also used if the output capacitance is large and would require large amounts of current to quickly charge the capacitor to the output voltage level. The large currents necessary to charge the capacitor may make the TPS57112-Q1 reach the current limit or excessive current draw from the input power supply may cause the input voltage rail to sag.
PAGE 25
TPS57112-Q1 www.ti.com SLVSAL8 – DECEMBER 2010 COMPENSATION There are several industry techniques used to compensate DC/DC regulators. The method presented here is easy to calculate and yields high phase margins. For most conditions, the regulator has a phase margin between 60 and 90 degrees. The method presented here ignores the effects of the slope compensation that is internal to the TPS57112-Q1.
PAGE 26
TPS57112-Q1 SLVSAL8 – DECEMBER 2010 www.ti.com APPLICATION CURVES EFFICIENCY vs LOAD CURRENT 100 100 90 90 80 80 Vin = 3.3 V Vin = 3.3 V 70 70 Vin = 5 V Efficiency - % Efficiency - % EFFICIENCY vs LOAD CURRENT 60 50 40 60 Vin = 5 V 50 40 30 30 20 20 10 10 0 0 0.5 1 1.5 0 0.01 2 0.1 Figure 35. EFFICIENCY vs LOAD CURRENT 1 MHz, 5 VIN, TA = 25°C 100 100 95 95 90 90 Vout = 1.05 V Vout = 1.8 V Vout = 1.8 V 85 Efficiency - % 85 Efficiency - % 10 Figure 36.
PAGE 27
TPS57112-Q1 www.ti.com SLVSAL8 – DECEMBER 2010 TRANSIENT RESPONSE, 1.5 A STEP POWER UP VOUT, VIN Vin = 5 V / div Vout = 100 mV / div (ac coupled) Vout = 2 V / div Iout = 1 A / div (0 A to 1.5 A load step) EN = 2 V / div PWRGD = 5 V / div Time = 5 msec / div Time = 200 usec / div Figure 41. Figure 42.
PAGE 28
TPS57112-Q1 SLVSAL8 – DECEMBER 2010 www.ti.com LOAD REGULATION vs LOAD CURRENT REGULATION vs INPUT VOLTAGE 0.4 0.4 0.3 Output Voltage Deviation - % Output Voltage Deviation - % 0.3 0.2 Vin = 5 V 0.1 0 Vin = 3.3 V -0.1 -0.2 Iout = 2 A 0.2 0.1 0 -0.1 -0.2 -0.3 -0.3 -0.4 -0.4 0 0.5 1 1.5 2 3 3.5 4 4.5 5 5.5 6 Input Voltage-V Output Current - A Figure 47. Figure 48.
PAGE 29
TPS57112-Q1 www.ti.com SLVSAL8 – DECEMBER 2010 There are additional power losses in the regulator circuit due to the inductor AC and DC losses and trace resistance that impact the overall efficiency of the regulator. LAYOUT Layout is a critical portion of good power supply design. There are several signal paths that conduct fast changing currents or voltages that can interact with stray inductance or parasitic capacitance to generate noise or degrade the power supplies performance.
PAGE 30
TPS57112-Q1 SLVSAL8 – DECEMBER 2010 www.ti.com VIA to Ground Plane UVLO SET RESISTORS VIN INPUT BYPASS CAPACITOR BOOT PWRGD EN VIN VIN BOOT CAPACITOR VIN OUTPUT INDUCTOR PH VIN PH EXPOSED POWERPAD AREA GND GND OUTPUT FILTER CAPACITOR PH PH VOUT SLOW START CAPACITOR RT/CLK COMP VSENSE AGND SS FEEDBACK RESISTORS ANALOG GROUND TRACE FREQUENCY SET RESISTOR TOPSIDE GROUND AREA COMPENSATION NETWORK VIA to Ground Plane Figure 49.
PAGE 31
PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) TPS57112QRTERQ1 ACTIVE Package Type Package Pins Package Drawing Qty WQFN RTE 16 3000 Eco Plan Lead/Ball Finish (2) Green (RoHS & no Sb/Br) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) CU NIPDAU Level-3-260C-168 HR (4) -40 to 125 7112Q (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs.
PAGE 32
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPS57112QRTERQ1 Package Package Pins Type Drawing WQFN RTE 16 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 3000 330.0 12.4 Pack Materials-Page 1 3.3 B0 (mm) K0 (mm) P1 (mm) 3.3 1.1 8.0 W Pin1 (mm) Quadrant 12.
PAGE 33
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS57112QRTERQ1 WQFN RTE 16 3000 367.0 367.0 35.
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