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ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - linear/switching voltage regulator Arbitrary function TSSOP 16

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FEATURES APPLICATIONS

DESCRIPTION

OFF

VBAT

LBI

SKIPEN

LDOEN

SWN

VOUT

PGOOD

LBO

LDOIN

LDOOUT

LDOSENSE

GND PGND

Control

Inputs

Control

Outputs

Out1

Out2

TPS61130

SWP

22 mH

100 mF

e.g. 3.3 V

up to 300 mA

2.2 mF

e.g. 1.5 V

up to 300 mA

10 mF

1.8 V up to 6 V

Input

10 mF

TPS61130

TPS61131

TPS61132

SLVS431B – JUNE 2002 – REVISED JANUARY 2008

www.ti.com

SYNCHRONOUS SEPIC / FLYBACK CONVERTER WITH 1.1A SWITCH

AND INTEGRATED LDO

• All Single Cell Li, Dual or Triple Cell Battery or

• Synchronous, Up To 90% Efficient, SEPIC

USB Powered Products as MP-3 Player, PDAs,

Converter With 300-mA Output Current From

and Other Portable Equipment

2.5-V Input

• Dual Input or Dual Output Mode

• Integrated 200-mA Reverse Voltage Protected

• High Efficient Li-Ion to 3.3-V Conversion

LDO for DC/DC Output Voltage Post

Regulation or Second Output Voltage

• 40- µ A (Typical) Quiescent Current

The TPS6113x devices provide a complete power

• Input Voltage Range: 1.8-V to 5.5-V

supply solution for products powered by either a

• Fixed and Adjustable Output Voltage Options

one-cell Li-Ion or Li-Polymer, or two- to four-cell

up to 5.5-V

Alkaline, NiCd, or NiMH batteries. The devices can

• Power Save Mode for Improved Efficiency at

generate two regulated output voltages. It provides a

simple and efficient buck-boost solution for

Low Output Power

generating 3.3 V out of an input voltage that can be

• Low Battery Comparator

both higher and lower than the output voltage. The

• Power Good Output

converter provides a maximum output current of at

• Low EMI-Converter (Integrated Antiringing

least 300 mA with supply voltages down to 1.8 V. The

implemented SEPIC converter is based on a fixed

Switch)

frequency, pulse-width-modulation (PWM) controller

• Load Disconnect During Shutdown

using a synchronous rectifier to obtain maximum

• Overtemperature Protection

efficiency. The maximum peak current in the SEPIC

• Available in a Small 4mm x 4mm QFN-16 or in

switch is limited to a value of 1600 mA.

a TSSOP-16 Package

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2 PowerPAD is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (30 pages)

PAGE 1
TPS61130 TPS61131 TPS61132 www.ti.com SLVS431B – JUNE 2002 – REVISED JANUARY 2008 SYNCHRONOUS SEPIC / FLYBACK CONVERTER WITH 1.1A SWITCH AND INTEGRATED LDO FEATURES APPLICATIONS • Synchronous, Up To 90% Efficient, SEPIC Converter With 300-mA Output Current From 2.
PAGE 2
TPS61130 TPS61131 TPS61132 www.ti.com SLVS431B – JUNE 2002 – REVISED JANUARY 2008 Description (continued) The converter can be disabled to minimize battery drain. During shutdown, the load is completely disconnected from the battery. A low-EMI mode is implemented to reduce ringing, and in effect, lower radiated electromagnetic energy when the converter enters the discontinuous conduction mode.
PAGE 3
TPS61130 TPS61131 TPS61132 www.ti.com SLVS431B – JUNE 2002 – REVISED JANUARY 2008 ELECTRICAL CHARACTERISTICS over recommended free-air temperature range and over recommended input voltage range (typical at an ambient temperature range of 25°C) (unless otherwise noted) DC/DC STAGE PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VI Input voltage range 1.8 6.5 V VO Adjustable output voltage range (TPS61130) 2.5 5.
PAGE 4
TPS61130 TPS61131 TPS61132 www.ti.com SLVS431B – JUNE 2002 – REVISED JANUARY 2008 ELECTRICAL CHARACTERISTICS (continued) over recommended free-air temperature range and over recommended input voltage range (typical at an ambient temperature range of 25°C) (unless otherwise noted) CONTROL STAGE (continued) PARAMETER TEST CONDITIONS EN, SKIPEN input current Clamped on GND or VBAT Power-Good threshold VO = 3.3 V MIN 0.9 × Vo Power-Good delay TYP MAX 0.01 0.1 UNIT µA 0.92 × Vo 0.
PAGE 5
TPS61130 TPS61131 TPS61132 www.ti.com SLVS431B – JUNE 2002 – REVISED JANUARY 2008 Terminal Functions TERMINAL NAME NO. PW I/O DESCRIPTION RSA EN 7 5 I DC/DC-enable input.
PAGE 6
TPS61130 TPS61131 TPS61132 www.ti.com SLVS431B – JUNE 2002 – REVISED JANUARY 2008 Functional Block Diagram SWN SWP Backgate Control AntiRinging VBAT VOUT 100 kΩ VOUT Vmax Control 20 pF Gate Control PGND PGND Regulator PGND Error Amplifier _ FB + Vref = 0.5 V Control Logic + _ GND Oscillator Temperature Control EN PGOOD ENLDO SKIPEN LDOIN Backgate Control GND LDOOUT Error Amplifier LBO Low Battery Comparator _ LBI LDOSENSE + Vref = 0.5 V + + _ _ + _ GND Vref = 0.
PAGE 7
TPS61130 TPS61131 TPS61132 www.ti.com SLVS431B – JUNE 2002 – REVISED JANUARY 2008 PARAMETER MEASUREMENT INFORMATION C7 10 µF U1 L1−A L1−B 22 µH Power Supply C3 10 µF SWN SWP VBAT VOUT 22 µH R3 R1 C6 2.2 µF FB VCC1 SEPIC Output C4 100 µF LBI R2 LDOIN SKIPEN R6 VCC2 LDO Output LDOOUT R5 C5 2.
PAGE 8
TPS61130 TPS61131 TPS61132 www.ti.com SLVS431B – JUNE 2002 – REVISED JANUARY 2008 TPS61130 MAXIMUM SEPIC CONVERTER OUTPUT CURRENT vs INPUT VOLTAGE 0.7 TPS61130 MAXIMUM SEPIC CONVERTER OUTPUT CURRENT vs INPUT VOLTAGE 0.70 0.65 0.60 Maximum Output Current − A Maximum Output CURRENT − A 0.6 VO = 3.3 V 0.5 VO = 5 V 0.4 0.3 0.2 VO = 2.5 V 0.55 0.50 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.1 0 1.8 2 3 4 5 VI − Input Voltage − V 0.05 0 6 7 1.8 2.2 2.6 3 Figure 1.
PAGE 9
TPS61130 TPS61131 TPS61132 www.ti.com SLVS431B – JUNE 2002 – REVISED JANUARY 2008 TPS61130 SEPIC CONVERTER EFFICIENCY vs OUTPUT CURRENT TPS61132 SEPIC CONVERTER EFFICIENCY vs INPUT VOLTAGE 100 100 TPS61130 90 80 VBAT = 6 V 95 VBAT = 3.6 V IO = 100 mA 90 IO = 200 mA Efficiency − % Efficiency − % 70 60 50 40 85 IO = 10 mA 80 75 30 70 20 65 10 60 0 0.1 1 10 100 IO − Output Current − mA 7 Figure 5. Figure 6.
PAGE 10
TPS61130 TPS61131 TPS61132 www.ti.com SLVS431B – JUNE 2002 – REVISED JANUARY 2008 TPS61132 NO-LOAD SUPPLY CURRENT INTO VOUT vs INPUT VOLTAGE TPS61132 SEPIC CONVERTER OUTPUT VOLTAGE IN CONTINUOUS MODE No-Load Supply Current Into VOUT − µ A 14 VI = 3.3 V, RL = 33 W 85°C 12 Output Voltage 20 mV/Div, AC 25°C −40°C 10 8 6 Inductor Current 100 mA/Div, DC 4 2 VO = 3.3 V 0 1.8 2 2.2 2.4 2.6 2.8 VI − Input Voltage − V 3 Timebase − 1 µs/Div 3.2 Figure 9. Figure 10.
PAGE 11
TPS61130 TPS61131 TPS61132 www.ti.com SLVS431B – JUNE 2002 – REVISED JANUARY 2008 TPS61132 SEPIC CONVERTER LINE TRANSIENT RESPONSE VI = 3.0 V to 4.2 V RL = 33 W TPS61132 SEPIC CONVERTER START-UP AFTER ENABLE Enable 5 V/Div, DC Input Voltage 1 V/Div, DC Output Voltage 2 V/Div, DC Voltage at SW 5 V/Div, DC Output Voltage 50 mV/Div, AC Input Current 200 mA/Div, DC VI = 3.6 V, RL = 66 W VO = 3.3 V VO = 3.3 V Timebase − 400 µs/Div Timebase − 200 µs/Div Figure 13. Figure 14.
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TPS61130 TPS61131 TPS61132 www.ti.com SLVS431B – JUNE 2002 – REVISED JANUARY 2008 TPS61131 LDO OUTPUT VOLTAGE vs LDO OUTPUT CURRENT LDO DROPOUT VOLTAGE vs LDO OUTPUT CURRENT 3.5 3.4 3.38 3 LDO Dropout Voltage − V LDO Output Voltage − V 3.36 3.34 3.32 3.3 3.28 3.26 TPS61131 (LDO OUTPUT VOLTAGE 1.5 V) 2.5 2 TPS61132 (LDO OUTPUT VOLTAGE 3.3 V) 1.5 1 3.24 0.5 3.22 0 3.2 0 50 100 150 200 250 300 LDO Output Current − mA Figure 17.
PAGE 13
TPS61130 TPS61131 TPS61132 www.ti.com SLVS431B – JUNE 2002 – REVISED JANUARY 2008 TPS61132 LDO LOAD TRANSIENT RESPONSE VI = 3.3 V IL = 20 mA to 180 mA Output Current 100 mA/Div, DC TPS61132 LDO LINE TRANSIENT RESPONSE VI = 1.8 V to 2.6 V RL = 15 W Input Voltage 1 V/Div, DC Output Voltage 10 mV/Div, AC Output Voltage 20 mV/Div, AC VO = 1.5 V VO = 1.5 V Timebase − 500 µs/Div Timebase − 2 ms/Div Figure 21. Figure 22. TPS61132 LDO START-UP AFTER ENABLE VI = 3.
PAGE 14
TPS61130 TPS61131 TPS61132 www.ti.com SLVS431B – JUNE 2002 – REVISED JANUARY 2008 DETAILED DESCRIPTION Controller Circuit The controller circuit of the device is based on a fixed frequency multiple feedforward controller topology. Input voltage, output voltage, and voltage drop on the NMOS switch are monitored and forwarded to the regulator.
PAGE 15
TPS61130 TPS61131 TPS61132 www.ti.com SLVS431B – JUNE 2002 – REVISED JANUARY 2008 Power Save Mode The SKIPEN pin can be used to select different operation modes. To enable the power save mode, SKIPEN must be set high. Power save mode is used to improve efficiency at light loads. In power save mode, the converter only operates when the output voltage trips below a set threshold voltage.
PAGE 16
TPS61130 TPS61131 TPS61132 www.ti.com SLVS431B – JUNE 2002 – REVISED JANUARY 2008 APPLICATION INFORMATION DESIGN PROCEDURE The TPS6113x dc/dc converters are intended for systems powered by a dual up to 4 cell NiCd or NiMH battery with a typical terminal voltage between 1.8 V and 6.5 V. They can also be used in systems powered by one-cell Li-Ion with a typical stack voltage between 2.5 V and 4.2 V.
PAGE 17
TPS61130 TPS61131 TPS61132 www.ti.com SLVS431B – JUNE 2002 – REVISED JANUARY 2008 LDO Programming the output voltage of the LDO follows almost the same rules as at the dc/dc converter section. The maximum recommended output voltage of the LDO is 5.5 V. Since reference and internal feedback circuitry are similar, as they are at the dc/dc converter section, R4 also should be in the 200-kΩ range.
PAGE 18
TPS61130 TPS61131 TPS61132 www.ti.com SLVS431B – JUNE 2002 – REVISED JANUARY 2008 has been optimized to operate with inductance values between 10 µH and 47 µH. Nevertheless operation with higher inductance values may be possible in some applications. Detailed stability analysis is recommended. Care has to be taken that load transients and losses in the circuit can lead to higher currents as estimated in Equation 6.
PAGE 19
TPS61130 TPS61131 TPS61132 www.ti.com SLVS431B – JUNE 2002 – REVISED JANUARY 2008 capacitance needs to be larger than calculated above to meet the total ripple requirements. The output capacitor has to completely supply the load during the charging phase of the inductor. A reasonable value of the output capacitance depends on the speed of the load transients and the load current during the load change.
PAGE 20
TPS61130 TPS61131 TPS61132 www.ti.com SLVS431B – JUNE 2002 – REVISED JANUARY 2008 APPLICATION EXAMPLES C7 10 µF U1 L1−A L1−B 22 µH SWN SWP VBAT VOUT 22 µH C6 2.2 µF R1 C3 10 µF LBI R2 3.3 V, >250 mA C4 100 µF LDOIN SKIPEN LDOOUT C5 2.2 µF LDOSENSE EN R7 LDOEN List of Components: U1 = TPS61132PW L1 = Coiltronics DRQ74−220 C3, C5, C6, C7 = X7R/X5R Ceramic C4 = Low ESR Tantalum R9 LBO LBO PGOOD PGND GND 1.5 V, >120 mA PGOOD TPS61132PW Figure 25.
PAGE 21
TPS61130 TPS61131 TPS61132 www.ti.com SLVS431B – JUNE 2002 – REVISED JANUARY 2008 C7 10 µF U1 L1−A L1−B 22 µH SWN SWP VBAT VOUT R3 R1 C3 10 µF 22 µH C6 22 µF FB LBI R6 R2 LDOIN LDOOUT SKIPEN 3.3 V R5 LDOSENSE EN R7 R4 LDOEN List of Components: U1 = TPS61130PW L1 = Coiltronics DRQ74−220 C3, C5, C7 = X7R/X5R Ceramic C6 = X7R/X5R Ceramic or Low ESR Tantalum R9 C5 2.2 µF LBO LBO PGOOD PGOOD PGND GND TPS61130PW Figure 27. Single Output Using LDO as Filter USB Input 4.2 V...5.
PAGE 22
TPS61130 TPS61131 TPS61132 www.ti.com SLVS431B – JUNE 2002 – REVISED JANUARY 2008 THERMAL INFORMATION Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added heat sinks and convection surfaces, and the presence of other heat-generating components affect the power-dissipation limits of a given component.
PAGE 23
PACKAGE MATERIALS INFORMATION www.ti.com 21-Dec-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPS61130PWR Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 TPS61130RSAR QFN RSA 16 3000 330.0 12.4 4.3 4.3 1.5 8.0 12.0 Q2 TPS61131PWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.
PAGE 24
PACKAGE MATERIALS INFORMATION www.ti.com 21-Dec-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS61130PWR TSSOP PW 16 2000 367.0 367.0 35.0 TPS61130RSAR QFN RSA 16 3000 338.1 338.1 20.6 TPS61131PWR TSSOP PW 16 2000 367.0 367.0 35.0 TPS61132RSAR QFN RSA 16 3000 338.1 338.1 20.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.