Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - DC/DC voltage regulator Boost DSBGA 9

100

Efficiency - %

I - Output Current - mA

V - Input Voltage - V

3.0

3.3

3.6

3.9

4.2

4.5

4.8

5.1

5.4

0.1

0.2

0.4

0.8

1.6

3.2

6.2

12.6

25.1

50.1

100.1

199.6

398.1

794.3

V = 5.0 V

4.7

μF

10 uF

VIN

VOUT

GND

1 μH

2.65 V .. 4.85 V

OUT

5.0 V @ 700mA

TPS61256

TPS61253, TPS61254, TPS61256

TPS61258, TPS61259

www.ti.com

SLVSAG8C –SEPTEMBER 2011–REVISED AUGUST 2012

3.5-MHz HIGH EFFICIENCY STEP-UP CONVERTER IN CHIP SCALE PACKAGING

Check for Samples: TPS61253, TPS61254, TPS61256, TPS61258, TPS61259

FEATURES

DESCRIPTION

• 93% Efficiency at 3.5MHz Operation

The TPS6125x device provides a power supply

• 22µA Quiescent Current in Standby Mode

solution for battery-powered portable applications.

Intended for low-power applications, the TPS6125x

• 36µA Quiescent Current in Normal Operation

supports up to 800-mA load current from a battery

• Wide V

Range From 2.3V to 5.5V

discharged as low as 2.65V and allows the use of low

• V

≥ V

OUT

Operation

cost chip inductor and capacitors.

• I

OUT

≥800mA at V

OUT

= 4.5V, V

≥2.65V

With a wide input voltage range of 2.3V to 5.5V, the

• I

OUT

≥1000mA at V

OUT

= 5.0V, V

≥3.3V

device supports applications powered by Li-Ion

batteries with extended voltage range. Different fixed

• I

OUT

≥1500mA (Peak) at V

OUT

= 5.0V, V

≥3.3V

voltage output versions are available from 3.15V to

• ±2% Total DC Voltage Accuracy

5.0V.

• Light-Load PFM Mode

The TPS6125x operates at a regulated 3.5-MHz

• Selectable Standby Mode or True Load

switching frequency and enters power-save mode

Disconnect During Shutdown

operation at light load currents to maintain high

• Thermal Shutdown and Overload Protection

efficiency over the entire load current range. The

PFM mode extends the battery life by reducing the

• Only Three Surface-Mount External

quiescent current to 36μA (typ) during light load

Components Required

operation.

• Total Solution Size <25mm

In addition, the TPS6125x device can also maintain

• 9-Pin NanoFree

(CSP) Packaging

its output biased at the input voltage level. In this

mode, the synchronous rectifier is current limited

APPLICATIONS

allowing external load (e.g. audio amplifier) to be

• Cell Phones, Smart-Phones

powered with a restricted supply. In this mode, the

quiescent current is reduced to 22µA. Input current in

• Mono and Stereo APA Applications

shutdown mode is less than 1µA (typ), which

• USB Charging Port (5V)

maximizes battery life.

The TPS6125x offers a very small solution size due

spacer

to minimum amount of external components. It allows

spacer

the use of small inductors and input capacitors to

achieve a small solution size. During shutdown, the

load is completely disconnected from the battery.

Figure 2. Smallest Solution Size Application

Figure 1. Efficiency vs. Load Current

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

UNLESS OTHERWISE NOTED this document contains

PRODUCTION DATA information current as of publication date.

Products conform to specifications per the terms of Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (34 pages)

PAGE 1
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 www.ti.com SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 3.5-MHz HIGH EFFICIENCY STEP-UP CONVERTER IN CHIP SCALE PACKAGING Check for Samples: TPS61253, TPS61254, TPS61256, TPS61258, TPS61259 FEATURES 1 • • • • • • • • • • • • • • • 93% Efficiency at 3.5MHz Operation 22µA Quiescent Current in Standby Mode 36µA Quiescent Current in Normal Operation Wide VIN Range From 2.3V to 5.5V VIN ≥ VOUT Operation IOUT ≥800mA at VOUT = 4.5V, VIN ≥2.
PAGE 2
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. AVAILABLE DEVICE OPTION TA –40°C to 85°C (1) (2) (3) PART NUMBER (1) OUTPUT VOLTAGE DEVICE SPECIFIC FEATURES ORDERING (2) PACKAGE MARKING CHIP CODE TPS61253 5.
PAGE 3
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 www.ti.com SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 RECOMMENDED OPERATING CONDITIONS MIN VI Input voltage range NOM MAX TPS61253 2.65 (1) 4.85 TPS61254 2.5 4.35 TPS61256 2.5 4.85 TPS61257 2.5 4.15 TPS61258 2.65 (1) 4.35 TPS61259 2.65 (1) 4.85 V Ω RL Minimum resistive load for start-up L Inductance 0.7 1.0 2.9 µH CO Output capacitance 3.
PAGE 4
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Minimum and maximum values are at VIN = 2.3V to 5.5V, VOUT = 4.5V (or VIN, whichever is higher), EN = 1.8V, TA = –40°C to 85°C; Circuit of Parameter Measurement Information section (unless otherwise noted). Typical values are at VIN = 3.6V, VOUT = 4.5V, EN = 1.8V, TA = 25°C (unless otherwise noted).
PAGE 5
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 www.ti.com SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 ELECTRICAL CHARACTERISTICS (continued) Minimum and maximum values are at VIN = 2.3V to 5.5V, VOUT = 4.5V (or VIN, whichever is higher), EN = 1.8V, TA = –40°C to 85°C; Circuit of Parameter Measurement Information section (unless otherwise noted). Typical values are at VIN = 3.6V, VOUT = 4.5V, EN = 1.8V, TA = 25°C (unless otherwise noted).
PAGE 6
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 www.ti.com PIN ASSIGNMENTS BOTTOM VIEW TOP VIEW A1 A2 A3 A3 A2 A1 B1 B2 B3 B3 B2 B1 C1 C2 C3 C3 C2 C1 Table 1. TERMINAL FUNCTIONS TERMINAL NAME NO. I/O DESCRIPTION This is the mode selection pin of the device and is only of relevance when the device is disabled (EN = Low). This pin must not be left floating and must be terminated. Refer to Table 3 for more details.
PAGE 7
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 www.ti.com SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 PARAMETER MEASUREMENT INFORMATION L 1 μH VIN CI 4.7 μF TPS6125x SW VOUT VIN BP EN VOUT CO 10 uF GND EN BP Shutdown, True Load Disconnect (SD) 0 0 Standby Mode, Output Pre-Biased (SM) 0 1 Boost Operating Mode (BST) 1 X Table 2. List of Components REFERENCE DESCRIPTION PART NUMBER, MANUFACTURER L (1) 1.0μH, 1.8A, 48mΩ, 3.2 x 2.5 x 1.0mm max.
PAGE 8
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 www.ti.
PAGE 9
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 www.ti.com SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 EFFICIENCY vs OUTPUT CURRENT EFFICIENCY vs INPUT VOLTAGE 100 95 100 VI = 4.5 V VI = 4.2 V 98 VO = 5 V PFM/PWM Operation 96 90 94 VI = 3.3 V 92 VI = 3.
PAGE 10
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 www.ti.com DC OUTPUT VOLTAGE vs OUTPUT CURRENT 4.545 VO = 5 V (TPS61256) PFM/PWM Operation 5.1 VO = 4.5 V PWM Operation VO - DC Output Voltage - V VO - DC Output Voltage - V 5.15 DC OUTPUT VOLTAGE vs OUTPUT CURRENT VI = 5 V VI = 4.5 V 5.05 VI = 2.5 V VI = 3.6 V 5 VI = 4.5 V 4.5 VI = 2.5 V 4.455 VI = 2.7 V VI = 3 V VI = 3.3 V 4.41 VI = 3.6 V VI = 4.2 V 4.95 0.1 1 10 100 4.
PAGE 11
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 www.ti.com SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 DC OUTPUT VOLTAGE vs INPUT VOLTAGE 5.55 5.5 MAXIMUM OUTPUT CURRENT vs INPUT VOLTAGE 2300 VO = 5 V PFM/PWM Operation 2100 5.4 IO - Maximum Output Current - mA VO - DC Output Voltage - V 5.45 IO = 800 mA 5.35 IO = 500 mA 5.3 5.25 5.2 5.15 IO = 100 mA IO = 10 mA 5.1 5.05 1900 TA = 85°C 1300 1100 900 700 500 2.5 2.75 3 3.25 3.5 3.75 4 4.25 4.5 4.75 VI - Input Voltage - V Figure 13.
PAGE 12
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 www.ti.com PEAK-TO-PEAK OUTPUT RIPPLE VOLTAGE vs OUTPUT CURRENT PEAK-TO-PEAK OUTPUT RIPPLE VOLTAGE vs OUTPUT CURRENT 60 50 VI = 3.3 V 45 VI = 3.6 V 40 35 30 25 VI = 4.5 V 20 15 10 5 CO = 10μF 6.3V (0603) X5R, muRata GRM188R60J106ME84D 0 0 VO - Peak-to-Peak Output Ripple Voltage - mV VI = 2.7 V 55 VO = 5 V (TPS61256) PFM/PWM Operation 50 VI = 2.7 V 45 VI = 3.3 V 40 35 30 VI = 3.6 V VI = 4.
PAGE 13
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 www.ti.com SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 SUPPLY CURRENT vs INPUT VOLTAGE DC PRE-CHARGE CURRENT vs DIFFERENTIAL INPUT-OUTPUT VOLTAGE 45 VI ~ VO 40 IO = 0 mA Standby Operation TA = 25°C Supply Current - mA 35 TA = 85°C 30 25 20 15 10 5 0 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 VI - Input Voltage - V DC Pre-Charge Current - mA TA = -40°C 250 245 240 235 230 225 VI = 2.7 V, 220 T A = 25°C VI = 4.
PAGE 14
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 www.ti.com MOSFET rDS(on) vs TEMPERATURE VALLEY CURRENT LIMIT 25 200 TPS61253 VIN = 3.
PAGE 15
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 www.ti.com SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 COMBINED LINE/LOAD TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION VO = 5.0 V 50 to 500 mA Load Step VI = 3.6 V, VO = 5.0 V 50mA to 500mA Load Step 3.3V to 3.9V Line Step Figure 29. Figure 30. AC LOAD TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE IN PFM/PWM OPERATION 0 to 400mA Load Sweep VI = 3.6 V, VO = 5.0 V 50 to 500 mA Load Step VI = 3.6 V, VO = 5.
PAGE 16
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 www.ti.com AC LOAD TRANSIENT RESPONSE VI = 3.6 V, VO = 5.0 START-UP 0 to 400mA Load VI = 3.6 V, VO = 5.0 V, IO = 0 mA CO = 22μF 10V (1210) X5R, muRata Figure 33. Figure 34. START-UP VI = 2.7 V VI = 4.5 V VI = 3.6 V VO = 5.0 V, IO = 0 mA Figure 35.
PAGE 17
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 www.ti.com SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 DETAILED DESCRIPTION OPERATION The TPS6125x synchronous step-up converter typically operates at a quasi-constant 3.5-MHz frequency pulse width modulation (PWM) at moderate to heavy load currents. At light load currents, the TPS6125x converter operates in power-save mode with pulse frequency modulation (PFM).
PAGE 18
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 www.ti.com STANDBY MODE The TPS6125x device is able to maintain its output biased at the input voltage level. In so called standby mode (EN = 0, BP = 1), the synchronous rectifier is current limited to ca. 150mA allowing an external load (e.g. audio amplifier) to be powered with a restricted supply.
PAGE 19
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 www.ti.com SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 ENABLE The TPS6125x device starts operation when EN is set high and starts up with the soft-start sequence. For proper operation, the EN pin must be terminated and must not be left floating. Pulling the EN and BP pins low forces the device in shutdown, with a shutdown current of typically 1µA.
PAGE 20
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 www.ti.com APPLICATION INFORMATION INDUCTOR SELECTION A boost converter normally requires two main passive components for storing energy during the conversion, an inductor and an output capacitor are required. It is advisable to select an inductor with a saturation current rating higher than the possible peak current flowing through the power switches.
PAGE 21
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 www.ti.com SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 OUTPUT CAPACITOR For the output capacitor, it is recommended to use small ceramic capacitors placed as close as possible to the VOUT and GND pins of the IC. If, for any reason, the application requires the use of large capacitors which can not be placed close to the IC, using a smaller ceramic capacitor in parallel to the large one is highly recommended.
PAGE 22
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 www.ti.com CHECKING LOOP STABILITY The first step of circuit and stability evaluation is to look from a steady-state perspective at the following signals: • Switching node, SW • Inductor current, IL • Output ripple voltage, VOUT(AC) These are the basic signals that need to be measured when evaluating a switching converter.
PAGE 23
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 www.ti.com SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 THERMAL INFORMATION Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added heat sinks and convection surfaces, and the presence of other heat-generating components affect the powerdissipation limits of a given component.
PAGE 24
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 www.ti.com TYPICAL APPLICATION CLASS-D APA Audio Input 1 μH VIN 2.65 V .. 4.35 V Audio Input TPS61254 L SW VOUT VIN BP EN GND 4.5 V / VIN EN IHF EN HP 10 uF 4.7 μF CLASS-AB APA Audio Input Audio Input EN DC/DC EN HP AUDIO AMPLIFIER (HANDS-FREE, HEADPHONE) Figure 38. Combined Audio Amplifier Power Supply L VIN 3.3 V .. 4.8 V TPS61256 1 μH 5.
PAGE 25
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 www.ti.com SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 4.7µF CLASS-D APA Audio Input L Audio Input L EN APA TPS61253 L 1 μH 5 V, up to 1500mA SW VOUT VIN BP EN GND 4.7µF VIN 3.3 V .. 4.35 V 10 µF (x2) 10 μF CLASS-D APA Audio Input R Audio Input R EN DC/DC EN APA HIGH-POWER CLASS-D AUDIO AMPLIFIER TPD4S214 VOTG_IN VUSB VBUS 100nF Data 4.7µF 5V, 500mA USB-OTG Port EN DET D+ FLT D- ADJ ID GND VIO USB PHY Figure 41.
PAGE 26
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 www.ti.com PACKAGE SUMMARY CHIP SCALE PACKAGE (BOTTOM VIEW) D A3 A2 A1 B3 B2 B1 C3 C2 C1 CHIP SCALE PACKAGE (TOP VIEW) YMS CC LLLL A1 E Code: • • • • YM - 2 digit date code S - assembly site code CC - chip code (see ordering table) LLLL - lot trace code PACKAGE DIMENSIONS The dimensions for the YFF-9 package are shown in Table 5. See the package drawing at the end of this data sheet. Table 5.
PAGE 27
TPS61253, TPS61254, TPS61256 TPS61258, TPS61259 www.ti.com SLVSAG8C – SEPTEMBER 2011 – REVISED AUGUST 2012 REVISION HISTORY Note: Page numbers of current revision may differ from previous versions. Changes from Original (September 2011) to Revision A • Page Changed device TPS61256 to production status .................................................................................................................
PAGE 28
PAGE 29
PACKAGE OPTION ADDENDUM www.ti.
PAGE 30
PACKAGE OPTION ADDENDUM www.ti.com (3) 11-Apr-2013 MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
PAGE 31
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jun-2014 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) TPS61253YFFR DSBGA YFF 9 3000 180.0 8.4 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 1.41 1.31 0.69 4.0 8.0 Q1 TPS61253YFFT DSBGA YFF 9 250 180.0 8.4 1.41 1.31 0.69 4.0 8.0 Q1 TPS61254YFFR DSBGA YFF 9 3000 180.0 8.4 1.41 1.31 0.69 4.0 8.
PAGE 32
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jun-2014 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS61253YFFR DSBGA YFF 9 3000 182.0 182.0 17.0 TPS61253YFFT DSBGA YFF 9 250 182.0 182.0 17.0 TPS61254YFFR DSBGA YFF 9 3000 182.0 182.0 17.0 TPS61254YFFT DSBGA YFF 9 250 182.0 182.0 17.0 TPS61256YFFR DSBGA YFF 9 3000 182.0 182.0 17.0 TPS61256YFFT DSBGA YFF 9 250 182.0 182.0 17.
PAGE 33
D: Max = 1.336 mm, Min =1.276 mm E: Max = 1.236 mm, Min =1.
PAGE 34
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.