Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - DC/DC voltage regulator Holder HTSSOP 16

SYNC

GND PGND

= 3.3 V

6.8 Hm

C = 22 F

6.3 V

VIN

LBI

C = 10 F

25 V

1 Fm

V = 3.8 V to 17 V

VIN

VINA

PGNDGND PwPD

AGND

TPS62110

LBO

1 MW

TPS62110-HT

www.ti.com

SLVSAO9B –DECEMBER 2010– REVISED FEBRUARY 2011

17-V, 1.5-A, SYNCHRONOUS STEP-DOWN CONVERTER

Check for Samples: TPS62110-HT

FEATURES

• High-Efficiency Synchronous Step-Down SUPPORTS EXTREME TEMPERATURE

Converter With up to 95% Efficiency APPLICATIONS

• Controlled Baseline

• 3.1-V to 17-V Operating Input Voltage Range

• One Assembly/Test Site

• Adjustable Output Voltage Range From

• One Fabrication Site

1.2 V to 16 V

• Available in Extreme (–55°C/175°C)

• Synchronizable to External Clock Signal up to

Temperature Range

(2)

1.4 MHz

• Extended Product Life Cycle

• Up to 1.5-A Output Peak Current

(1)

• Extended Product-Change Notification

• 32-µA Quiescent Current (Typ)

• Product Traceability

• High Efficiency Over a Wide Load Current

• Texas Instruments high temperature products

Range Due to PFM/PWM Operation Mode

utilize highly optimized silicon (die) solutions

• 100% Maximum Duty Cycle for Lowest

with design and process enhancements to

Dropout

maximize performance over extended

temperatures.

• Overtemperature and Overcurrent Protected

• Available in 16-Pin (PWP) QFP Package

TYPICAL APPLICATION

APPLICATIONS

• Down-Hole Drilling

• High Temperature Environments

(1) Reduce life time may happen when 1.5-A limit is used for long

time. Please refer to the EM calculations graph. (2) Custom temperature ranges available

DESCRIPTION/ORDERING INFORMATION

The TPS62110 is a low-noise synchronous step-down dc-dc converter that is ideally suited for systems powered

from a 2-cell Li-ion battery or from a 12-V or 15-V rail.

The TPS62110 is a synchronous PWM converter with integrated N-channel and P-channel power MOSFET

switches. Synchronous rectification is used to increase efficiency and to reduce external component count. To

achieve highest efficiency over a wide load current range, the converter enters a power-saving, pulse-frequency

modulation (PFM) mode at light load currents. Operating frequency is typically 1 MHz, allowing the use of small

inductor and capacitor values. The device can be synchronized to an external clock signal in the range of 0.8

MHz to 1.4 MHz. For low noise operation, the converter can be operated in PWM-only mode. In the shutdown

mode, the current consumption is reduced to less than 2 μA. The TPS62110 is available in the 16-pin (PWP)

QFP package, and operates over a free-air temperature range of –55°C to 175°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (25 pages)

PAGE 1
TPS62110-HT SLVSAO9B – DECEMBER 2010 – REVISED FEBRUARY 2011 www.ti.com 17-V, 1.5-A, SYNCHRONOUS STEP-DOWN CONVERTER Check for Samples: TPS62110-HT FEATURES 1 • • • • • • • • • • High-Efficiency Synchronous Step-Down Converter With up to 95% Efficiency 3.1-V to 17-V Operating Input Voltage Range Adjustable Output Voltage Range From 1.2 V to 16 V Synchronizable to External Clock Signal up to 1.4 MHz Up to 1.
PAGE 2
TPS62110-HT SLVSAO9B – DECEMBER 2010 – REVISED FEBRUARY 2011 www.ti.
PAGE 3
TPS62110-HT SLVSAO9B – DECEMBER 2010 – REVISED FEBRUARY 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
PAGE 4
TPS62110-HT SLVSAO9B – DECEMBER 2010 – REVISED FEBRUARY 2011 www.ti.com ELECTRICAL CHARACTERISTICS VI = 12 V, VO = 3.3 V, IO = 600 mA, EN = VI PARAMETER TEST CONDITIONS TA = -55°C to 125°C MIN TYP TA = 175°C MAX MIN 17 3.1 TYP MAX UNIT SUPPLY CURRENT VI Input voltage range I(Q) (1) Operating quiescent current I(SD) Shutdown current 3.1 IO = 0 mA, SYNC = GND, VI = 7.2 V, TA = 25°C (2) 20 IO = 0 mA, SYNC = GND, VI = 17 V (2) 23 30 EN = GND, VI = 12 V 1.5 EN = GND, VI = 17 V 1.
PAGE 5
TPS62110-HT SLVSAO9B – DECEMBER 2010 – REVISED FEBRUARY 2011 www.ti.com ELECTRICAL CHARACTERISTICS (continued) VI = 12 V, VO = 3.
PAGE 6
TPS62110-HT SLVSAO9B – DECEMBER 2010 – REVISED FEBRUARY 2011 www.ti.com 1000000 Estimated Operating Lifetime (Hrs) 100000 Duty Cycle 10000 100% 90% 80% 70% 1000 60% 50% 40% 30% 100 20% 10% Load Current = 1 A 10 1 100 120 140 160 180 200 Continuous TJ ( oC) (1) See datasheet for absolute maximum and minimum recommended operating conditions. (2) Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect life).
PAGE 7
TPS62110-HT SLVSAO9B – DECEMBER 2010 – REVISED FEBRUARY 2011 www.ti.com 10000000 1000000 Estimated Operating Lifetime (Hrs) 100000 Duty Cycle 100% 10000 90% 80% 30% 20% 1000 Load Current = 0.5 A 10% 100 10 1 100 120 140 160 180 200 Continuous Tj ( oC) (1) See datasheet for absolute maximum and minimum recommended operating conditions. (2) Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect life).
PAGE 8
TPS62110-HT SLVSAO9B – DECEMBER 2010 – REVISED FEBRUARY 2011 www.ti.com DEVICE INFORMATION PIN ASSIGNMENT TOP VIEW PWP PACKAGE (TOP VIEW) VIN EN SYNC LBO LBI VINA AGND FB VIN PGND PGND SW SW Exposed Thermal Pad PG GND GND TERMINAL FUNCTIONS TERMINAL NAME NO. I/O DESCRIPTION EN 2 I Enable. A logic high enables the converter; logic low forces the device into shutdown mode reducing the supply current to less than 2 µA. FB 8 I Feedback pin for the fixed output voltage option.
PAGE 9
TPS62110-HT SLVSAO9B – DECEMBER 2010 – REVISED FEBRUARY 2011 www.ti.
PAGE 10
TPS62110-HT SLVSAO9B – DECEMBER 2010 – REVISED FEBRUARY 2011 www.ti.com TYPICAL CHARACTERISTICS EFFICIENCY vs OUTPUT CURRENT EFFICIENCY vs OUTPUT CURRENT 100 100 90 90 80 4.2 V 80 5V 70 60 Efficiency - % Efficiency - % 4.2 V 8.4 V 5V 50 12 V 40 30 8.4 V 60 50 40 12 V 30 VO = 1.8 V o TA = 25 C PWM Mode 20 10 0 0.0001 70 0.001 0.01 0.1 1 VO = 1.8 V o TA = 25 C PFM Mode 20 10 0 0.0001 10 0.001 Figure 4.
PAGE 11
TPS62110-HT SLVSAO9B – DECEMBER 2010 – REVISED FEBRUARY 2011 www.ti.
PAGE 12
TPS62110-HT SLVSAO9B – DECEMBER 2010 – REVISED FEBRUARY 2011 www.ti.com DETAILED DESCRIPTION OPERATION The TPS62110 is a synchronous step-down converter that operates with a 1-MHz fixed frequency pulse width modulation (PWM) at moderate-to-heavy load currents and enters the power save mode at light load current. During PWM operation, the converter uses a unique fast response voltage mode control scheme with input voltage feedforward.
PAGE 13
TPS62110-HT SLVSAO9B – DECEMBER 2010 – REVISED FEBRUARY 2011 www.ti.com DETAILED DESCRIPTION (continued) 1.6% 0.8% VO (nominal) -1.6% t Figure 10. Power Save Mode Output Voltage Thresholds The typical PFM (SKIP) current threshold for the TPS62110 is given by: VI I S K IP » 25 W (1) Equation 1 is valid for input voltages up to 7 V. For higher voltages, the skip current threshold is not increased further.
PAGE 14
TPS62110-HT SLVSAO9B – DECEMBER 2010 – REVISED FEBRUARY 2011 www.ti.com DETAILED DESCRIPTION (continued) ENABLE Logic low on EN forces the TPS62110 into shutdown. In shutdown, the power switch, drivers, voltage reference, oscillator, and all other functions are turned off. The supply current is reduced to less than 2 μA in the shutdown mode. When the device is in thermal shutdown, the bandgap is forced to be switched on even if the device is set into shutdown by pulling EN to GND.
PAGE 15
TPS62110-HT SLVSAO9B – DECEMBER 2010 – REVISED FEBRUARY 2011 www.ti.com DETAILED DESCRIPTION (continued) 6.8 mH VI = 4.3 V to 17 V 16 1 2 TPS62110 VIN VIN EN SW SW 13 PG 11 LBO 4 FB 8 R3 R5 CI = 10 mF 25 V 6 VINA 7 AGND 5 LBI 3 SYNC 1 mF R6 VO = 3.3 V 12 R4 R1 560 kW Cff 10 pF CO = 22 mF 6.3 V R2 300 kW R7 GND GND PwPD PGND PGND 9 10 14 15 Figure 11.
PAGE 16
TPS62110-HT SLVSAO9B – DECEMBER 2010 – REVISED FEBRUARY 2011 www.ti.com Table 2. Advantages and Disadvantages When Designing the Inductor and Output Capacitor INFLUENCE ON STABILITY ADVANTAGE DISADVANTAGE Less output voltage ripple Increase Cout (>22 µF) Uncritical Decrease Cout (<22 µF) Critical Increase inductor value >6.
PAGE 17
TPS62110-HT SLVSAO9B – DECEMBER 2010 – REVISED FEBRUARY 2011 www.ti.com VO VI L ´ f 1 I R M S (C O ) = V O ´ ´ 1 2 ´ 3 (4) The overall output ripple voltage is the sum of the voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charge and discharging the output capacitor: VO VI L ´ f 1 DV O = VO ´ æ 1 ´ çç + RESR è 8 ´ CO ´ f ö ÷ ÷ ø (5) Where the highest output voltage ripple occurs at the highest input voltage VI.
PAGE 18
TPS62110-HT SLVSAO9B – DECEMBER 2010 – REVISED FEBRUARY 2011 www.ti.com APPLICATION INFORMATION 6.8 mH VI = 3.5 V to 17 V 16 TPS62110 VIN VIN EN 1 2 SW SW 13 R3 1 MW R5 CI = 10 mF 25 V 6 VINA 7 AGND 5 LBI PG 1 mF 3 R6 VO = 1.8 V 12 R4 1 MW LBO 4 FB 8 Cff 10 pF R1 220 kW 11 CO = 2 x 22 mF 6.3 V (See Note A) R2 390 kW SYNC GND GND PwPD PGND PGND 9 A. 10 14 15 For an output voltage lower than 2.
PAGE 19
TPS62110-HT SLVSAO9B – DECEMBER 2010 – REVISED FEBRUARY 2011 www.ti.com 6.8 mH VI = 9.3 V to 17 V 16 1 2 CI = 10 mF 25 V TPS62110 VIN VIN EN 13 VO = 9 V 12 1 MW 6 VINA 7 AGND 5 LBI PG 1 mF 3 SW SW 11 R1 680 kW Cff 22 pF CO = 33 mF 16 V (See Note A) LBO 4 FB 8 R2 100 kW SYNC GND GND PwPD PGND PGND 9 A. 10 14 15 For an output voltage greater than 5 V, an output capacitor of 33 μF minimum is required for stability. Figure 14.
PAGE 20
PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) TPS62110HPWP ACTIVE Package Type Package Pins Package Drawing Qty HTSSOP PWP 16 90 Eco Plan Lead/Ball Finish (2) Green (RoHS & no Sb/Br) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) CU NIPDAU Level-2-260C-1 YEAR (4) -55 to 175 S62110H (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs.
PAGE 21
PACKAGE OPTION ADDENDUM www.ti.
PAGE 22
PAGE 23
PAGE 24
PAGE 25
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.