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User's Guide

SLVU425A–April 2011– Revised July 2011

TPS6236xEVM-655

This user’s guide describes the characteristics, operation, and use of the TPS62360EVM-655

(HPA655-001), the TPS62361BEVM-655 (HPA655-002), the TPS62362EVM-655 (HPA-003), and the

TPS62365EVM-655 (HPA655-004) evaluation modules (EVMs). These EVMs demonstrate the Texas

Instruments TPS62360, TPS62361B, TPS62362, or TPS62365 Processor Supply with I

C Interface and

Remote Sense. This document includes setup instructions, a schematic diagram, bill of materials, and

PCB layout drawings for the evaluation module. The only difference between the 4 versions of the EVM is

the TPS6236x IC, U1.

Contents

1 Introduction .................................................................................................................. 2

2 Setup ......................................................................................................................... 3

3 Software Setup and Operation ............................................................................................ 6

4 Circuit Use and Modifications ............................................................................................. 8

5 Test Results ................................................................................................................. 9

6 Board Layout ............................................................................................................... 14

7 Schematic and Bill of Materials .......................................................................................... 17

List of Figures

1 TPS6236x Software Main Panel .......................................................................................... 6

2 Efficiency vs. Input Voltage (I

OUT

= 1.5A, V

OUT

= 1.4V) ................................................................. 9

3 Efficiency vs. Output Current (V

= 3.6V, V

OUT

= 0.92, 1.16, 1.4, 1.7)............................................... 9

4 Load Regulation (V

OUT

= 1.4V, V

= 3.6V) ............................................................................. 10

5 Line Regulation (V

OUT

= 1.4V, I

OUT

= 1.5A).............................................................................. 10

6 Start-up (V

= 3.6V, V

OUT

= 1.4V, I

OUT

= 1.5A) ......................................................................... 11

7 Shutdown (V

= 3.6V, V

OUT

= 1.4V, I

OUT

= 0, output cap discharge enabled)...................................... 11

8 Output Voltage Ripple (V

= 3.6V, V

OUT

= 1.4V, I

OUT

= 3A)........................................................... 12

9 Input Voltage Ripple (V

= 3.6V, V

OUT

= 1.4V, I

OUT

= 3A)............................................................. 12

10 Load Transient Response (V

= 3.6V, V

OUT

= 1.4V, I

OUT

= 1A to 2A step) ......................................... 13

11 Thermal Performance (V

= 3.6V, V

OUT

= 1.4V, I

OUT

= 3A) ........................................................... 13

12 Assembly Layer............................................................................................................ 14

13 Top Layer................................................................................................................... 15

14 Layer 2 ...................................................................................................................... 15

15 Layer 3 ..................................................................................................................... 16

16 Bottom Layer............................................................................................................... 16

17 TPS6236xEVM-655 Schematic.......................................................................................... 17

List of Tables

1 Performance Specification Summary..................................................................................... 2

2 Default Jumper Settings.................................................................................................... 5

3 TPS6236x Solution Required Components ............................................................................ 18

4 TPS6236xEVM-655 Evaluation Components.......................................................................... 18

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SLVU425A– April 2011–Revised July 2011 TPS6236xEVM-655

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Summary of content (20 pages)

PAGE 1
User's Guide SLVU425A – April 2011 – Revised July 2011 TPS6236xEVM-655 This user’s guide describes the characteristics, operation, and use of the TPS62360EVM-655 (HPA655-001), the TPS62361BEVM-655 (HPA655-002), the TPS62362EVM-655 (HPA-003), and the TPS62365EVM-655 (HPA655-004) evaluation modules (EVMs). These EVMs demonstrate the Texas Instruments TPS62360, TPS62361B, TPS62362, or TPS62365 Processor Supply with I2C Interface and Remote Sense.
PAGE 2
Introduction 1 Introduction 1.1 Requirements www.ti.com To operate this EVM, connect and properly configure the following components: A personal computer (PC) with a USB port is required to operate this EVM. The TPS6236x interface software runs on the PC and communicates with the EVM via the PC’s USB port. Commands can be sent to the internal registers of the TPS6236x through the USB port. The software has been tested with the PC requirements listed below.
PAGE 3
Setup www.ti.com Table 1. Performance Specification Summary (continued) SPECIFICATION TEST CONDITIONS Maximum efficiency 2 VIN = 3.6V, VOUT = 1.7V, IOUT = 750mA MIN TYP MAX UNIT 91.4% Setup This section describes the jumpers and connectors on the EVM as well as how to properly connect, set up, and use the TPS6236xEVM-655. 2.1 2.1.1 Connector/Jumper Descriptions J1 – VIN This header is for the positive input supply voltage to the converter.
PAGE 4
Setup 2.1.9 www.ti.com J9 – I2C Monitor Point and Alternate Connection This header is provided to connect to or monitor the I2C signals on the TPS6236xEVM-655. If the I2C signals are being sent via this header (and not via the USB-TO-GPIO adaptor), do not plug into the J8 header and provide a separate VDD supply on JP1 without any jumper installed. 2.1.
PAGE 5
Setup www.ti.com 2.3 Hardware Setup Table 2 shows the board default jumper settings. Table 2. Default Jumper Settings JUMPER DEFAULT JP1 Installed across pins 1 and 2 JP2 Installed across pins 2 and 3 JP3 Installed across pins 2 and 3 JP4 Installed across pins 1 and 2 Connect the USB-TO-GPIO adapter to your PC using the supplied USB cable. Connect the TPS6236xEVM connector J8 to the USB-TO-GPIO adapter using the supplied 10-pin ribbon cable.
PAGE 6
Software Setup and Operation 3 www.ti.com Software Setup and Operation This section provides descriptions of the EVM software and functionality. The supplied software is used to communicate with the TPS6236xEVM. Click on the icon on the host PC to start the software. The host PC software first checks the firmware version of the USB-TO-GPIO adapter. If an incorrect firmware version is installed, the software automatically searches on the Internet (if connected) for updates.
PAGE 7
Software Setup and Operation www.ti.com It is recommended that the user press the 'READ' button at the top of the screen immediately after loading the software to confirm that the software and cable connections are working properly. The message box at the top right of the main panel (I2C Activity) displays all I2C activity. The message box at the bottom (USB Bridge Connected) displays whether or not the USB-TO-GPIO connection is functional.
PAGE 8
Circuit Use and Modifications 4 www.ti.com Circuit Use and Modifications Besides the required circuitry to operate the TPS6236x (outlined in a white silk screen border on the PCB), there are additional circuits present on the TPS6236xEVM-655 that assist in evaluating the TPS6236x as a processor power supply solution. Additionally, there are modifications that can be made to adapt the circuit's performance to the needs of a particular application. 4.
PAGE 9
Test Results www.ti.com 5 Test Results This section provides typical performance waveforms for the TPS6236xEVM-655. 100 98 96 Efficiency - % 94 92 90 88 86 84 82 80 2.5 3 3.5 4 4.5 VI - Input Voltage - V 5 5.5 Figure 2. Efficiency vs. Input Voltage (IOUT = 1.5A, VOUT = 1.4V) 100 1.4 V 90 1.7 V 80 1.16 V Efficiency - % 70 0.92 V 60 50 40 30 20 10 0 0.1 1 10 100 IO - Load Current - mA 1k 10k Figure 3. Efficiency vs. Output Current (VIN = 3.6V, VOUT = 0.92, 1.16, 1.4, 1.
PAGE 10
Test Results www.ti.com 0.15 Load Regulation - % 0.1 0.05 0 -0.05 -0.1 -0.15 0.1 1 10 100 IO - Load Current - mA 1k 10k Figure 4. Load Regulation (VOUT = 1.4V, VIN = 3.6V) 0.1 0.08 Line Regulation - % 0.06 0.04 0.02 0 -0.02 -0.04 -0.06 -0.08 -0.1 2.5 3 3.5 4 4.5 VI - Input Voltage - V 5 5.5 Figure 5. Line Regulation (VOUT = 1.4V, IOUT = 1.
PAGE 11
Test Results 5 V/div www.ti.com EN 0.5 V/div 0.5 A/div Iinductor VOUT t - Time - 20 ms/div 0.5 V/div 0.5 A/div 5 V/div Figure 6. Start-up (VIN = 3.6V, VOUT = 1.4V, IOUT = 1.5A) EN Iinductor VOUT t - Time - 2 ms/div Figure 7. Shutdown (VIN = 3.6V, VOUT = 1.
PAGE 12
Test Results 20 mV/div 0.5 A/div 5 V/div www.ti.com SW Iinductor VOUT (AC COUPLED) t - Time - 200 ns/div SW Iinductor 50 mV/div 0.5 A/div 5 V/div Figure 8. Output Voltage Ripple (VIN = 3.6V, VOUT = 1.4V, IOUT = 3A) VIN (AC COUPLED) t - Time - 200 ns/div Figure 9. Input Voltage Ripple (VIN = 3.6V, VOUT = 1.
PAGE 13
Test Results 50 mV/div www.ti.com 1 A/div VOUT (AC COUPLED) IOUT 1A to 2A load Step t - Time - 5 ms/div Figure 10. Load Transient Response (VIN = 3.6V, VOUT = 1.4V, IOUT = 1A to 2A step) Figure 11. Thermal Performance (VIN = 3.6V, VOUT = 1.
PAGE 14
Board Layout 6 www.ti.com Board Layout This section provides the TPS6236xEVM-655 board layout and illustrations. Board layout is critical for all high-frequency, switch-mode power supplies. Figure 12 through Figure 15 show the board layout for the TPS6236xEVM-655 PCB. The nodes with high-switching frequencies and currents are kept as short as possible to minimize trace inductance. Careful attention has been given to the routing of high-frequency current loops and a single-point grounding scheme is used.
PAGE 15
Board Layout www.ti.com Figure 13. Top Layer Figure 14.
PAGE 16
Board Layout www.ti.com Figure 15. Layer 3 Figure 16.
PAGE 17
Schematic and Bill of Materials www.ti.com 7 Schematic and Bill of Materials This section provides the TPS6236xEVM-655 schematic and bill of materials. The bill of materials is provided in two tables. Table 3 are the components required to build the TPS6236x solution. Table 4 are the components used only to evaluate the TPS6236xEVM-655 solution. 7.1 Schematic Figure 17.
PAGE 18
Schematic and Bill of Materials 7.2 www.ti.com Bill of Materials Table 3. TPS6236x Solution Required Components Count RefDes Value Description Size Part Number MFR 3 C1, C4, C5 0.1 µF Capacitor, Ceramic, 10V, X5R, 20% 0402 Std Std 2 C2, C6 10 µF Capacitor, Ceramic, 6.3V, X5R, 20% 0603 Std Std 1 1 L1 1.0 µH Inductor, Power, 5.4 A, 10.8 mΩ, ±20% 0.157 x 0.
PAGE 19
Evaluation Board/Kit Important Notice Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards.
PAGE 20
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.