Datasheet

Vcc_CORE
Vcc_Batt
Vcc_IO
Vcc_LCD
Vcc_MEM
Vcc_BB
Vcc_USIM
Vcc_SRAM
Vcc_PLL
SYS_EN
PWR_EN
3V
3V;3.3V
1.8V;2.5V;3V;3.3V
1.8V;2.5V;3V;3.3V
1.8V;2.5V;3V;3.3V
1.8V;3V
1.3V
1.1V
Variable0.8Vto1.6V
LDO1
L3
L1
VRTC
DCDC2_EN
LDO_EN
LDO2
nBatt_Fault
nRESET
nVcc_Fault
TPS65020
L2
INT
RESPWRON
DCDC3_EN
PWRFAIL
DCDC1_EN
DEFDCDC3
DEFDCDC2
DEFDCDC1
Vcc
SCLK
SDAT
Vcc_Batt
4.7
kW
4.7
kW
LOWBAT_SNS
PWRFAIL_SNS
Vcc
VBACKUP
3V
backup
battery
Vcc
VINDCDC1
VINDCDC2
VINDCDC3
Vcc
10R
1 Fm
10 Fm
10 Fm
10 Fm
TRESPWRON
HOT_RESET
VSYSIN
PB_OUT
PB_IN
VDCDC1
SCLK
SDAT
VIN_LDO
LOW_BATT
VDCDC1
VDCDC2
VDCDC3
Vcc
22 Fm
22 Fm
22 Fm
2.2 Hm
2.2 Hm
2.2 Hm
2.2 Fm
2.2 Fm
4.7 Fm
1nF
toGPIOof
processor
GPIOx
Vcc_IO
Vcc_Batt
TPS65020
SLVS607C –SEPTEMBER 2005– REVISED SEPTEMBER 2011 www.ti.com
TYPICAL CONFIGURATION FOR THE Intel® PXA270 BULVERDE PROCESSOR
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