Datasheet

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FEATURES

APPLICATIONS

DESCRIPTION

TPS65053

TPS650531

TPS650532

www.ti.com

............................................................................................................................................. SLVS754C – MARCH 2007 – REVISED SEPTEMBER 2009

5-CHANNEL POWER MGMT IC WITH TWO STEP DOWN CONVERTERS

AND 3 LOW-INPUT VOLTAGE LDOs

• One General-Purpose 400-mA LDO

• Up To 95% Efficiency • Two General-Purpose 200-mA LDOs

• Output Current for DC/DC Converters: • V

Range for LDOs from 1.5 V to 6.5 V

– TPS65053: DCDC1 = 1 A; DCDC2 = 0.6 A • Output Voltage for LDO3:

– TPS650531: DCDC1 = 1 A; DCDC2 = 1 A – TPS65053: VLDO3 = 1.3 V

– TPS650532: DCDC1 = 1 A; DCDC2 = 1 A – TPS650531: VLDO3 = 1.2 V

• DC/DC Converters Externally Adjustable – TPS650532: VLDO3 = 1.5 V

• V

Range for DC/DC Converters • Available in a 4 mm x 4 mm 24-Pin QFN

From 2.5 V to 6 V Package

• 2.25-MHz Fixed Frequency Operation

• Power Save Mode at Light Load Current

• Cell Phones, Smart-Phones

• 180 ° Out-of-Phase Operation

• WLAN

• Output Voltage Accuracy in PWM mode ± 1%

• PDAs, Pocket PCs, GPS

• Total Typical 32- µ A Quiescent Current for Both

• OMAP™ and Low-Power DSP Supply

DC/DC Converters

• Portable Media Players

• 100% Duty Cycle for Lowest Dropout

• Digital Cameras

The TPS65053x are integrated Power Management ICs for applications powered by one Li-Ion or Li-Polymer

cell, which require multiple power rails. The TPS65053x provide two highly efficient, 2.25MHz step-down

converters targeted at providing the core voltage and I/O voltage in a processor based system. Both step-down

converters enter a low power mode at light load for maximum efficiency across the widest possible range of load

currents. For low noise applications the devices can be forced into fixed frequency PWM mode by pulling the

MODE pin high. Both converters allow the use of small inductors and capacitors to achieve a small solution size.

TPS65053 provides an output current of up to 1A on the DCDC1 converter and up to 0.6A on the DCDC2

converter. TPS650531 and TPS650532 provide up to 1A on both DCDC1 and DCDC2. The TPS65053x also

integrate one 400mA LDO and two 200mA LDO voltage regulators, which can be turned on/off using separate

enable pins on each LDO. Each LDO operates with an input voltage range between 1.5V and 6.5V allowing them

to be supplied from one of the step-down converters or directly from the main battery. LDO1 and LDO2 are

externally adjustable while LDO3 has a fixed output voltage of 1.3V on TPS65053, 1.2V on TPS650531 and 1.5V

on TPS650532.

The TPS65053x come in a small 24-pin leadless package (4mm × 4mm QFN) with a 0,5mm pitch.

ORDERING INFORMATION

(1)

PART QFN

(2)

PACKAGE

output voltage on LDO3

NUMBER PACKAGE MARKING

– 40 ° C to 85 ° C TPS65053 1.3V RGE 65053

– 40 ° C to 85 ° C TPS650531 1.2V RGE 650531

– 40 ° C to 85 ° C TPS650532 1.5V RGE 650532

(1) For the most current package and ordering information, see the Package Option Addendum at the end

of this document, or see the TI web site at www.ti.com .

(2) The RGE package is available in tape and reel. Add R suffix (TPS65053RGER) to order quantities of

3000 parts per reel. Add T suffix (TPS65053RGET) to order quantities of 250 parts per reel.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2 OMAP, PowerPAD are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (27 pages)

PAGE 1
TPS65053 TPS650531 TPS650532 www.ti.com ............................................................................................................................................. SLVS754C – MARCH 2007 – REVISED SEPTEMBER 2009 5-CHANNEL POWER MGMT IC WITH TWO STEP DOWN CONVERTERS AND 3 LOW-INPUT VOLTAGE LDOs FEATURES 1 • Up To 95% Efficiency • Output Current for DC/DC Converters: – TPS65053: DCDC1 = 1 A; DCDC2 = 0.
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TPS65053 TPS650531 TPS650532 SLVS754C – MARCH 2007 – REVISED SEPTEMBER 2009 ............................................................................................................................................. www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
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TPS65053 TPS650531 TPS650532 www.ti.com .............................................................................................................................................
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TPS65053 TPS650531 TPS650532 SLVS754C – MARCH 2007 – REVISED SEPTEMBER 2009 ............................................................................................................................................. www.ti.com ELECTRICAL CHARACTERISTICS (continued) Vcc = VINDCDC1/2 = 3.6V, EN = Vcc, MODE = GND, L = 2.2µH, COUT = 22µF, TA = –40°C to 85°C typical values are at TA = 25°C (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 2.025 2.25 2.
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TPS65053 TPS650531 TPS650532 www.ti.com .............................................................................................................................................
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TPS65053 TPS650531 TPS650532 SLVS754C – MARCH 2007 – REVISED SEPTEMBER 2009 ............................................................................................................................................. www.ti.com FUNCTIONAL BLOCK DIAGRAM TPS65053 VINDCDC1/2 1W VCC VIN 22 mF 1 mF 2.2 mH DCDC1 (I/O) ENABLE EN_DCDC1 STEP-DOWN CONVERTER L1 FB_DCDC1 R1 PGND1 R2 1000 mA MODE Cff 10 mF Cff 10 mF 2.
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TPS65053 TPS650531 TPS650532 www.ti.com .............................................................................................................................................
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TPS65053 TPS650531 TPS650532 SLVS754C – MARCH 2007 – REVISED SEPTEMBER 2009 ............................................................................................................................................. www.ti.com EFFICIENCY vs OUTPUT CURRENT EFFICIENCY vs OUTPUT CURRENT 100 90 3.8 V 80 80 4.2 V 5V 50 40 30 VO = 1.3 V, TA = 25°C, PFM Mode 10 4.2 V 40 10 0 0.0001 1 0.001 0.01 0.1 IO - Output Current - A Figure 3. Figure 4.
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TPS65053 TPS650531 TPS650532 www.ti.com ............................................................................................................................................. SLVS754C – MARCH 2007 – REVISED SEPTEMBER 2009 CH4: VLDO1 CH4 (ENLDO1,2,3) CH1 (VLDO1) VI = 3.6 V, TA = 25°C, CH2 (VLDO2) VDCDC1 = 3.3 V, VDCDC2 = 1.5 V, Mode = low 1 V/div CH1: EN_DCDC1/2, ENLDO1, Load = 600 mA LDO1 TO LDO3 STARTUP TIMING 5 V/div DCDC1 STARTUP TIMING 1 V/div CH3: VDCD2 CH3 (VLDO3) VI = 3.
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TPS65053 TPS650531 TPS650532 SLVS754C – MARCH 2007 – REVISED SEPTEMBER 2009 ............................................................................................................................................. www.ti.com CH1 (VDCDC2) VI = 3.6 V DCDC2 LOAD TRANSIENT RESPONSE 50 mV/div 50 mV/div DCDC2 LOAD TRANSIENT RESPONSE CH1 (VDCDC2) VI = 3.6 V o TA = 25 C Mode = High TA = 25oC Mode = Low VDCDC2 = 1.
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TPS65053 TPS650531 TPS650532 www.ti.com ............................................................................................................................................. SLVS754C – MARCH 2007 – REVISED SEPTEMBER 2009 LDO3 LOAD TRANSIENT RESPONSE 50 mV/div 50 mV/div LDO1 LOAD TRANSIENT RESPONSE CH1 (VLDO1) CH1 (VLDO3) VI = 3.6 V o TA = 25 C VI = 3.6 V VLDO3 = 1.3 V I(LDO3) = 20 mA to 180 mA TA = 25oC CH2 I(LDO1) 200 mA/div 200 mA/div VLDO1 = 3.
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TPS65053 TPS650531 TPS650532 SLVS754C – MARCH 2007 – REVISED SEPTEMBER 2009 ............................................................................................................................................. www.ti.com DETAILED DESCRIPTION OPERATION The TPS65053x include two synchronous step-down converters. The converters operate with 2.25MHz fixed frequency pulse width modulation (PWM) at moderate to heavy load currents.
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TPS65053 TPS650531 TPS650532 www.ti.com ............................................................................................................................................. SLVS754C – MARCH 2007 – REVISED SEPTEMBER 2009 Dynamic Voltage Positioning This feature reduces the voltage under/overshoots at load steps from light to heavy load and vice versa. It is activated in Power Save Mode operation when the converter runs in PFM Mode.
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TPS65053 TPS650531 TPS650532 SLVS754C – MARCH 2007 – REVISED SEPTEMBER 2009 ............................................................................................................................................. www.ti.com 100% Duty Cycle Low Dropout Operation The converters offer a low input to output voltage difference while still maintaining operation with the use of the 100% duty cycle mode. In this mode the P-channel switch is constantly turned on.
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TPS65053 TPS650531 TPS650532 www.ti.com ............................................................................................................................................. SLVS754C – MARCH 2007 – REVISED SEPTEMBER 2009 Vbat threshold Reset + - 100 ms delay Vref =1 V Vbat Threshold Comparator Output (Internal) TNRESPWRON Reset Figure 21.
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TPS65053 TPS650531 TPS650532 SLVS754C – MARCH 2007 – REVISED SEPTEMBER 2009 ............................................................................................................................................. www.ti.com APPLICATION INFORMATION TYPICAL APPLICATION CIRCUIT TPS 65053 VINDCDC1/2 1W Vbat Vbat VCC 2.2 mH 1 mF 22 mF L1 2.8 V DCDC1(I/O) Vbat EN_DCDC1 STEP- DOWN CONVERTER 1A MODE FB_DCDC1 R 1 PGND1 Cff 10 mF R2 2.
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TPS65053 TPS650531 TPS650532 www.ti.com ............................................................................................................................................. SLVS754C – MARCH 2007 – REVISED SEPTEMBER 2009 Table 1. Typical Resistor Values OUTPUT VOLTAGE R1 R2 NOMINAL VOLTAGE TYPICAL CFF 3.3 V 680 kΩ 150 kΩ 3.32 V 47 pF 3.0 V 510 kΩ 130 kΩ 2.95 V 47 pF 2.85 V 560 kΩ 150 kΩ 2.84 V 47 pF 2.5 V 510 kΩ 160 kΩ 2.51 V 47 pF 1.8 V 300 kΩ 150 kΩ 1.80 V 47 pF 1.
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TPS65053 TPS650531 TPS650532 SLVS754C – MARCH 2007 – REVISED SEPTEMBER 2009 ............................................................................................................................................. www.ti.com Output Capacitor Selection The advanced Fast Response voltage mode control scheme of the two converters allow the use of small ceramic capacitors with a typical value of 10µF, without having large output voltage under and overshoots during heavy load transients.
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TPS65053 TPS650531 TPS650532 www.ti.com ............................................................................................................................................. SLVS754C – MARCH 2007 – REVISED SEPTEMBER 2009 Table 4. Typical Resistor Values OUTPUT VOLTAGE R5 R6 NOMINAL VOLTAGE 3.3 V 300 kΩ 130 kΩ 3.31 V 3V 300 kΩ 150 kΩ 3.00 V 2.85 V 240 kΩ 130 kΩ 2.85 V 2.80 V 360 kΩ 200 kΩ 2.80 V 2.5 V 300 kΩ 200 kΩ 2.50 V 1.8 V 240 kΩ 300 kΩ 1.80 V 1.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
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PACKAGE MATERIALS INFORMATION www.ti.com 30-Nov-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing TPS650531RGER VQFN RGE 24 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3000 330.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 TPS650531RGET VQFN RGE 24 250 180.0 12.4 4.25 4.25 1.15 8.0 12.0 Q2 TPS650532RGER VQFN RGE 24 3000 330.0 12.4 4.35 4.35 1.1 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 30-Nov-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS650531RGER VQFN RGE 24 3000 367.0 367.0 35.0 TPS650531RGET VQFN RGE 24 250 210.0 185.0 35.0 TPS650532RGER VQFN RGE 24 3000 338.0 355.0 50.0 TPS650532RGER VQFN RGE 24 3000 367.0 367.0 35.0 TPS650532RGET VQFN RGE 24 250 210.0 185.0 35.0 TPS650532RGET VQFN RGE 24 250 338.0 355.0 50.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.