Datasheet

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FEATURES

APPLICATIONS

DESCRIPTION

SWN

TPS65123

2.2

2.7 V to 5.5 V

down to −18 V/2 mA

100 nFR4

SWP

FBL

VMAIN

FBM

220 nF

MAIN

3.0 V to 5.3 V/25 mA

BOOT

VGH

100 nF

up to 20 V/2 mA

PGND

AGND

FBH

RUN

VIN

GATE

Fµ

0.1

0.5

0.9

4.0

8.0

12.0

16.0

20.0

24.0

2.3

2.4

2.6

2.8

3.2

4.0

4.7

5.2

5.5

100

Core Converter Efficiency − %

− Input Voltage − V

BOOT

− Load Current − mA

TPS65120, TPS65121, TPS65123, TPS65124

SLVS531A – JUNE 2004 – REVISED MARCH 2005

SINGLE-INDUCTOR QUADRUPLE-OUTPUT

TFT LCD POWER SUPPLY

• Automatic or Programmable Power

Sequencing

• Main Output, V

MAIN

• Complete 1 mm Component Profile Solution

– Adjustable Voltage, 3.0 V to 5.6 V/25 mA

• 2.5 V to 5.5 V Input Voltage Range

– Post-Regulated for Low Ripple (5mV

)

• Output Short Circuit Protected

– ±0.8% Typical Accuracy

– Efficiency up to 83% • 16-Pin QFN Package (3 × 3 × 0,9 mm)

• Positive Output, V

– Adjustable Voltage up to 20 V/2 mA

• Small Form Factor a-Si and LTPS TFT LCD

– ±3% Typical Accuracy

• Cell Phones, Smart Phones

• Negative Output, V

• PDAs, Pocket PCs

– Adjustable Voltage down to -18 V/2 mA

• Portable DVD

– ±3% Typical Accuracy

• Digital-Still Cameras, Camcorders

• Auxiliary 1.8 V/3.3 V Linear Regulator

• Handheld Instruments

• Portable GPS

• Car Navigation Systems

The TPS6512x DC-DC converter supplies all three voltages required by amorphous-silicon (a-Si) and

low-temperature poly-silicon (LTPS) TFT-LCD displays. The compact layout of the TPS6512x uses a single

inductor to generate independently-regulated positive and negative outputs. A free-running variable peak current

PWM control scheme time-multiplexes the inductor between outputs. This control architecture operates at a

pseudo-fixed-frequency to provide fast response to line and load transients while maintaining a relatively

constant switching frequency and high efficiency over a wide range of input and output voltages. Due to the high

switching frequency capability of the device, inexpensive and ultra-thin 8.2 or 10 µH inductors can be used.

The main output, V

MAIN

, is post-regulated to provide a low-ripple source drive voltage for the LCD display. The

auxiliary outputs generate a boosted output voltage, V

, up to 20 V, and a negative output voltage, V

, down to

-18 V for the LCD gate drive. The device has internal current limiting for high reliability under fault conditions.

Additionally, the device offers a fixed output linear regulator for the LCD logic circuitry.

Figure 1. Typical Application Figure 2. Core Converter Efficiency

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (30 pages)

PAGE 1
TPS65120, TPS65121, TPS65123, TPS65124 www.ti.com SLVS531A – JUNE 2004 – REVISED MARCH 2005 SINGLE-INDUCTOR QUADRUPLE-OUTPUT TFT LCD POWER SUPPLY • FEATURES • • • • Main Output, VMAIN – Adjustable Voltage, 3.0 V to 5.6 V/25 mA – Post-Regulated for Low Ripple (5mVPP) – ±0.8% Typical Accuracy – Efficiency up to 83% Positive Output, VGH – Adjustable Voltage up to 20 V/2 mA – ±3% Typical Accuracy Negative Output, VGL – Adjustable Voltage down to -18 V/2 mA – ±3% Typical Accuracy Auxiliary 1.8 V/3.
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TPS65120, TPS65121, TPS65123, TPS65124 www.ti.com SLVS531A – JUNE 2004 – REVISED MARCH 2005 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION INTEGRATED LINEAR REGULATOR POWER SEQUENCING PACKAGE PART NUMBER (1) PACKAGE MARKING Fixed 3.3V output voltage Automatic Power-Up/Down 3 × 3 QFN-16 TPS65120RGT BKA Fixed 1.
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TPS65120, TPS65121, TPS65123, TPS65124 www.ti.com SLVS531A – JUNE 2004 – REVISED MARCH 2005 ELECTRICAL CHARACTERISTICS VIN = 3.6 V, EN = RUN = VIN, L = 10 µH, TA = -40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT CONVERTER STAGE Input voltage for full load operation RL_MAIN≥ 330 Ω at VMAIN = 5 V, RL_VGH≥ 12 kΩ at VGH = 12 V, RL_VGL≥ 12 kΩ at VGL = -12 V, VLDOIN= GND, TA = -40°C to 85°C 2.
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TPS65120, TPS65121, TPS65123, TPS65124 www.ti.com SLVS531A – JUNE 2004 – REVISED MARCH 2005 ELECTRICAL CHARACTERISTICS (continued) VIN = 3.6 V, EN = RUN = VIN, L = 10 µH, TA = -40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT MAIN OUTPUT VMAIN Main output voltage range IMAIN Maximum main output current VFBM IFBM Feedback regulation voltage 3.0 VMAIN≤ 5.3 V 25 VMAIN≥ 5.3 V 7.5 5.6 V mA 2.7 V ≤ VIN≤ 5.
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TPS65120, TPS65121, TPS65123, TPS65124 www.ti.com SLVS531A – JUNE 2004 – REVISED MARCH 2005 ELECTRICAL CHARACTERISTICS (continued) VIN = 3.6 V, EN = RUN = VIN, L = 10 µH, TA = -40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT LINEAR REGULATOR STAGE - AUXILIARY OUTPUT VLDOIN Input voltage range 2.5 5.8 V VLDOOUT Output voltage range 1.8 VLDOIN -0.
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TPS65120, TPS65121, TPS65123, TPS65124 www.ti.
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TPS65120, TPS65121, TPS65123, TPS65124 www.ti.com SLVS531A – JUNE 2004 – REVISED MARCH 2005 FUNCTIONAL BLOCK DIAGRAM - TPS65120/1/2/3 VIN GATE Power Down Seq Off 100kR Undervoltage Lockout Bias Supply Current Limit Comparator VMAIN Oscillator P−MOS1 Ton RUN S EN Min Off Time SWN EN V REF R BOOT SWP N−MOS3 D1 VGH BOOT V REF RDIS_VGH R FBH R N−MOS2 P−MOS2 FBL BOOT Control Logic VMAIN BOOT FBM Power Up/Down Sequencer LDO EN VMAIN R DIS_VMAIN Power Down Seq Off V REF= 1.
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TPS65120, TPS65121, TPS65123, TPS65124 www.ti.
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TPS65120, TPS65121, TPS65123, TPS65124 www.ti.com SLVS531A – JUNE 2004 – REVISED MARCH 2005 PARAMETER MEASUREMENT INFORMATION TPS65120 V IN 2.7 V to 5.5 V VIN C1 2.2 F VGH R1 C2 220 nF L1 10 H RUN EN GATE V GH up to 20 V/2 mA D1 SWN FBH R3 R4 SWP FBL VMAIN FBM BOOT C4 1 F R2 VGL down to −18 V/2 mA C3 220 nF R5 V MAIN 3.0 V to 5.3 V/20 mA R6 C5 220 nF LDOIN VAUX 3.
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TPS65120, TPS65121, TPS65123, TPS65124 www.ti.com SLVS531A – JUNE 2004 – REVISED MARCH 2005 TPS65124 CORE CONVERTER EFFICIENCY vs LOAD CURRENT TPS65124 CORE CONVERTER EFFICIENCY vs INPUT VOLTAGE 100 100 VMAIN = 5 V 80 70 60 50 40 30 20 1 10 IBOOT = 15 mA 85 80 IBOOT = 5 mA 75 70 60 0 0.1 90 65 VIN = 3.6 V ENVGL = ENVGH = GND 10 VIN = 3.6 V, VMAIN = 5 V, ENVGL = ENVGH = GND 95 Core Converter Efficiency − % Core Converter Efficiency − % 90 2.7 100 3.
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TPS65120, TPS65121, TPS65123, TPS65124 www.ti.com SLVS531A – JUNE 2004 – REVISED MARCH 2005 MAIN DC OUTPUT VOLTAGE vs LOAD CURRENT MAIN OUTPUT RIPPLE VOLTAGE 5.05 VIN = 3.6 V, VGH = 15 V @ 200 A, VGL = −10 V @ 200 A 5.04 5.03 VMAIN (10 mV/div, 5 V Offset) V MAIN − Output Voltage − V VBOOT (50 mV/div, 5.8 V Offset) VIN = 3.6 V, VMAIN = 5 V @ 20 mA, ENVGL = ENVGH = LOW 5.02 5.01 5 4.99 4.98 4.97 4.96 t − Time − 5 s/div 4.95 0 2 4 6 8 10 12 14 16 IMAIN − Output Current − mA Figure 7.
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TPS65120, TPS65121, TPS65123, TPS65124 www.ti.com SLVS531A – JUNE 2004 – REVISED MARCH 2005 POSITIVE, NEGATIVE OUTPUT RIPPLE VOLTAGE POSITIVE OUTPUT (VGH) LOAD REGULATION 15.15 VIN = 3.6 V, VMAIN = 5 V @ 5 mA, VGH = 15 V @ 100 A, VGL = −10 V @ 100 A 10 pF Feed-Forward Capacitor Across R1 15.10 VGH − DC Output Voltage − V VGH (20 mV/div, AC Coupled) VGL (20 mV/div, AC Coupled) 15.05 15 14.95 14.90 14.85 t − Time − 10 s/div 1 IGH − Output Current − mA Figure 12.
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TPS65120, TPS65121, TPS65123, TPS65124 www.ti.com SLVS531A – JUNE 2004 – REVISED MARCH 2005 QUIESCENT CURRENT vs INPUT VOLTAGE TPS65120 POWER-UP SEQUENCING 300 RUN VLOGIC (5 V/div) 250 I Q − Quiescent Current − A VLOGIC 200 VMAIN VMAIN (2 V/div) 150 VGH VGH (5 V/div) 100 50 VMAIN = 3.3 V, VGH = 7.5 V, VGL = −3 V No-Load Quiescent Current Includes Output Voltage Divider Network Bias Current VGL (5 V/div) VGL VIN = 3.6 V, EN = HIGH, RMAIN = 1 k , RGH = 120 k , RGL = 100 k , 0 2.5 2.8 3 3.
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TPS65120, TPS65121, TPS65123, TPS65124 SLVS531A – JUNE 2004 – REVISED MARCH 2005 www.ti.com DETAILED DESCRIPTION The standard application circuit ( Figure 1) of the TPS65120 is a complete power supply for TFT LCD displays. The circuit generates four independent supplies for the source driver (VMAIN), the gate drivers (VGH, VGL) and a logic supply for the timing controller. The input voltage range is from 2.5 V to 5.5 V.
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TPS65120, TPS65121, TPS65123, TPS65124 www.ti.com SLVS531A – JUNE 2004 – REVISED MARCH 2005 DETAILED DESCRIPTION (continued) Enable and Power Sequencing (TPS65120/1/2/3) To correctly power up most TFT panels, the gate-drive supplies must be sequenced such that the negative supply (VGL) powers up before the positive supply (VGH). The TPS65120/1/2/3 controls this sequence through an enable pin.
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TPS65120, TPS65121, TPS65123, TPS65124 www.ti.com SLVS531A – JUNE 2004 – REVISED MARCH 2005 DETAILED DESCRIPTION (continued) Enable and Power Sequencing (TPS65124) The TPS65124 controls the power sequencing of VLOGIC, VMAIN, VGH and VGL with four separate enable pins. These pins must be terminated and not be left floating to prevent instability.
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TPS65120, TPS65121, TPS65123, TPS65124 www.ti.com SLVS531A – JUNE 2004 – REVISED MARCH 2005 APPLICATION INFORMATION OUTPUT POWER CAPABILITY The first step in the design procedure is to calculate the maximum output current for each output under certain input and output voltage conditions. The TPS6512x uses time-multiplex operation to share the inductive storage element between BOOT, VGH and VGL outputs.
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TPS65120, TPS65121, TPS65123, TPS65124 www.ti.com SLVS531A – JUNE 2004 – REVISED MARCH 2005 APPLICATION INFORMATION (continued) The larger the feed-forward capacitor the worse the load regulation of the device. Therefore, when concern for load regulation is paramount, select a capacitor value as small as possible. Another possibility to further reduce ripple voltage on VGH and VGL outputs is to increase output-capacitor values (C2, C3). VIN 2.7 V to 5.5 V TPS65120 VIN C1 2.
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TPS65120, TPS65121, TPS65123, TPS65124 www.ti.com SLVS531A – JUNE 2004 – REVISED MARCH 2005 DIODE SELECTION To achieve high efficiency, use a Schottky diode. The voltage rating must be higher than the input voltage plus the absolute value of the negative output. The current rating of the diode must meet the converter peak inductor-current rating when servicing the VGL output.
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TPS65120, TPS65121, TPS65123, TPS65124 www.ti.com SLVS531A – JUNE 2004 – REVISED MARCH 2005 APPLICATION EXAMPLES TPS65120 VIN 2.7 V to 5.5 V C1 2.2 µF D1 SWN VIN RUN EN GPIO VGH VMAIN FBM BOOT R1 C2 220 nF R4 C3 220 nF SWP FBL GATE VGH up to +20 V/2 mA VGL down to −18 V/2 mA R3 L1 10µH FBH VMAIN 3.0 V to 5.3 V/25 mA R5 C4 R6 1µF R2 C5 220 nF LDOIN VLOGIC = 3.3 V LDOOUT C6 220 nF PGND AGND A A Figure 23. Complete TFT-LCD Power Supply from 1 cell Li-Ion TPS65123 VIN 2.7 V to 5.
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TPS65120, TPS65121, TPS65123, TPS65124 www.ti.com SLVS531A – JUNE 2004 – REVISED MARCH 2005 TPS65124 VIN D1 VIN C1 2.2 µ F VGL SWN RUN GATE GPIO1 10 pF SWP FBL R4 VMAIN FBM BOOT R5 EN VGH C7 R3 L1 C3 220 nF VGH C6 C2 220 nF R1 10 pF FBH R2 GPIO2 VMAIN GPIO3 C5 C4 ENVGH 2.2 µ F R6 4.7 µF ENVGL PGND AGND N&P MOS C8 100 nF GPIO4 A A N&P MOS = VISHAY Si1016 D1 = VISHAY BAT54A−HT3 Figure 26.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined.
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PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing TPS65120RGTR QFN RGT 16 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS65120RGTT QFN RGT 16 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS65121RGTR QFN RGT 16 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 8-Apr-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS65120RGTR QFN RGT 16 3000 338.1 338.1 20.6 TPS65120RGTT QFN RGT 16 250 210.0 185.0 35.0 TPS65121RGTR QFN RGT 16 3000 338.1 338.1 20.6 TPS65123RGTR QFN RGT 16 3000 338.1 338.1 20.6 TPS65123RGTT QFN RGT 16 250 210.0 185.0 35.0 TPS65124RGTR QFN RGT 16 3000 338.1 338.1 20.
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