TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Table 1.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) Lists of the recommended operating maximum ratings for the TPS65910 device are given below. Note1: VCC7 should be connected to the highest supply that is connected to the device VCCx pin.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 RECOMMENDED OPERATING CONDITIONS (continued) over operating free-air temperature range (unless otherwise noted) Lists of the recommended operating maximum ratings for the TPS65910 device are given below. Note1: VCC7 should be connected to the highest supply that is connected to the device VCCx pin.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com RECOMMENDED OPERATING CONDITIONS (continued) over operating free-air temperature range (unless otherwise noted) Lists of the recommended operating maximum ratings for the TPS65910 device are given below. Note1: VCC7 should be connected to the highest supply that is connected to the device VCCx pin.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 I/O PULLUP AND PULLDOWN CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER (1) TEST CONDITIONS MIN TYP MAX UNIT –45% 8 +45% kΩ µA SDA_SDI, SCL_SCK, SDASR_EN2, SCLSR_EN1 Programmable pullup (DFT, default inactive) Grounded, VDDIO = 1.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com DIGITAL I/O VOLTAGE ELECTRICAL CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER MIN TYP MAX UNIT 0.3 x VCC7 V Related I/O: PWRON Low-level input voltage VIL High-level input voltage VIH 0.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 I2C INTERFACE AND CONTROL SIGNALS over operating free-air temperature range (unless otherwise noted) NO. PARAMETER TEST CONDITIONS MIN TYP MAX INT1 rise and fall times, CL = 5 to 35 pF 5 10 ns NRESPWRON rise and fall times, CL = 5 to 35 pF 5 10 ns 10 80 ns 3.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com POWER CONSUMPTION over operating free-air temperature range (unless otherwise noted) All current consumption measurements are relative to the FULL chip, all VCC inputs set to VBAT voltage. PARAMETER Device BACKUP state Device OFF state TYP MAX VBAT = 2.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com BACKUP BATTERY CHARGER over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Backup battery charging current VBACKUP = 0 to 2.4 V, BBCHEN = 1 350 500 700 µA End-of-charge backup battery voltage (1) VCC7 = 3.6 V, BBSEL = 10 –3% 3.15 +3% VCC7 = 3.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 VIO SMPS over operating free-air temperature range (unless otherwise noted) PARAMETER Input voltage (VCCIO and VCC7) VIN DC output voltage (VOUT) TEST CONDITIONS MIN 2.7 5.5 VOUT = 1.5 V or 1.8 V, IOUT > 800 mA 3.2 5.5 VOUT = 2.5 V, IOUT > 800 mA 4.0 5.5 VOUT = 3.3 V, IOUT > 800 mA 4.4 5.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com VIO SMPS (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER Ground current (IQ) TEST CONDITIONS MIN TYP Off MAX UNIT 1 PWM mode, IOUT = 0 mA, VIN = 3.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 VDD1 SMPS over operating free-air temperature range (unless otherwise noted) PARAMETER Input voltage (VCC1 and VCC7) VIN TEST CONDITIONS IOUT ≤ 1200 mA VOUT = 0.6 V to 1.5 V, VGAIN_SEL = 00, IOUT > 1200 mA 2.5 V ≤ VOUT ≤ 3.3 V, VGAIN_SEL = 10 or 11, IOUT > 1200 mA DC output voltage (VOUT) MIN TYP MAX 2.7 5.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com VDD1 SMPS (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP Duty cycle MAX 100 Minimum on time tON(MIN) UNIT % 35 ns 1 MΩ P-channel MOSFET VFB1 internal resistance 0.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 VDD2 SMPS over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS Input voltage (VCC2 and VCC4) VIN IOUT ≤ 1200 mA VOUT = 0.6 V to 1.5 V, VGAIN_SEL = 00, IOUT > 1200 mA 2.5 V ≤ VOUT ≤ 3.3 V, VGAIN_SEL = 10 or 11, IOUT > 1200 mA DC output voltage (VOUT) MIN TYP 2.7 5.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com VDD2 SMPS (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VFB2 internal resistance Discharge resistor for power-down sequence RDIS Ground current (IQ) MIN TYP 0.5 1 30 Off PWM mode, IOUT = 0 mA, VIN = 3.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 VDD3 SMPS over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS Input voltage VIN MIN MAX UNIT 5.5 V 5 5.25 3 DC output voltage (VOUT) 4.65 Rated output current IOUTmax 100 N-channel MOSFET TYP VIN = 3.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com VDIG1 AND VDIG2 LDO over operating free-air temperature range (unless otherwise noted) PARAMETER Input voltage (VCC6) VIN TEST CONDITIONS MIN TYP MAX UNIT VOUT (VDIG1) = 1.2 V @ 300 mA / 1.5 V @ 100 mA and VOUT (VDIG2) = 1.2 V / 1.1 V / 1.0 V @ 300 mA 1.7 5.5 VOUT (VDIG1) = 1.5 V and VOUT (VDIG2) = 1.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 VDIG1 AND VDIG2 LDO (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER Rated output current IOUTmax TEST CONDITIONS MIN TYP MAX SEL = 11, IOUT = 0 to IOUTmax –3% 1.8 +3% SEL = 10 IOUT = 0 to IOUTmax, VIN = VINmin to 4 V –3% 1.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com VAUX33 AND VMMC LDO over operating free-air temperature range (unless otherwise noted) PARAMETER Input voltage (VCC3) VIN TEST CONDITIONS MIN TYP MAX VOUT (VAUX33) = 1.8 V / 2 V and VOUT (VMMC) = 1.8 V 2.7 5.5 VOUT (VAUX33) = 2.8 V 3.2 5.5 VOUT (VAUX33) = 3.3 V 3.6 5.5 VOUT (VMMC) = 2.8 V @ 200 mA 3.2 5.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 VAUX33 AND VMMC LDO (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER Rated output current IOUTmax TEST CONDITIONS On mode Low-power mode Load current limitation (shortcircuit protection) On mode, VOUT = VOUTmin – 100 mV Dropout voltage VDO Dropout voltage VDO VIN = 3.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com VAUX1 AND VAUX2 LDO over operating free-air temperature range (unless otherwise noted) PARAMETER Input voltage (VCC4) VIN TEST CONDITIONS MIN TYP MAX VOUT (VAUX1) = 1.8 V and VOUT (AUX2) = 1.8 V 2.7 5.5 VOUT (VAUX1) = 2.5 V 3.2 5.5 VOUT (VAUX1) = 2.8 V @ Iload = 200 mA and 2.85 V @ Iload = 200mA 3.2 5.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 VAUX1 AND VAUX2 LDO (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Load current limitation (shortcircuit protection) On mode, VOUT = VOUTmin – 100 mV 350 500 mA Dropout voltage VDO On mode, VOUTtyp = 2.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com VDAC AND VPLL LDO over operating free-air temperature range (unless otherwise noted) PARAMETER Input voltage (VCC5) VIN TEST CONDITIONS MIN TYP MAX VOUT(VDAC) = 1.8 V and VOUT(VPLL) = 1.8 V / 1.1 V / 1.0 V 2.7 5.5 VOUT(VDAC) = 2.6 V and VOUT(VPLL) = 2.5 V 3.0 5.5 VOUT(VDAC) = 2.8 V / 2.85 V 3.2 5.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 VDAC AND VPLL LDO (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIN = 2.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com SWITCH-ON/-OFF SEQUENCES AND TIMING (continued) Table 2. Fixed Boot Mode: 00 (continued) EEPROM VDAC_REG SEL EEPROM LDO time slot OFF LDO voltage selection 1.8 V LDO time slot VPLL_REG SEL EEPROM 5 LDO voltage selection 1.8 V LDO time slot VAUX1_REG SEL EEPROM 4 LDO voltage selection 1.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Figure 2 shows the 00 Boot mode timing characteristics. tdSOFF2 PWRHOLD tdSON1 1.8 V VIO/VFBIO VAUX1 1.8 V tdSON2 VDD2/VFB2 3.3 V tdSON3 1.2 V VDD1/VFB1 tdSON4 1.8 V VPLL tdSON5 VDAC 1.8 V VAUX2 1.8 V tdSON6 3.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com Table 4. Fixed Boot Mode: 01 Register VDD1_OP_REG VDD1_REG Bit SEL VGAIN_SEL EEPROM Description VDD1 voltage level selection for boot 1.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Figure 3 shows the 01 Boot mode timing characteristics. tdSOFF2 PWRHOLD tdSON1 VIO/VFBIO 1.8 V tdSON2 VPLL 1.8 V tdSON3 1.2 V VDD1/VFB1 tdSON4 1.2 V VDD2/VFB2 tdSON5 VAUX2 1.8 V tdSON6 VAUX33 3.3 V tdSON7 tdSOFF1 CLK32KOUT tdSON8 NRESPWRON tdSONT: Switch-on sequence Switch-off sequence SWCS046-019 Figure 3.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com POWER CONTROL TIMING (continued) VMBCH threshold VMBDCH threshold VMBLO threshold VMBHI threshold VBNPR threshold VCC7 VRTC 1.8V VBACKUP > VBNPR VIO 1.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com Device SLEEP State Control Figure 7 shows the device SLEEP state control timing characteristics. tACT2SLP tSLP2ACT SLEEP 1.8 V PWM mode 1.8 V Low-power mode 1.8 V PWM mode 1.8 V Active mode 1.8 V Low-power mode 1.8 V Active mode 3.3 V Pulse skip mode 3.3 V Low-power mode 3.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Power Supplies State Control Through the SCLSR_EN1 and SDASR_EN2 Signals Figure 8 andFigure 9 show the power supplies state control through the SCLSR_EN1 and SDASR_EN2 signals timing characteristics. Switch-on sequence Switch-off sequence Device on NRESPWRON tdEN SCLSR_EN1 tdVEN VDIG1 tdEN 1.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com VDD1 and VDD2 Voltage Control Through SCLSR_EN1 and SDASR_EN2 Signals Figure 10 shows the VDD1 and VDD2 voltage control through the SCLSR_EN1 and SDASR_EN2 signals timing characteristics. SCLSR_EN2 tdDVSEN tdDVSENL 1.2 V VDD1/VFB1 tdDVSEN tdDVSENL 0.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Table 10.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com DEVICE INFORMATION Table 11.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Table 11.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 DETAILED DESCRIPTION POWER REFERENCE The bandgap voltage reference is filtered by using an external capacitor connected across the VREF output and the analog ground REFGND (see RECOMMENDED OPERATING CONDITIONS, Recommended Operating Conditions). The VREF voltage is distributed and buffered inside the device.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com Figure 13 shows the transitions of the state-machine.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com • SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Or interrupt flag active (default INT1 low) while the device is off (NRESPWRON = 0) generates a poweron enable condition during a fixed delay (TDOINT1 pulse duration defined in POWER CONTROL TIMING, Power Control Timing).
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com While the device is in SLEEP state, predefined resources are automatically set in their low-power mode or off. Resources can be kept in their active mode: (full-load capability), programming the SLEEP_KEEP_LDO_ON and the SLEEP_KEEP_RES_ON registers. These registers contain 1 bit per power resource.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Any (not masked or masked) interrupt detection causes a POWER ON enable condition during a fixed delay tDOINT1 (only) when the device is in OFF state (when NRESPWON signal is low). Any (not masked) interrupt detection is causing a device wakeup from SLEEP state up to acknowledge of the pending interrupt.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 VRTC 32 kHz to digital block Biasing and amplitude control OSC32KIN REFGND OSC32KOUT Q Coscin Coscout SWCS046-013 Figure 15. Crystal Oscillator 32-kHz Clock RTC The RTC, which is driven by the 32-kHz clock, provides the alarm and timekeeping functions.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com 32-kHz clock input Week Days Frequency compensation 32-kHz counter Minutes Seconds Hours Days Interrupt Control Months Alarm Years INT_ALARM INT_TIMER SWCS046-014 Figure 16. RTC Digital Section Block Diagram NOTE INT_ALARM can generate a wakeup of the platform.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Register Value SECONDS_REG 0x36 MINUTES_REG 0x54 HOURS_REG 0x90 DAYS_REG 0x05 MONTHS_REG 0x09 YEARS_REG 0x08 The user can round to the closest minute, by setting the ROUND_30S register bit. TC values are set to the closest minute value at the next second.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com This drift can be balanced to compensate for any inaccuracy of the 32-kHz oscillator. Software must calibrate the oscillator frequency, calculate the drift compensation versus one time hour period; and then load the compensation registers with the drift compensation value.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 When the hot-die temperature threshold is reached an interrupt is sent to software to close the noncritical running tasks. When the thermal shutdown temperature theshold is reached, the TPS65910 device is set under reset and a transition to OFF state is initiated.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com PACKAGE DESCRIPTION The following are the package descriptions of the TPS65910 PMU devices: • Package type: Package TPS65910 Type RSL QFN-N48 Size (mm) 6x6 Substrate layers 1 layer Pitch ball array (mm) 0.4 mm ViP (via-in-pad) No Number of balls 48 Thickness (mm) (max.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Table 14.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 7 6 5 Reserved Bits www.ti.com 4 3 2 SEC1 1 0 SEC0 Field Name Description Type Reset Reserved Reserved bit RO R returns 0s 0 6:4 SEC1 Second digit of seconds (range is 0 up to 5) RW 0x0 3:0 SEC0 First digit of seconds (range is 0 up to 9) RW 0x0 7 Table 16.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 7 6 5 Reserved 4 3 2 DAY1 1 0 DAY0 Bits Field Name Description Type Reset 7:6 Reserved Reserved bit RO R returns 0s 0x0 5:4 DAY1 Second digit of days (range is 0 up to 3) RW 0x0 3:0 DAY0 First digit of days (range is 0 up to 9) RW 0x1 Table 19.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com Bits Field Name Description Type Reset 7:3 Reserved Reserved bit RO R returns 0s 0x00 2:0 WEEK First digit of day of the week (range is 0 up to 6) RW 0 1 0 Table 22.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 7 6 www.ti.com 5 4 3 2 ALARM_YEAR1 1 0 ALARM_YEAR0 Bits Field Name Description Type Reset 7:4 ALARM_YEAR1 Second digit of alarm programmation for years (range is 0 up to 9) RW 0x0 3:0 ALARM_YEAR0 First digit of alarm programmation for years (range is 0 up to 9) RW 0x0 Table 28.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Table 29. RTC_STATUS_REG Address Offset 0x11 Physical Address Instance Description RTC status register: NOTES: A dummy read of this register is necessary before each I2C read in order to update the status register value.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Bits Field Name Description Type Reset 7:6 Reserved Reserved bit RO R returns 0s 0x0 5:0 SW_RES_PROG Value of the oscillator resistance RW 0x27 Table 34.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com Table 37. BCK3_REG Address Offset 0x19 Physical Address Instance Description Backup register which can be used for storage by the application firmware when the external host is powered down. These registers will retain their content as long as the VRTC is active.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 7 6 5 www.ti.com 4 Reserved 3 2 VRTC_OFFMASK SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Reserved 1 0 ST Bits Field Name Description Type Reset 7:4 Reserved Reserved bit RO R returns 0s 0x0 3 VRTC_OFFMASK VRTC internal regulator off mask signal: when 1, the regulator keeps its full-load capability during device OFF state.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Table 44.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Bits (1) www.ti.com Field Name Description Type Reset 7 CMD Smart-Reflex command: when 0: VDD1_OP_REG voltage is applied when 1: VDD1_SR_REG voltage is applied RW 0 6:0 SEL Output voltage (EEPROM bits) selection with GAIN_SEL = 00 (G = 1, 12.5 mV per LSB): SEL[6:0] = 1001011 to 1111111 : 1.5 V ...
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Bits Field Name Description Type Reset 7:6 VGAIN_SEL Select output voltage multiplication factor: G (EEPROM bits): when 00: x1 when 01: x1 when 10: x2 when 11: x3 RW 0x0 5:4 ILMAX Select maximum load current: when 0: 1.0 A when 1: 1.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com Table 49. VDD2_SR_REG (continued) Type RW 7 6 5 4 3 Reserved Bits 7 6:0 (1) 2 1 0 SEL Field Name Description Type Reset Reserved Reserved bit RO R returns 0s 0 SEL Output voltage (EEPROM bits) selection with GAIN_SEL = 00 (G = 1, 12.5 mV per LSB): SEL[6:0] = 1001011 to 1111111: 1.5 V ...
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com (1) SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Bits Field Name Description Type Reset 7:4 Reserved Reserved bit RO R returns 0s 0x0 3:2 SEL Supply voltage (EEPROM bits): SEL[1:0] = 00 : 1.2 V SEL[1:0] = 01 : 1.5 V SEL[1:0] = 10 : 1.8 V SEL[1:0] = 11 : 2.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 (1) www.ti.com Bits Field Name Description Type Reset 7:4 Reserved Reserved bit RO R returns 0s 0x0 3:2 SEL Supply voltage (EEPROM bits): SEL[1:0] = 00 : 1.8 V SEL[1:0] = 01 : 2.5 V SEL[1:0] = 10 : 2.8 V SEL[1:0] = 11 : 2.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com (1) SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Bits Field Name Description Type Reset 7:4 Reserved Reserved bit RO R returns 0s 0x0 3:2 SEL Supply voltage (EEPROM bits): SEL[1:0] = 00 : 1.8 V SEL[1:0] = 01 : 2.0 V SEL[1:0] = 10 : 2.8 V SEL[1:0] = 11 : 3.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 (1) www.ti.com Bits Field Name Description Type Reset 7:4 Reserved Reserved bit RO R returns 0s 0x0 3:2 SEL Supply voltage (EEPROM bits): SEL[1:0] = 00 : 1.0V SEL[1:0] = 01 : 1.1 V SEL[1:0] = 10 : 1.8 V SEL[1:0] = 11 : 2.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Bits 2 1:0 www.ti.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Table 63.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Bits www.ti.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com Bits SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Field Name Description Type Reset 2 VDD2_KEEPON If VDD2_EN1&2 control bit = 0 (default setting): When 1, VDD2 SMPS PWM mode is maintained during device SLEEP state. No effect if VDD2 working mode is PFM. When 0, VDD2 SMPS PFM mode is set during device SLEEP state.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 Bits 3 2 1 0 VDD1_SETOFF RSVD 4 VDD2_SETOFF 5 VDD3_SETOFF 6 DEFAULT_VOLT 7 www.ti.com SPARE_SETOFF SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 VIO_SETOFF Field Name Description DEFAULT_VOLT When 1, default voltages (registers value after switch-on) will be used to turned-on supplies during SLEEP to ACTIVE state transition.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Table 69. EN1_SMPS_ASS_REG Address Offset 0x46 Physical Address Instance Description Configuration Register setting the SMPS Supplies driven by the multiplexed SCLSR_EN1 signal.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com Table 70. EN2_LDO_ASS_REG Address Offset 0x47 Physical Address Instance Description Configuration Register setting the LDO regulators, driven by the multiplexed SDASR_EN2 signal.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Bits Field Name Description Type Reset 2 VDD2_EN2 When control bit = 1: When SDASR_EN2 is high the supply voltage is programmed though VDD2_OP_REG register, and it can also be programmed off. When SDASR_EN2 is low the supply voltage is programmed though VDD2_SR_REG register, and it can also be programmed off.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com Table 74. INT_STS_REG Address Offset 0x50 Physical Address Instance Type RW 7 6 5 4 3 2 1 0 RTC_ALARM_IT Interrupt status register: The interrupt status bit is set to 1 when the associated interrupt event is detected. Interrupt status bit is cleared by writing 1.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com Bits SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Type Reset 7 Field Name RTC_PERIOD_IT_MS RTC period event interrupt mask. K Description RW 0 6 RTC_ALARM_IT_MS K RTC alarm event interrupt mask. RW 0 5 HOTDIE_IT_MSK Hot die event interrupt mask. RW 0 4 PWRHOLD_IT_MSK PWRHOLD rising edge event interrupt mask.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com Bits Field Name Description Type Reset 7:2 Reserved Reserved bit RW 0 1 GPIO0_F_IT_MSK GPIO_CKSYNC falling edge detection interrupt mask. RW 0 0 GPIO0_R_IT_MSK GPIO_CKSYNC rising edge detection interrupt mask. RW 0 Table 78.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 www.ti.com Table 80. REVISION HISTORY (1) (2) (3) (4) (5) (6) (7) (8) (9) (10) (11) (12) (13) (14) (15) (16) (17) (18) (19) (20) 86 VERSION DATE * 03/2010 NOTES See (1) . A 05/2010 See (2) B 06/2010 See (3) C 06/2010 See (4) D 11/2010 See (5) . . . .
TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103 TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109 www.ti.com SWCS046T – MARCH 2010 – REVISED SEPTEMBER 2013 Table 80. REVISION HISTORY (continued) VERSION DATE T 09/2013 NOTES See (21) (21) SWCS046T: Update (a) Table 34, RTC_Reset_Status_Reg, Changed Reserved bits to 7:1 and changed RESET_STATUS's reset value to 0x0. (b) Table 45, VDD1_OP_REG, Changed SEL Vout to Vout = (SEL[6:0] × 12.5 mV + 0.5625 V) × G.
PACKAGE OPTION ADDENDUM www.ti.
PACKAGE OPTION ADDENDUM www.ti.
PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.
PACKAGE MATERIALS INFORMATION www.ti.com 18-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS659101A1RSLR VQFN RSL 48 2500 330.0 16.4 6.3 6.3 1.1 12.0 16.0 Q2 TPS659102A1RSLR VQFN RSL 48 2500 330.0 16.4 6.3 6.3 1.1 12.0 16.0 Q2 TPS659102A1RSLR VQFN RSL 48 2500 330.0 16.4 6.3 6.3 1.5 12.0 16.
PACKAGE MATERIALS INFORMATION www.ti.com 18-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS659101A1RSLR VQFN RSL 48 2500 367.0 367.0 38.0 TPS659102A1RSLR VQFN RSL 48 2500 367.0 367.0 38.0 TPS659102A1RSLR VQFN RSL 48 2500 367.0 367.0 38.0 TPS659106A1RSLR VQFN RSL 48 2500 367.0 367.0 38.0 TPS659108A1RSLR VQFN RSL 48 2500 367.0 367.0 38.0 TPS659108A1RSLR VQFN RSL 48 2500 367.0 367.
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