Datasheet

TPS7201Q, TPS7225Q, TPS7230Q
TPS7233Q, TPS7248Q, TPS7250Q, TPS72xxY
MICROPOWER LOW-DROPOUT (LDO) VOLTAGE REGULATORS
SLVS102G – MARCH 1995 – REVISED JUNE 2000
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS7230Q electrical characteristics, I
O
= 10 mA, V
I
= 4 V, EN = 0 V, C
O
= 4.7 µF (CSR
†
= 1 Ω), SENSE
shorted to OUT (unless otherwise noted)
PARAMETER
TEST CONDITIONS
‡
T
J
TPS7230Q
UNIT
PARAMETER
TEST
CONDITIONS
‡
T
J
MIN TYP MAX
UNIT
Out
p
ut voltage
V
I
= 4 V, I
O
= 10 mA 25°C 3
V
O
u
tp
u
t
v
oltage
4 V ≤ V
I
≤ 10 V, 5 mA ≤ I
O
≤ 250 mA –40°C to 125°C 2.94 3.06
V
I
O
= 100 mA
V
I
= 2 97 V
25°C 145 185
Dropout voltage
I
O
=
100
mA
,
V
I
=
2
.
97
V
–40°C to 125°C 270
mV
D
ropou
t
vo
lt
age
I
O
= 250 mA
V
I
= 2 97 V
25°C 390 502
mV
I
O
=
250
mA
,
V
I
=
2
.
97
V
–40°C to 125°C 900
Pass element series resistance
(2.97 V – V
O
)/I
O
, V
I
= 2.97 V,
25°C 1.56 2.01
Ω
Pass
-
element
series
resistance
(
O
)
O
,
I
O
= 250 mA
I
,
–40°C to 125°C 3.6
Ω
In
p
ut regulation
V
I
=4Vto10V
50 µA ≤ I
O
≤ 250 mA
25°C 9 27
mV
Inp
u
t
reg
u
lation
V
I
=
4
V
to
10
V
,
50
µ
A
≤
I
O
≤
250
mA
–40°C to 125°C 33
mV
I
O
=5mAto250mA
4V≤ V
I
≤ 10 V
25°C 34 45
Out
p
ut regulation
I
O
=
5
mA
to
250
mA
,
4
V
≤
V
I
≤
10
V
–40°C to 125°C 74
mV
O
u
tp
u
t
reg
u
lation
I
O
=50µA to 250 mA
4V≤ V
I
≤ 10 V
25°C 42 60
mV
I
O
=
50
µ
A
to
250
mA
,
4
V
≤
V
I
≤
10
V
–40°C to 125°C 98
I
O
=50µA
25°C 45 56
Ri
pp
le rejection
f = 120 Hz
I
O
=
50
µ
A
–40°C to 125°C 44
dB
Ripple
rejection
f
=
120
H
z
I
O
= 250 mA
25°C 40 45
dB
I
O
=
250
mA
–40°C to 125°C 38
Output noise spectral density f = 120 Hz 25°C 2 µV/√Hz
10 H ≤ f ≤ 100 kH
C
O
= 4.7 µF
25°C 256
Output noise voltage
10 Hz ≤ f ≤ 100 kHz,
CSR
†
=
1 Ω
C
O
= 10 µF
25°C 206
µVrms
CSR
†
=
1
Ω
C
O
= 100 µF
25°C 132
PG trip-threshold voltage
V
O
voltage decreasing from above V
PG
–40°C to 125°C
0.95 ×
V
O(nom)
V
PG hysteresis voltage
25°C 50 mV
PG out
p
ut low voltage
I
PG
=12mA
V
I
= 2 55 V
25°C 0.25 0.44
V
PG
output
low
voltage
I
PG
=
1
.
2
mA
,
V
I
=
2
.
55
V
–40°C to 125°C 0.44
V
†
CSR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance
to C
O
.
‡
Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; thermal effects must
be taken into account separately.