Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - LDO voltage regulator Positive, fixed SOT 223 6

DCQ PACKAGE

RESET/FB

OUT

GND

ENABLE

SOT223-5

(TOP VIEW)

OUT

GND

ENABLE

D PACKAGE

(TOP VIEW)

NC − No internal connection

KTT PACKAGE

(TOP VIEW)

2 3 4 5

ENABLE

GND

OUT

DDPAK

RESET/FB

TPS72501

TPS72515, TPS72516

TPS72518, TPS72525

www.ti.com

SLVS341E –MAY 2002–REVISED JUNE 2010

LOW INPUT VOLTAGE, 1-A LOW-DROPOUT LINEAR REGULATORS WITH SUPERVISOR

Check for Samples: TPS72501, TPS72515, TPS72516, TPS72518, TPS72525

FEATURES

DESCRIPTION

• 1-A Output Current

The TPS725xx family of 1-A low-dropout (LDO) linear

regulators has fixed voltage options available that are

• Available in 1.5-V, 1.6-V, 1.8-V, 2.5-V

commonly used to power the latest DSPs, FPGAs,

Fixed-Output and Adjustable Versions

and microcontrollers. An adjustable option ranging

(1.2-V to 5.5-V)

from 1.22 V to 5.5 V is also available. The integrated

• Input Voltage Down to 1.8 V

supervisory circuitry provides an active low RESET

• Low 170-mV Dropout Voltage at 1 A

signal when the output falls out of regulation. The no

(TPS72525)

capacitor/any capacitor feature allows the customer

to tailor output transient performance as needed.

• Stable With Any Type/Value Output Capacitor

Therefore, compared to other regulators capable of

• Integrated Supervisor (SVS) With 50-ms

providing the same output current, this family of

RESET Delay Time

regulators can provide a stand-alone power supply

• Low 210-µA Ground Current at Full Load

solution or a post regulator for a switch mode power

supply.

(TPS72525)

• Less than 1-µA Standby Current

These regulators are ideal for higher current

applications. The family operates over a wide range

• ±2% Output Voltage Tolerance Over Line,

of input voltages (1.8 V to 6 V) and has very low

Load, and Temperature (-40°C to 125°C)

dropout (170 mV at 1-A).

• Integrated UVLO

Ground current is typically 210 µA at full load and

• Thermal and Overcurrent Protection

drops to less than 80 µA at no load. Standby current

• 5-Lead SOT223-5 or DDPAK and 8-Pin SOP

is less than 1 µA.

(TPS72501 only) Surface Mount Package

Each regulator option is available in either a

SOT223-5, D (TPS72501 only), or DDPAK package.

APPLICATIONS

With a low input voltage and properly heatsinked

• PCI Cards

package, the regulator dissipates more power and

• Modem Banks

achieves higher efficiencies than similar regulators

• Telecom Boards requiring 2.5 V or more minimum input voltage and

higher quiescent currents. These features make it a

• DSP, FPGA, and Microprocessor Power

viable power supply solution for portable,

Supplies

battery-powered equipment.

• Portable, Battery-Powered Applications

NOTE: TPS72501 replaces RESET with FB. Tab is GND for the DCK and KTT packages.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (29 pages)

PAGE 1
TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E – MAY 2002 – REVISED JUNE 2010 LOW INPUT VOLTAGE, 1-A LOW-DROPOUT LINEAR REGULATORS WITH SUPERVISOR Check for Samples: TPS72501, TPS72515, TPS72516, TPS72518, TPS72525 FEATURES DESCRIPTION • • The TPS725xx family of 1-A low-dropout (LDO) linear regulators has fixed voltage options available that are commonly used to power the latest DSPs, FPGAs, and microcontrollers. An adjustable option ranging from 1.22 V to 5.5 V is also available.
PAGE 2
TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E – MAY 2002 – REVISED JUNE 2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E – MAY 2002 – REVISED JUNE 2010 PACKAGE DISSIPATION RATINGS PACKAGE BOARD RqJC RqJA DDPAK High K (1) 2 °C/W 23 °C/W SOT223 Low K (2) 15 °C/W 53 °C/W 39.4 °C/W 55 °C/W D-8 (1) (2) High K (1) The JEDEC high-K (2s2p) board design used to derive this data was a 3-inch x 3-inch (7.5-cm x 7.5-cm), multilayer board with 1 ounce internal power and ground planes and 2 ounce copper traces on top and bottom of the board.
PAGE 4
TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E – MAY 2002 – REVISED JUNE 2010 www.ti.com ELECTRICAL CHARACTERISTICS (continued) over recommended operating free-air temperature range VI = VO(typ) + 1 V, IO= 1 mA, EN = IN, Co = 1 µF, Ci = 1 µF (unless otherwise noted) PARAMETER TEST CONDITIONS TPS72525 VDO (4) TJ = 25°C 170 (5) IO = 1 A TJ = 25°C 210 IO = 1 A Minimum input voltage for valid RESET 1.3 Trip threshold voltage 90 25 Output low voltage (at 700 µA) 4 93 96 50 -0.
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TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E – MAY 2002 – REVISED JUNE 2010 FUNCTIONAL BLOCK DIAGRAM—ADJUSTABLE VERSION TPS72501 IN OUT EN Current Limit/Thermal Protection 1.220 Vref FB GND FUNCTIONAL BLOCK DIAGRAM—FIXED VERSION TPS72515/16/18/25 IN OUT EN Current Limit/Thermal Protection 1.220 Vref GND Deglitch and Delay RESET 0.93 × Vref TERMINAL FUNCTIONS TERMINAL NAME NO. D NO.
PAGE 6
TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E – MAY 2002 – REVISED JUNE 2010 www.ti.com RESET TIMING DIAGRAM IN VRES (see Note A) VRES t OUT VIT+(see Note B) VIT+(see Note B) Threshold Voltage VIT– (see Note B) ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ t RESET Output Output Undefined VIT– (see Note B) 50 ms Delay 50 ms Delay Output Undefined t NOTES:A. VRES is the minimum input voltage for a valid RESET.
PAGE 7
TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E – MAY 2002 – REVISED JUNE 2010 TYPICAL CHARACTERISTICS (continued) TPS72518 GROUND CURRENT vs OUTPUT CURRENT TPS72525 DC DROPOUT VOLTAGE vs OUTPUT CURRENT 300 200 150 125 100 75 50 25 VO = 1.7 V Co = 1 µF TJ = 125°C 200 TJ = 25°C 150 100 TJ = −40°C 50 250 150 100 50 0 0.1 1 10 100 0 1000 IO − Output Current − mA 0.2 0.4 0.6 0.
PAGE 8
TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E – MAY 2002 – REVISED JUNE 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) TPS72518 OUTPUT VOLTAGE, ENABLE VOLTAGE vs TIME (START-UP) 1 0.5 0 0 5 10 15 20 25 30 35 40 t − Time − µs 45 50 1 0 2 1.5 1 0.5 0 0 20 40 60 80 100 120 140 160 180 200 t − Time − µs 4 3 VI 2 1 0 VO 0 100 200 300 400 500 600 700 800 900 1000 t − Time − µs Figure 12.
PAGE 9
TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E – MAY 2002 – REVISED JUNE 2010 APPLICATION INFORMATION The TPS725xx family of low-dropout (LDO) regulators has numerous features that make it applicable to a wide range of applications. The family operates with very low input voltage (≥1.8 V) and low dropout voltage (typically 200 mV at full load), making it an efficient stand-alone power supply or post regulator for battery or switch mode power supplies.
PAGE 10
TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E – MAY 2002 – REVISED JUNE 2010 www.ti.com TPS725xx VI IN VO OUT 1 mF 10 kW EN CO RESET GND Figure 19. TPS72501 Fixed Output Typical Application Diagram Table 1. Output Voltage Programming Guide (Standard 1% Resistor Values) PROGRAM VOLTAGE R1 (kΩ) R2 (kΩ) ACTUAL VOLTAGE 1.8 V 56.2 118 1.801 2.5 V 127 121 2.5 3.3 V 196 115 3.299 3.6 V 205 105 3.
PAGE 11
TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E – MAY 2002 – REVISED JUNE 2010 THERMAL INFORMATION The amount of heat that an LDO linear regulator generates is directly proportional to the amount of power it dissipates during operation. All integrated circuits have a maximum allowable junction temperature (TJmax) above which normal operation is not assured.
PAGE 12
TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E – MAY 2002 – REVISED JUNE 2010 www.ti.com Even if no external black body radiator type heatsink is attached to the package, the board on which the regulator is mounted provides some heatsinking through the pin solder connections. Some packages, like the DDPAK and SOT223 packages, use a copper plane underneath the package or the circuit board's ground plane for additional heatsinking to improve their thermal performance.
PAGE 13
TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E – MAY 2002 – REVISED JUNE 2010 40 Rθ JA − Thermal Resistance − ° C/W No Air Flow 35 150 LFM 30 250 LFM 25 20 15 0.1 1 10 Copper Heatsink Area − cm2 100 Figure 21. DDPAK Thermal Resistance vs Copper Heatsink Area 2 oz. Copper Solder Pad with 25 Thermal Vias 1 oz. Copper Power Plane 1 oz. Copper Ground Plane Thermal Vias, 0.3 mm Diameter, 1,5 mm Pitch Figure 22.
PAGE 14
TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E – MAY 2002 – REVISED JUNE 2010 www.ti.com TJM − Maximum Junction Temperature − 125 °C 5 PD − Maximum Power Dissipation − W TA = 55°C 4 250 LFM 150 LFM 3 No Air Flow 2 1 0.1 1 10 Copper Heatsink Area − cm2 100 Figure 23. Maximum Power Dissipation vs Copper Heatsink Area SOT223 Power Dissipation The SOT223 package provides an effective means of managing power dissipation in surface mount applications.
PAGE 15
TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 www.ti.com SLVS341E – MAY 2002 – REVISED JUNE 2010 Rθ JA − Thermal Resistance − ° C/W 180 No Air Flow 160 140 120 100 80 60 40 20 0 0.1 1 PCB Copper Area − in2 10 Figure 24. SOT223 Thermal Resistance vs PCB AREA From the data in Figure 24 and rearranging Equation 6, the maximum power dissipation for a different ground plane area and a specific ambient temperature can be computed (as shown in Figure 25).
PAGE 16
TPS72501 TPS72515, TPS72516 TPS72518, TPS72525 SLVS341E – MAY 2002 – REVISED JUNE 2010 www.ti.com REVISION HISTORY NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision D (March 2004) to Revision E Page • Deleted Figure 14, Output Impedance vs Frequency ........................................................................................................... 8 • Updated Figure 18 ..........................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com (4) 10-Jun-2014 There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.
PAGE 21
PACKAGE MATERIALS INFORMATION www.ti.com 4-Jun-2014 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) TPS72501DCQR SOT-223 DCQ 6 2500 330.0 12.4 TPS72501DR SOIC D 8 2500 330.0 TPS72501DT SOIC D 8 250 180.0 TPS72501KTTR DDPAK/ TO-263 KTT 5 500 TPS72501KTTT DDPAK/ TO-263 KTT 5 TPS72515DCQR SOT-223 DCQ TPS72515KTTR DDPAK/ TO-263 TPS72515KTTT 7.1 7.
PAGE 22
PACKAGE MATERIALS INFORMATION www.ti.com 4-Jun-2014 Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) TPS72525DCQR SOT-223 DCQ 6 2500 330.0 12.4 TPS72525KTTR DDPAK/ TO-263 KTT 5 500 330.0 24.4 TPS72525KTTT DDPAK/ TO-263 KTT 5 50 330.0 24.4 10.6 P1 (mm) W Pin1 (mm) Quadrant 7.1 7.45 1.88 8.0 12.0 Q3 10.6 15.6 4.9 16.0 24.0 Q2 15.6 4.9 16.0 24.
PAGE 23
PACKAGE MATERIALS INFORMATION www.ti.com 4-Jun-2014 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS72518KTTT DDPAK/TO-263 KTT 5 50 367.0 367.0 45.0 TPS72525DCQR SOT-223 DCQ 6 2500 358.0 335.0 35.0 TPS72525KTTR DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 TPS72525KTTT DDPAK/TO-263 KTT 5 50 367.0 367.0 45.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.