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User's Guide

SLVU323–February 2010

TPS727xxYFF EVM

This User’s Guide describes the characteristics, operation, and use of the TPS727xxYFFEVM-407. This

EVM demonstrates the Texas Instruments TPS727xx, a Low Drop Out (LDO) linear regulator in a chip

scale (WCSP-4) package that is capable of 200mA of output current. This user’s guide includes setup

instructions, a schematic diagram, thermal guidelines, a bill of materials (BOM), and PCB layout drawings

for the evaluation module.

Contents

1 Introduction .................................................................................................................. 1

2 Setup ......................................................................................................................... 2

2.1 Input / Output Connector Descriptions .......................................................................... 2

3 Operation ..................................................................................................................... 2

3.1 Operation ............................................................................................................ 2

4 Thermal Guidelines ......................................................................................................... 2

4.1 Thermal Considerations ........................................................................................... 2

5 Board Layout ................................................................................................................ 4

5.1 Layout ............................................................................................................... 4

6 Schematic and Bill of Materials ........................................................................................... 6

6.1 Schematic ........................................................................................................... 6

6.2 Bill of Materials ..................................................................................................... 6

List of Figures

1 Top Layer Assembly........................................................................................................ 4

2 Top Layer Routing .......................................................................................................... 4

3 Bottom Layer Routing ...................................................................................................... 5

4 Bottom Layer Assembly.................................................................................................... 5

5 TPS727xxYFFEVM-407 Schematic ..................................................................................... 6

List of Tables

1 HPA407A Bill of Materials ................................................................................................. 6

1 Introduction

The TPS727xxYFFEVM-407 evaluation module (EVM) helps designers evaluate the operation and

performance of the TPS727xx LDO in the WCSP-4 package. The TPS727xx is a 200mA, ultra-low Iq, fast

transient response, linear regulator.

SLVU323–February 2010 TPS727xxYFF EVM

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Summary of content (8 pages)

PAGE 1
User's Guide SLVU323 – February 2010 TPS727xxYFF EVM This User’s Guide describes the characteristics, operation, and use of the TPS727xxYFFEVM-407. This EVM demonstrates the Texas Instruments TPS727xx, a Low Drop Out (LDO) linear regulator in a chip scale (WCSP-4) package that is capable of 200mA of output current. This user’s guide includes setup instructions, a schematic diagram, thermal guidelines, a bill of materials (BOM), and PCB layout drawings for the evaluation module.
PAGE 2
Setup 2 www.ti.com Setup This chapter describes the jumpers and connectors on the EVM as well as how to properly connect, setup, and use the TPS727xxEVM. 2.1 2.1.1 Input / Output Connector Descriptions J1 – VIN This is the positive input supply voltage. The leads to the input supply should be twisted and kept as short as possible to minimize EMI transmission. Additional bulk capacitance should be added between J1 and J2 if the supply leads are greater than six inches.
PAGE 3
Thermal Guidelines www.ti.com The measured thermal resistance from junction to ambient for the TPS727xxEVM has a typically value of 224˚C/W. The recommended maximum operating junction temperature specified in the datasheet for the TPS727xx family is 125°C. With these two pieces of information, the maximum power dissipation can be found by using Equation 1. Example Calculation: For example, what is the maximum input voltage that can be applied to a TPS727xx with a 1.
PAGE 4
Board Layout 5 www.ti.com Board Layout This chapter provides the TPS727xxYFFEVM-407 board layout and illustrations. 5.1 Layout Figure 1. Top Layer Assembly Figure 2.
PAGE 5
Board Layout www.ti.com Figure 3. Bottom Layer Routing Figure 4.
PAGE 6
Schematic and Bill of Materials 6 www.ti.com Schematic and Bill of Materials This chapter provides the TPS727xxYFFEVM-407 schematic and bill of materials. 6.1 Schematic Figure 5. TPS727xxYFFEVM-407 Schematic 6.2 Bill of Materials Table 1. HPA407A Bill of Materials -001 -002 -003 RefDes Value Description Size Part Number MFR 2 2 2 C1, C2 1.0 µF Capacitor, Ceramic, 6.3V, X5R, 20%. 0603 STD Any 4 4 4 J1–J4 PEC02SAAN Header, 2-pin, 100mil spacing 0.
PAGE 7
Evaluation Board/Kit Important Notice Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards.
PAGE 8
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.