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User's Guide

SLVU325 – August 2009

TPS727xxDSEEVM-406

This User’s Guide describes the characteristics, operation, and use of the TPS727xxDSEEVM-406. This

EVM demonstrates the Texas Instruments TPS727xx, a Low Drop Out (LDO) linear regulator in a 1,5 ×

1,5mm SON-6 package that is capable of 200mA of output current. This user’s guide includes setup

instructions, a schematic diagram, thermal guidelines, a bill of materials (BOM), and PCB layout drawings

for the evaluation module.

Contents

1 Introduction ................................................................................................................... 2

2 Setup .......................................................................................................................... 2

2.1 Input / Output Connector Descriptions ........................................................................... 2

3 Operation ..................................................................................................................... 2

3.1 Operation ............................................................................................................ 2

4 Thermal Guidelines .......................................................................................................... 3

4.1 Thermal Considerations ............................................................................................ 3

5 Board Layout ................................................................................................................. 4

5.1 Layout ................................................................................................................ 4

6 Schematic and Bill of Materials ............................................................................................ 6

6.1 Schematic ............................................................................................................ 6

6.2 Bill of Materials ...................................................................................................... 7

List of Figures

1 Top Layer Assembly ......................................................................................................... 4

2 Top Layer Routing ........................................................................................................... 4

3 Bottom Layer Routing ....................................................................................................... 5

4 Bottom Layer Assembly ..................................................................................................... 5

5 TPS727xxDSEEVM-406 Schematic ...................................................................................... 6

List of Tables

1 TPS727xxDSEEVM-406 BOM ............................................................................................ 7

SLVU325 – August 2009 TPS727xxDSEEVM-406 1

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Summary of content (9 pages)

PAGE 1
User's Guide SLVU325 – August 2009 TPS727xxDSEEVM-406 This User’s Guide describes the characteristics, operation, and use of the TPS727xxDSEEVM-406. This EVM demonstrates the Texas Instruments TPS727xx, a Low Drop Out (LDO) linear regulator in a 1,5 × 1,5mm SON-6 package that is capable of 200mA of output current. This user’s guide includes setup instructions, a schematic diagram, thermal guidelines, a bill of materials (BOM), and PCB layout drawings for the evaluation module.
PAGE 2
Introduction 1 www.ti.com Introduction The TPS727xxDSEEVM-406 evaluation module (EVM) helps designers evaluate the operation and performance of the TPS727xx LDO in the 1,5 × 1,5mm SON-6 package. The TPS727xx is a 200mA, ultra-low Iq, fast transient response, linear regulator. 2 Setup This chapter describes the jumpers and connectors on the EVM as well as how to properly connect, setup, and use the TPS727xxEVM. 2.1 2.1.
PAGE 3
Thermal Guidelines www.ti.com 4 Thermal Guidelines This chapter provides guidelines for the thermal management of the TPS727xxDSEEVM-406 board. 4.1 Thermal Considerations Thermal management is a key component of design of any power converter and is especially important when the power dissipation in the LDO is high.
PAGE 4
Board Layout 5 www.ti.com Board Layout This chapter provides the TPS727xxDSEEVM-406 board layout and illustrations. 5.1 Layout Figure 1. Top Layer Assembly Figure 2.
PAGE 5
Board Layout www.ti.com Figure 3. Bottom Layer Routing Figure 4.
PAGE 6
Schematic and Bill of Materials 6 www.ti.com Schematic and Bill of Materials This chapter provides the TPS727xxDSEEVM-406 schematic and bill of materials. 6.1 Schematic Figure 5.
PAGE 7
Schematic and Bill of Materials www.ti.com 6.2 Bill of Materials Table 1. TPS727xxDSEEVM-406 BOM -001 -002 -003 RefDes Value 2 2 2 Description Size Part Number MFR C1, C2 1.0 µF Capacitor, Ceramic, 6.3V, X5R, 20%.
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EVALUATION BOARD/KIT IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards.
PAGE 9
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.