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DROPOUT VOLTAGE
BOARD LAYOUT RECOMMENDATION TO
TRANSIENT RESPONSE
INTERNAL CURRENT LIMIT
SHUTDOWN
dVńdt +
V
OUT
C
OUT
80kW ø R
LOAD
(4)
TPS73101-EP , , TPS73115-EP
TPS731125-EP , TPS73118-EP , TPS73125-EP , TPS73130-EP
TPS73132-EP , TPS73133-EP , TPS73150-EP
SGLS347A – JUNE 2006 – REVISED SEPTEMBER 2007
This noise reduction effect is shown as RMS Noise
Voltage vs C
NR
in the Typical Characteristics section.
The TPS731xx uses an NMOS pass transistor to
The TPS73101 adjustable version does not have the achieve extremely low dropout. When (V
IN
– V
OUT
) is
noise-reduction pin available. However, connecting a less than the dropout voltage (V
DO
), the NMOS pass
feedback capacitor, C
FB
, from the output to the FB pin device is in its linear region of operation and the
reduces output noise and improves load transient input-to-output resistance is the R
DS-ON
of the NMOS
performance. pass element.
The TPS731xx uses an internal charge pump to For large step changes in load current, the TPS731xx
develop an internal supply voltage sufficient to drive requires a larger voltage drop across it to avoid
the gate of the NMOS pass element above V
OUT
. The degraded transient response. The boundary of this
charge pump generates ~250 μ V of switching noise transient dropout region is approximately twice the dc
at ~4 MHz; however, charge-pump noise contribution dropout. Values of V
IN
– V
OUT
above this line ensure
is negligible at the output of the regulator for most normal transient response.
values of I
OUT
and C
OUT
.
Operating in the transient dropout region can cause
an increase in recovery time. The time required to
recover from a load transient is a function of the
IMPROVE PSRR AND NOISE PERFORMANCE
magnitude of the change in load current rate, the rate
of change in load current, and the available
To improve ac performance such as PSRR, output
headroom (V
IN
to V
OUT
voltage drop). Under
noise, and transient response, it is recommended that
worst-case conditions (full-scale instantaneous load
the PCB be designed with separate ground planes for
change with (V
IN
– V
OUT
) close to dc dropout levels),
V
IN
and V
OUT
, with each ground plane connected only
the TPS731xx can take a couple of hundred
at the GND pin of the device. In addition, the ground
microseconds to return to the specified regulation
connection for the bypass capacitor should connect
accuracy.
directly to the GND pin of the device.
The low open-loop output impedance provided by the
The TPS731xx internal current limit helps protect the
NMOS pass element in a voltage follower
regulator during fault conditions. Foldback current
configuration allows operation without an output
helps to protect the regulator from damage during
capacitor for many applications. As with any
output short-circuit conditions by reducing current
regulator, the addition of a capacitor (nominal value
limit when V
OUT
drops below 0.5 V. See Figure 12 in
1 μ F) from the output pin to ground reduces
the Typical Characteristics section for a graph of
undershoot magnitude but increases duration. In the
I
OUT
vs V
OUT
.
adjustable version, the addition of a capacitor, C
FB
,
from the output to the adjust pin also improves the
transient response.
The Enable pin is active high and is compatible with
The TPS731xx does not have active pulldown when
standard TTL-CMOS levels. V
EN
below 0.5 V (max)
the output is overvoltage. This allows applications
turns the regulator off and drops the ground pin
that connect higher voltage sources, such as
current to approximately 10 nA. When shutdown
alternate power supplies, to the output. This also
capability is not required, the Enable pin can be
results in an output overshoot of several percent if the
connected to V
IN
. When a pullup resistor is used and
load current quickly drops to zero when a capacitor is
operation down to 1.8 V is required, use pullup
connected to the output. The duration of overshoot
resistor values below 50 k Ω .
can be reduced by adding a load resistor. The
overshoot decays at a rate determined by output
capacitor C
OUT
and the internal/external load
resistance. The rate of decay is given by:
(Fixed voltage version)
14 Submit Documentation Feedback Copyright © 2006 – 2007, Texas Instruments Incorporated
Product Folder Link(s): TPS73101-EP TPS73115-EP TPS731125-EP TPS73118-EP TPS73125-EP TPS73130-EP
TPS73132-EP TPS73133-EP TPS73150-EP