Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - LDO voltage regulator Positivbe, adjustable VSON 10 (3x3)

0.5V/div V

OUT

1V/div

Time(1ms/div)

=2.2nF

=1nF

=0nF

1.2V

TPS74801

GND

IN PG

BIAS

OUT

BIAS

OUT

TPS74801

www.ti.com

SBVS074J –JANUARY 2007– REVISED JANUARY 2012

1.5A Low-Dropout Linear Regulator with Programmable Soft-Start

Check for Samples: TPS74801

FEATURES

• V

OUT

Range: 0.8V to 3.6V

DESCRIPTION

• Ultralow V

Range: 0.8V to 5.5V

The TPS74801 low-dropout (LDO) linear regulator

• V

BIAS

Range 2.7V to 5.5V

provides an easy-to-use robust power management

solution for a wide variety of applications.

• Low Dropout: 60mV typ at 1.5A, V

BIAS

= 5V

User-programmable soft-start minimizes stress on the

• Power Good (PG) Output Allows Supply

input power source by reducing capacitive inrush

Monitoring or Provides a Sequencing Signal

current on start-up. The soft-start is monotonic and

for Other Supplies

well-suited for powering many different types of

processors and ASICs. The enable input and power

• 2% Accuracy Over Line/Load/Temperature

good output allow easy sequencing with external

• Programmable Soft-Start Provides Linear

regulators. This complete flexibility permits the user to

Voltage Startup

configure a solution that meets the sequencing

• V

BIAS

Permits Low V

Operation with Good

requirements of FPGAs, DSPs, and other

Transient Response

applications with special start-up requirements.

• Stable with Any Output Capacitor ≥ 2.2μF

A precision reference and error amplifier deliver 2%

• Available in a Small 3mm x 3mm x 1mm

accuracy over load, line, temperature, and process.

The device is stable with any type of capacitor

SON-10 and 5 x 5 QFN-20 Packages

greater than or equal to 2.2μF, and is fully specified

from –40°C to +125°C. The TPS74801 is offered in a

APPLICATIONS

small 3mm × 3mm SON-10 package, yielding a highly

• FPGA Applications

compact, total solution size. It is also available in a 5

• DSP Core and I/O Voltages x 5 QFN-20 for compatibility with the TPS74401.

• Post-Regulation Applications

• Applications with Special Start-Up Time or

Sequencing Requirements

• Hot-Swap and Inrush Controls

Figure 2. Turn-On Response

Figure 1. Typical Application Circuit (Adjustable)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (28 pages)

PAGE 1
TPS74801 SBVS074J – JANUARY 2007 – REVISED JANUARY 2012 www.ti.com 1.5A Low-Dropout Linear Regulator with Programmable Soft-Start Check for Samples: TPS74801 FEATURES 1 • • • • • 2 • • • • • VOUT Range: 0.8V to 3.6V Ultralow VIN Range: 0.8V to 5.5V VBIAS Range 2.7V to 5.5V Low Dropout: 60mV typ at 1.
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TPS74801 SBVS074J – JANUARY 2007 – REVISED JANUARY 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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TPS74801 SBVS074J – JANUARY 2007 – REVISED JANUARY 2012 www.ti.com THERMAL INFORMATION TPS74801 (2) THERMAL METRIC (1) Junction-to-ambient thermal resistance (3) θJA (4) RGW DRC 20 PINS 10 PINS 30.5 41.5 θJCtop Junction-to-case (top) thermal resistance 27.6 78 θJB Junction-to-board thermal resistance (5) N/A N/A ψJT Junction-to-top characterization parameter (6) 0.37 0.7 ψJB Junction-to-board characterization parameter (7) 10.6 11.
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TPS74801 SBVS074J – JANUARY 2007 – REVISED JANUARY 2012 www.ti.com ELECTRICAL CHARACTERISTICS At VEN = 1.1V, VIN = VOUT + 0.3V, CBIAS = 0.1μF, CIN = COUT = 10μF, CNR = 1nF, IOUT = 50mA, VBIAS = 5.0V, and TJ = –40°C to +125°C, unless otherwise noted. Typical values are at TJ = +25°C. TPS74801 PARAMETER TEST CONDITIONS MIN UNIT VIN Input voltage range VOUT + VDO 5.5 V 2.7 5.5 V 0.804 V 3.6 V 2 % VOUT TJ = +25°C 0.796 Output voltage range VIN = 5V, IOUT = 1.5A VREF Accuracy (1) 2.
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TPS74801 SBVS074J – JANUARY 2007 – REVISED JANUARY 2012 www.ti.com BLOCK DIAGRAM IN Current Limit BIAS UVLO OUT Thermal Limit 0.44mA VOUT R1 SS CSS Soft-Start Discharge 0.8V Reference FB PG EN Hysteresis and Deglitch R2 0.9 ´ VREF GND Table 1. Standard 1% Resistor Values for Programming the Output Voltage (1) (1) R1 (kΩ) R2 (kΩ) VOUT (V) Short Open 0.8 0.619 4.99 0.9 1.13 4.53 1.0 1.37 4.42 1.05 1.87 4.99 1.1 2.49 4.99 1.2 4.12 4.75 1.5 3.57 2.87 1.8 3.57 1.
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TPS74801 SBVS074J – JANUARY 2007 – REVISED JANUARY 2012 www.ti.com DEVICE INFORMATION NC NC NC OUT 4 3 2 1 IN 6 20 OUT IN 7 19 OUT IN 8 18 OUT PG 9 17 NC BIAS 10 16 FB 13 14 15 NC NC SS TPS74801 GND 12 EN 5 8 FB 7 SS 6 GND GND Thermal Pad 11 PG 3 BIAS 4 IN 10 OUT 9 OUT IN 2 EN IN 1 RGW PACKAGE 5 x 5 QFN (TOP VIEW) 5 DRC PACKAGE 3mm x 3mm SON (TOP VIEW) PIN DESCRIPTIONS 6 NAME DRC (SON) RGW (QFN) IN 1, 2 5-8 DESCRIPTION Input to the device.
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TPS74801 SBVS074J – JANUARY 2007 – REVISED JANUARY 2012 www.ti.com TYPICAL CHARACTERISTICS At TJ = +25°C, VIN = VOUT(TYP) + 0.3V, VBIAS = 5V, IOUT = 50mA, VEN = VIN, CIN = 1μF, CBIAS = 4.7μF, and COUT = 10μF, unless otherwise noted. VBIAS LINE REGULATION 0.5 0.15 0.4 0.3 0.10 Change in VOUT (%) Change in VOUT (%) VIN LINE REGULATION 0.20 -40°C 0.05 0 +25°C +125°C -0.05 0.2 -40°C 0.1 0 -0.1 +125°C +25°C -0.2 -0.01 -0.3 -0.15 -0.4 -0.20 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.
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TPS74801 SBVS074J – JANUARY 2007 – REVISED JANUARY 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) At TJ = +25°C, VIN = VOUT(TYP) + 0.3V, VBIAS = 5V, IOUT = 50mA, VEN = VIN, CIN = 1μF, CBIAS = 4.7μF, and COUT = 10μF, unless otherwise noted. VIN DROPOUT VOLTAGE vs (VBIAS – VOUT) AND TEMPERATURE (TJ) VBIAS DROPOUT VOLTAGE vs IOUT AND TEMPERATURE (TJ) 200 2200 IOUT = 0.
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TPS74801 SBVS074J – JANUARY 2007 – REVISED JANUARY 2012 www.ti.com TYPICAL CHARACTERISTICS (continued) At TJ = +25°C, VIN = VOUT(TYP) + 0.3V, VBIAS = 5V, IOUT = 50mA, VEN = VIN, CIN = 1μF, CBIAS = 4.7μF, and COUT = 10μF, unless otherwise noted. BIAS PIN CURRENT vs IOUT AND TEMPERATURE (TJ) BIAS PIN CURRENT vs VBIAS AND TEMPERATURE (TJ) 2.0 2.0 1.8 1.8 +125°C 1.6 1.6 1.4 1.4 IBIAS (mA) IBIAS (mA) +125°C 1.2 1.0 0.8 +25°C 1.0 0.8 +25°C -40°C 0.6 1.2 0.6 -40°C 0.4 0.4 0.2 0.
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TPS74801 SBVS074J – JANUARY 2007 – REVISED JANUARY 2012 www.ti.com TYPICAL CHARACTERISTICS At TJ = +25°C, VIN = VOUT(TYP) + 0.3V, VBIAS = 5V, IOUT = 1A, VEN = VIN = 1.8V, VOUT = 1.5V, CIN = 1μF, CBIAS = 4.7μF, and COUT = 10μF, unless otherwise noted. VBIAS LINE TRANSIENT VIN LINE TRANSIENT CSS = 1nF COUT = 10mF (Ceramic) COUT = 10mF (Ceramic) 100mV/div 100mV/div COUT = 2.2mF (Ceramic) 100mV/div CSS = 1nF 3.8V 5.0V 1V/div 1V/div 1V/ms 3.3V 1V/ms 1.8V Time (50ms/div) Time (50ms/div) Figure 20.
PAGE 11
TPS74801 SBVS074J – JANUARY 2007 – REVISED JANUARY 2012 www.ti.com APPLICATION INFORMATION The TPS74801 belongs to a family of low dropout regulators that feature soft-start capability. These regulators use a low current bias input to power all internal control circuitry, allowing the NMOS pass transistor to regulate very low input and output voltages. The use of an NMOS-pass FET offers several critical advantages for many applications.
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TPS74801 SBVS074J – JANUARY 2007 – REVISED JANUARY 2012 www.ti.com DROPOUT VOLTAGE The TPS74801 offers very low dropout performance, making it well-suited for high-current, low VIN/low VOUT applications. The low dropout of the TPS74801 allows the device to be used in place of a dc/dc converter and still achieve good efficiency. This provides designers with the power architecture for their application to achieve the smallest, simplest, and lowest cost solution.
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TPS74801 SBVS074J – JANUARY 2007 – REVISED JANUARY 2012 www.ti.com rapidly pulse the enable pin and still require the device to soft-start from ground. CSS must be low-leakage; X7R, X5R, or C0G dielectric materials are preferred. Refer to Table 2 for suggested soft-start capacitor values. SEQUENCING REQUIREMENTS VIN, VBIAS, and VEN can be sequenced in any order without causing damage to the device. However, for the soft-start function to work as intended, certain sequencing rules must be applied.
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TPS74801 SBVS074J – JANUARY 2007 – REVISED JANUARY 2012 www.ti.com INTERNAL CURRENT LIMIT The TPS74801 features a factory-trimmed, accurate current limit that is flat over temperature and supply voltage. The current limit allows the device to supply surges of up to 2A and maintain regulation. The current limit responds in approximately 10μs to reduce the current during a short-circuit fault. The internal current limit protection circuitry of the TPS74801 is designed to protect against overload conditions.
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TPS74801 SBVS074J – JANUARY 2007 – REVISED JANUARY 2012 www.ti.com NOTE: When the device is mounted on an application PCB, it is strongly recommended to use ΨJT and ΨJB, as explained in the Estimating Junction Temperature section. ESTIMATING JUNCTION TEMPERATURE Using the thermal metrics ΨJT and ΨJB, as shown in the Thermal Information table, the junction temperature can be estimated with corresponding formulas (given in Equation 6).
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TPS74801 SBVS074J – JANUARY 2007 – REVISED JANUARY 2012 www.ti.com TT on top of IC TB on PCB surface TB on PCB TT on top of IC 1mm 1mm (a) Example DRC (SON) Package Measurement (b) Example RGW (QFN) Package Measurement Figure 31.
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TPS74801 SBVS074J – JANUARY 2007 – REVISED JANUARY 2012 www.ti.com REVISION HISTORY NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision I (November 2010) to Revision J • Page Changed TJ range in Absolute Maximum Ratings table ....................................................................................................... 2 Changes from Revision H (October, 2010) to Revision I • Page Corrected equation for Table 2 ................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 20-Aug-2013 (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device.
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PACKAGE MATERIALS INFORMATION www.ti.com 19-Aug-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPS74801DRCR Package Package Pins Type Drawing SON DRC 10 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS74801DRCT SON DRC 10 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS74801QRGWRQ1 VQFN RGW 20 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 19-Aug-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS74801DRCR SON DRC 10 3000 367.0 367.0 35.0 TPS74801DRCT SON DRC 10 250 210.0 185.0 35.0 TPS74801QRGWRQ1 VQFN RGW 20 3000 367.0 367.0 35.0 TPS74801RGWR VQFN RGW 20 3000 367.0 367.0 35.0 TPS74801RGWT VQFN RGW 20 250 210.0 185.0 35.0 TPS74801TDRCRQ1 SON DRC 10 3000 367.0 367.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.