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TPS74901

GND

IN PG

BIAS

OUT

BIAS

OUT

1V/div

Time(1ms/div)

C =0 F

C =0.001 F

C =0.0047 F

OUT

1.2V

TPS749xx

www.ti.com

SBVS082G –JUNE 2007–REVISED NOVEMBER 2010

3.0A Low Dropout Linear Regulator with Programmable Soft-Start

Check for Samples: TPS749xx

FEATURES

DESCRIPTION

• V

OUT

Range: 0.8V to 3.6V

The TPS749xx low-dropout (LDO) linear regulator

• Ultralow V

Range: 0.8V to 5.5V

provides an easy-to-use robust power management

• V

BIAS

Range: 2.7V to 5.5V

solution for a wide variety of applications.

• Low Dropout: 120mV (typ) at 3.0A, V

BIAS

= 5V

User-programmable soft-start minimizes stress on the

input power source by reducing capacitive inrush

• Power-Good (PG) Output Allows Supply

current on start-up. The soft-start is monotonic and

Monitoring or Provides a Sequencing Signal

well-suited for powering many different types of

for Other Supplies

processors and ASICs. The enable input and

• 2% Accuracy Over Line/Load/Temperature

power-good output allow easy sequencing with

• Programmable Soft-Start Provides Linear

external regulators. This complete flexibility permits

the user to configure a solution that meets the

Voltage Startup

sequencing requirements of FPGAs, DSPs, and other

• V

BIAS

Permits Low V

Operation with Good

applications with special start-up requirements.

Transient Response

A precision reference and error amplifier deliver 2%

• Stable with Any Output Capacitor ≥ 2.2mF

accuracy over load, line, temperature, and process.

• Available in 5mm × 5mm × 1mm QFN and

The device is stable with any type of capacitor

DDPAK-7 Packages

≥ 2.2mF, and the device is fully specified from –40°C

• Open-Drain Power-Good

to +125°C. The TPS749xx is offered in a small (5mm

× 5mm) QFN package, yielding a highly compact total

• Active High Enable

solution size. It is also available in a DDPAK-7.

APPLICATIONS

blank

• FPGA Applications

blank

• DSP Core and I/O Voltages

blank

• Post-Regulation Applications

blank

• Applications with Special Start-Up Time or

Sequencing Requirements

blank

• Hot-Swap and Inrush Controls

blank

Figure 1. Typical Application Circuit (Adjustable)

Figure 2. Turn-On Response

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (27 pages)

PAGE 1
TPS749xx www.ti.com SBVS082G – JUNE 2007 – REVISED NOVEMBER 2010 3.0A Low Dropout Linear Regulator with Programmable Soft-Start Check for Samples: TPS749xx FEATURES 1 • • • • • 2 • • • • • • • VOUT Range: 0.8V to 3.6V Ultralow VIN Range: 0.8V to 5.5V VBIAS Range: 2.7V to 5.5V Low Dropout: 120mV (typ) at 3.
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TPS749xx SBVS082G – JUNE 2007 – REVISED NOVEMBER 2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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TPS749xx www.ti.com SBVS082G – JUNE 2007 – REVISED NOVEMBER 2010 THERMAL INFORMATION TPS74901 (2) THERMAL METRIC (1) RGW (20 PINS) KTW (7 PINS) qJA Junction-to-ambient thermal resistance (3) 30.5 20.1 qJCtop Junction-to-case (top) thermal resistance (4) 27.6 2.
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TPS749xx SBVS082G – JUNE 2007 – REVISED NOVEMBER 2010 www.ti.com ELECTRICAL CHARACTERISTICS At TJ = –40°C to +125°C, VEN = 1.1V, VIN = VOUT + 0.3V, CBIAS = 0.1mF, CIN = COUT = 10mF, CNR = 1nF, IOUT = 50mA, and VBIAS = 5.0V, unless otherwise noted. Typical values are at TJ = +25°C. TPS74901 PARAMETER TEST CONDITIONS VIN Input voltage range 2.7 VREF Internal reference (Adj.) TJ = +25°C 0.798 VIN = 5V, IOUT = 3.0V VREF Accuracy (RGW package) (1) VOUT + 2.2V ≤ VBIAS ≤ 5.5V, 50mA ≤ IOUT ≤ 3.
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TPS749xx www.ti.com SBVS082G – JUNE 2007 – REVISED NOVEMBER 2010 BLOCK DIAGRAM IN Current Limit BIAS UVLO OUT Thermal Limit 0.44mA VOUT R1 SS CSS Soft-Start Discharge 0.8V Reference FB PG EN Hysteresis and Deglitch R2 0.9 ´ VREF GND Table 1. Standard 1% Resistor Values for Programming the Output Voltage (1) (1) R1 (kΩ) R2 (kΩ) VOUT (V) Short Open 0.8 0.619 4.99 0.9 1.13 4.53 1.0 1.37 4.42 1.05 1.87 4.99 1.1 2.49 4.99 1.2 4.12 4.75 1.5 3.57 2.87 1.8 3.57 1.
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TPS749xx SBVS082G – JUNE 2007 – REVISED NOVEMBER 2010 www.ti.com PIN ASSIGNMENTS RGW PACKAGE QFN-20 (TOP VIEW) IN NC NC NC OUT 5 4 3 2 1 KTW PACKAGE DDPAK-7 (TOP VIEW) IN 6 20 OUT IN 7 19 OUT IN 8 18 OUT PG 9 17 NC BIAS 10 16 FB 12 13 14 15 GND NC NC SS SS FB OUT GND IN BIAS EN 11 EN 1 2 3 4 5 6 7 PIN DESCRIPTIONS NAME KTW (DDPAK) RGW (QFN) IN 5 5–8 Unregulated input to the device. EN 7 11 Enable pin. Driving this pin high enables the regulator.
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TPS749xx www.ti.com SBVS082G – JUNE 2007 – REVISED NOVEMBER 2010 TYPICAL CHARACTERISTICS At TJ = +25°C, VIN = VOUT(TYP) + 0.3V, VBIAS = 5V, IOUT = 50mA, VEN = VIN, CIN = 1mF, CBIAS = 4.7mF, and COUT = 10mF, unless otherwise noted. VIN LINE REGULATION VBIAS LINE REGULATION 0.20 0.5 0.15 0.4 Change in VOUT (%) Change in VOUT (%) 0.3 0.10 -40°C 0.05 0 +25°C +125°C -0.05 0.2 -40°C 0.1 0 -0.1 +125°C +25°C -0.2 -0.01 -0.3 -0.15 -0.4 -0.20 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.
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TPS749xx SBVS082G – JUNE 2007 – REVISED NOVEMBER 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) At TJ = +25°C, VIN = VOUT(TYP) + 0.3V, VBIAS = 5V, IOUT = 50mA, VEN = VIN, CIN = 1mF, CBIAS = 4.7mF, and COUT = 10mF, unless otherwise noted. VIN DROPOUT VOLTAGE vs (VBIAS – VOUT) AND TEMPERATURE (TJ) VBIAS DROPOUT VOLTAGE vs IOUT AND TEMPERATURE (TJ) 2200 200 IOUT = 0.
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TPS749xx www.ti.com SBVS082G – JUNE 2007 – REVISED NOVEMBER 2010 TYPICAL CHARACTERISTICS (continued) At TJ = +25°C, VIN = VOUT(TYP) + 0.3V, VBIAS = 5V, IOUT = 50mA, VEN = VIN, CIN = 1mF, CBIAS = 4.7mF, and COUT = 10mF, unless otherwise noted. BIAS PIN CURRENT vs IOUT AND TEMPERATURE (TJ) BIAS PIN CURRENT vs VBIAS AND TEMPERATURE (TJ) 2.0 2.0 1.8 1.8 +125°C +125°C 1.6 1.6 1.4 IBIAS (mA) IBIAS (mA) 1.4 1.2 1.0 0.8 -40°C 0.6 1.2 +25°C 1.0 0.8 0.6 +25°C -40°C 0.4 0.4 0.2 0.2 0 0 0 0.
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TPS749xx SBVS082G – JUNE 2007 – REVISED NOVEMBER 2010 www.ti.com TYPICAL CHARACTERISTICS At TJ = +25°C, VIN = VOUT(TYP) + 0.3V, VBIAS = 5V, IOUT = 1A, VEN = VIN = 1.8V, VOUT = 1.5V, CIN = 1mF, CBIAS = 4.7mF, and COUT = 10mF, unless otherwise noted. VBIAS LINE TRANSIENT VIN LINE TRANSIENT CSS = 1nF COUT = 10mF (Ceramic) COUT = 10mF (Ceramic) 100mV/div 100mV/div COUT = 2.2mF (Ceramic) 100mV/div CSS = 1nF 3.8V 5.0V 1V/div 1V/div 1V/ms 3.3V 1V/ms 1.8V Time (50ms/div) Time (50ms/div) Figure 20.
PAGE 11
TPS749xx www.ti.com SBVS082G – JUNE 2007 – REVISED NOVEMBER 2010 APPLICATION INFORMATION The TPS749xx belongs to a family of low dropout regulators that feature soft-start capabilities. These regulators use a low current bias input to power all internal control circuitry, allowing the NMOS pass transistor to regulate very low input and output voltages. The use of an NMOS-pass FET offers several critical advantages for many applications.
PAGE 12
TPS749xx SBVS082G – JUNE 2007 – REVISED NOVEMBER 2010 www.ti.com DROPOUT VOLTAGE VIN The TPS749xx offers very low dropout performance, making it well-suited for high-current low VIN/low VOUT applications. The low dropout of the TPS749xx allows the device to be used in place of a DC/DC converter and still achieve good efficiencies. This provides designers with the power architecture for their applications to achieve the smallest, simplest, and lowest cost solution.
PAGE 13
TPS749xx www.ti.com SBVS082G – JUNE 2007 – REVISED NOVEMBER 2010 The maximum recommended soft-start capacitor is 0.015mF. Larger soft-start capacitors can be used and will not damage the device; however, the soft-start capacitor discharge circuit may not be able to fully discharge the soft-start capacitor when enabled. Soft-start capacitors larger than 0.015mF could be a problem in applications where the user needs to rapidly pulse the enable pin and still requires the device to soft-start from ground.
PAGE 14
TPS749xx SBVS082G – JUNE 2007 – REVISED NOVEMBER 2010 condition of PG pin sink current is up to 1mA, so the pull-up resistor for PG should be in the range of 10kΩ to 1MΩ. PG is only provided on the QFN package. If output voltage monitoring is not needed, the PG pin can be left floating. INTERNAL CURRENT LIMIT The TPS749xx features a factory-trimmed, accurate current limit that is flat over temperature and supply voltage.
PAGE 15
TPS749xx www.ti.com SBVS082G – JUNE 2007 – REVISED NOVEMBER 2010 NOTE: When the device is mounted on an application PCB, it is strongly recommended to use ΨJT and ΨJB, as explained in the Estimating Junction Temperature section. 120 100 qJA (°C/W) 80 ESTIMATING JUNCTION TEMPERATURE 60 qJA (RGW) 40 20 qJA (KTW) 0 0 1 2 3 4 5 7 6 8 9 10 2 Board Copper Area (in ) Note: qJA value at board size of 9in2 (that is, 3in × 3in) is a JEDEC standard. Figure 29.
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TPS749xx SBVS082G – JUNE 2007 – REVISED NOVEMBER 2010 www.ti.com (1) TT on top of IC TB on PCB TT on top of IC 1mm TB on PCB surface (2) 1mm (a) Example RGW (QFN) Package Measurement (1) TT is measured at the center of both the X- and Y-dimensional axes. (2) TB is measured below the package lead on the PCB surface. (b) Example KTW (DDPAK) Package Measurement Figure 30.
PAGE 17
TPS749xx www.ti.com Looking at Figure 31, the RGW package thermal performance has negligible dependency on board size. The KTW package, however, does have a measurable dependency on board size. This dependency exists because the package shape is not point-symmetric to an IC center. In the KTW package, for example (see Figure 30), silicon is not beneath the measuring point of TT which is the center of the X and Y dimension, so that ΨJT has a dependency.
PAGE 18
TPS749xx SBVS082G – JUNE 2007 – REVISED NOVEMBER 2010 www.ti.com REVISION HISTORY NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision F (August, 2010) to Revision G • Page Corrected equation for and updated values for Table 2 .......................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
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PACKAGE MATERIALS INFORMATION www.ti.com 9-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS74901KTWR DDPAK/ TO-263 KTW 7 500 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2 TPS74901KTWT DDPAK/ TO-263 KTW 7 50 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2 TPS74901RGWR VQFN RGW 20 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 9-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS74901KTWR DDPAK/TO-263 KTW 7 500 367.0 367.0 45.0 TPS74901KTWT DDPAK/TO-263 KTW 7 50 367.0 367.0 45.0 TPS74901RGWR VQFN RGW 20 3000 367.0 367.0 35.0 TPS74901RGWT VQFN RGW 20 250 210.0 185.0 35.
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MECHANICAL DATA MPSF015 – AUGUST 2001 KTW (R-PSFM-G7) PLASTIC FLANGE-MOUNT 0.410 (10,41) 0.385 (9,78) 0.304 (7,72) –A– 0.006 –B– 0.303 (7,70) 0.297 (7,54) 0.0625 (1,587) H 0.055 (1,40) 0.0585 (1,485) 0.300 (7,62) 0.064 (1,63) 0.045 (1,14) 0.252 (6,40) 0.056 (1,42) 0.187 (4,75) 0.370 (9,40) 0.179 (4,55) 0.330 (8,38) H 0.296 (7,52) A 0.605 (15,37) 0.595 (15,11) 0.012 (0,305) C 0.000 (0,00) 0.019 (0,48) 0.104 (2,64) 0.096 (2,44) H 0.017 (0,43) 0.050 (1,27) C C F 0.034 (0,86) 0.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.