Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - LDO voltage regulator Positivbe, adjustable SOT 23 5

HKQ as formed or HKJ mounted dead bug

HKQ PACKAGE

(TOP VIEW)

GND

OUT

GND

NC/FB

OUT

DBV PACKAGE

(TOP VIEW)

HKJ PACKAGE

(TOP VIEW)

GND

OUT

TPS76901-HT

www.ti.com

SLVS959D –JUNE 2009–REVISED NOVEMBER 2013

ULTRALOW-POWER 100-mA LOW DROPOUT LINEAR REGULATOR

Check for Samples: TPS76901-HT

FEATURES

SUPPORTS EXTREME TEMPERATURE

APPLICATIONS

• 100-mA Low-Dropout Regulator

• Controlled Baseline

• Available in Adjustable Versions

• One Assembly/Test Site

• Only 335-μA Quiescent Current With 100 mA

at 210°C • One Fabrication Site

• 1-μA Quiescent Current in Standby Mode • Available in Extreme (–55°C/210°C)

Temperature Range

(1)

• Dropout Voltage Typically 71 mV at 100 mA

• Extended Product Life Cycle

• Over Current Limitation

• Extended Product-Change Notification

APPLICATIONS

• Product Traceability

• Down-Hole Drilling

• Texas Instruments' high temperature products

utilize highly optimized silicon (die) solutions

• High Temperature Environments

with design and process enhancements to

maximize performance over extended

temperatures.

(1) Custom temperature ranges available

DESCRIPTION

The TPS76901 low-dropout (LDO) voltage regulator offers the benefits of low dropout voltage, ultralow-power

operation, and miniaturized packaging. This regulator features low dropout voltages and ultralow quiescent

current compared to conventional LDO regulators. The TPS76901 is ideal for micropower operations and where

board space is at a premium.

A combination of new circuit design and process innovation has enabled the usual PNP pass transistor to be

replaced by a PMOS pass element. Because the PMOS pass element behaves as a low-value resistor, the

dropout voltage is very low, and is directly proportional to the load current. Since the PMOS pass element is a

voltage-driven device, the quiescent current is ultralow (28 μA maximum) and is stable over the entire range of

output load current (0 mA to 100 mA). Intended for use in portable systems such as laptops and cellular phones,

the ultralow-dropout voltage feature and ultralow-power operation result in a significant increase in system

battery operating life.

The TPS76901 also features a logic-enabled sleep mode to shut down the regulator, reducing quiescent current

to 1 μA, typical at T

= 25°C. The TPS76901 is a variable version programmable over the range of 1.2 V to

4.5 V).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (22 pages)

PAGE 1
TPS76901-HT www.ti.
PAGE 2
TPS76901-HT SLVS959D – JUNE 2009 – REVISED NOVEMBER 2013 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
PAGE 3
TPS76901-HT www.ti.
PAGE 4
TPS76901-HT SLVS959D – JUNE 2009 – REVISED NOVEMBER 2013 www.ti.com ORDERING INFORMATION (1) TA PACKAGE (2) ORDERABLE PART NUMBER TOP-SIDE MARKING –55°c to 175°C DBV TPS76901HDBVT PCFS TPS76901SKGD1 KGD –55°c to 210°C (1) (2) NA TPS76901SKGD2 HKJ TPS76901SHKJ TPS76901SHKJ HKQ TPS76901SHKQ TPS76901SHKQ For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com.
PAGE 5
TPS76901-HT www.ti.com SLVS959D – JUNE 2009 – REVISED NOVEMBER 2013 THERMAL CHARACTERISTICS FOR DBV PACKAGE (1) (2) BOARD RθJC RθJA DERATING FACTOR ABOVE TA = 25°C Low K (1) 65.8 °C/W 259 °C/W 3.9 mW/°C High K (2) 65.8 °C/W 180 °C/W 5.6 mW/°C The JEDEC Low K (1s) board design used to derive this data was a 3-inch x 3-inch, two layer board with 2-ounce copper traces on top of the board.
PAGE 6
TPS76901-HT SLVS959D – JUNE 2009 – REVISED NOVEMBER 2013 www.ti.com ELECTRICAL CHARACTERISTICS (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TJ = 25°C VO = 0 V (1) Output current limit EN = VI, 5 V ≤ VI ≤ 10 V Standby current 750 TJ = 175°C 350 TJ = 210°C 505 FB = 1.224 V VIH High level enable input voltage 5 V ≤ VI ≤ 10 V 8.8 PSRR 5 V ≤ VI ≤ 10 V Power supply ripple rejection f = 1 kHz, CO = 10 μF (3) IIN 0.2 V 0.
PAGE 7
TPS76901-HT www.ti.com SLVS959D – JUNE 2009 – REVISED NOVEMBER 2013 TYPICAL CHARACTERISTICS (VIN VOUT vs TEMPERATURE = 5 V , Load = 100 mA) 3.8 3.7 VOUT - V 3.6 3.5 3.4 3.3 3.2 25 125 150 180 200 210 Temperature - °C Figure 1. OUTPUT IMPEDANCE vs FREQUENCY 2 1.8 ZO - Output Impedance - Ω 1.6 VI = 4.3 V CO = 4.7 µF ESR = 0.3 Ω TA = 25°C 1.4 1.2 1 0.8 IO = 1 mA 0.6 0.4 IO = 100 mA 0.2 0 10 100 1k 10 k 100 k 1M f - Frequency - Hz Figure 2.
PAGE 8
TPS76901-HT SLVS959D – JUNE 2009 – REVISED NOVEMBER 2013 www.ti.com TYPICAL CHARACTERISTICS (continued) LDO STARTUP TIME EN VO 0 20 40 60 80 100 120 140 160 180 200 t - Time - µs Figure 3.
PAGE 9
TPS76901-HT www.ti.com SLVS959D – JUNE 2009 – REVISED NOVEMBER 2013 TYPICAL CHARACTERISTICS (continued) 1000 Estimated Life - Years 100 10 Electromigration Fail Mode 1 0 110 130 150 170 190 210 230 Continuous T J - °C Note: 1. See datasheet for absolute maximum and minimum recommended operating conditions. 2. Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect life). Figure 4.
PAGE 10
TPS76901-HT SLVS959D – JUNE 2009 – REVISED NOVEMBER 2013 www.ti.com TYPICAL CHARACTERISTICS (continued) 10000000 1000000 Estimated Life (Hours) Wirebond Voiding Fail Mode 100000 10000 1000 100 100 110 120 130 140 150 160 170 180 Continuous T J (°C) Note: 1. See datasheet for absolute maximum and minimum recommended operating conditions. 2. Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect life). Figure 5.
PAGE 11
TPS76901-HT www.ti.com SLVS959D – JUNE 2009 – REVISED NOVEMBER 2013 APPLICATION INFORMATION (1) The TPS76901 low-dropout (LDO) regulator has been optimized for use in battery-operated equipment. It features extremely low dropout voltages, low quiescent current (17 μA nominally), and enables inputs to reduce supply currents to 1 μA when the regulators are turned off.
PAGE 12
TPS76901-HT SLVS959D – JUNE 2009 – REVISED NOVEMBER 2013 www.ti.com Table 2. CAPACITOR SELECTION (1) PART NO. MANUFACTURER VALUE MAX ESR (1) SIZE (H x L x W) (1) T494B475K016AS KEMET 4.7 μF 1.5 Ω 1.9 x 3.5 x 2.8 195D106x0016x2T SPRAGUE 10 μF 1.5 Ω 1.3 x 7.0 x 2.7 695D106x003562T SPRAGUE 10 μF 1.3 Ω 2.5 x 7.6 x 2.5 TPSC475K035R0600 AVX 4.7 μF 0.6 Ω 2.6 x 6.0 x 3.2 Size is in mm. ESR is maximum resistance in Ohms at 100 kHz and TA = 25°C.
PAGE 13
TPS76901-HT www.ti.com SLVS959D – JUNE 2009 – REVISED NOVEMBER 2013 REVISION HISTORY Changes from Revision E (April 2012) to Revision D • Page Added KGD2 package option ...............................................................................................................................................
PAGE 14
PACKAGE OPTION ADDENDUM www.ti.
PAGE 15
PACKAGE OPTION ADDENDUM www.ti.com 11-May-2014 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
PAGE 16
PACKAGE MATERIALS INFORMATION www.ti.com 25-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPS76901HDBVT Package Package Pins Type Drawing SPQ SOT-23 250 DBV 5 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 179.0 8.4 Pack Materials-Page 1 3.2 B0 (mm) K0 (mm) P1 (mm) 3.2 1.4 4.0 W Pin1 (mm) Quadrant 8.
PAGE 17
PACKAGE MATERIALS INFORMATION www.ti.com 25-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS76901HDBVT SOT-23 DBV 5 250 203.0 203.0 35.
PAGE 18
PAGE 19
PAGE 20
PAGE 21
PAGE 22
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.