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TPS7A47xx

RF LDO

Amplifier

TPS7A33

Negative-Voltage

Regulator

TPS7A4700

TPS7A4701

www.ti.com

SBVS204E –JUNE 2012–REVISED JANUARY 2014

36-V, 1-A, 4-µV

RMS

, RF LDO Voltage Regulator

Check for Samples: TPS7A4700, TPS7A4701

FEATURES

DESCRIPTION

The TPS7A47 is a family of positive voltage (+36 V),

• Input Voltage Range: +3 V to +36 V

ultralow-noise (4 µV

RMS

) low dropout linear regulators

• Output Voltage Noise:

(LDO) capable of sourcing a 1-A load.

4 µV

RMS

(10 Hz, 100 kHz)

The TPS7A4700 output voltages are user-

• Power-Supply Ripple Rejection:

programmable (up to 20.5 V) using a printed circuit

– 82 dB (100 Hz)

board (PCB) layout without the need of external

resistors or feed-forward capacitors, thus reducing

– ≥ 55 dB (10 Hz, 10 MHz)

overall component count.

• Two Output Voltage Modes:

The TPS7A4701 output voltage can be configured

– ANY-OUT™ Version (User-Programmable

with a user-programmable PCB layout (up to 20.5 V),

Output via PCB Layout):

or adjustable (up to 34 V) with external feedback

– No External Feedback Resistors or

resistors.

Feed-Forward Capacitors Required

The TPS7A47 is designed with bipolar technology

– Output Voltage Range: +1.4 V to +20.5 V

primarily for high-accuracy, high-precision

– Adjustable Version (TPS7A4701 only):

instrumentation applications where clean voltage rails

– Output Voltage Range: +1.4 V to +34 V

are critical to maximize system performance. This

feature makes the device ideal for powering

• Output Current: 1 A

operational amplifiers, analog-to-digital converters

• Dropout Voltage: 307 mV at 1 A

(ADCs), digital-to-analog converters (DACs), and

• CMOS Logic Level-Compatible Enable Pin

other high-performance analog circuitry in critical

applications such as medical, radio frequency (RF),

• Built-In Fixed Current Limit and

and test-and-measurement.

Thermal Shutdown

In addition, the TPS7A47 is ideal for post dc-dc

• Available in High Thermal Performance

converter regulation. By filtering out the output

Package: 5-mm × 5-mm QFN

voltage ripple inherent to dc-dc switching

• Operating Temperature Range:

conversions, maximum system performance is

–40°C to +125°C

ensured in sensitive instrumentation, test-and-

measurement, audio, and RF applications.

APPLICATIONS

For applications where positive and negative low-

• Voltage-Controlled Oscillators (VCO)

noise rails are required, consider TI's TPS7A33 family

• Frequency Synthesizers

of negative high-voltage, ultralow-noise linear

regulators.

• Test and Measurement

• Instrumentation, Medical, and Audio

• RX, TX, and PA Circuitry

• Supply Rails for Operational Amplifiers,

DACs, ADCs, and Other High-Precision Analog

Circuitry

• Post DC-DC Converter Regulation and

Ripple Filtering

• Base Stations and Telecom Infrastructure

• +12-V and +24-V Industrial Buses

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2ANY-OUT, PowerPAD are trademarks of Texas Instruments.

3All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (25 pages)

PAGE 1
TPS7A4700 TPS7A4701 www.ti.com SBVS204E – JUNE 2012 – REVISED JANUARY 2014 36-V, 1-A, 4-µVRMS, RF LDO Voltage Regulator Check for Samples: TPS7A4700, TPS7A4701 FEATURES DESCRIPTION • • The TPS7A47 is a family of positive voltage (+36 V), ultralow-noise (4 µVRMS) low dropout linear regulators (LDO) capable of sourcing a 1-A load.
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TPS7A4700 TPS7A4701 SBVS204E – JUNE 2012 – REVISED JANUARY 2014 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
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TPS7A4700 TPS7A4701 www.ti.com SBVS204E – JUNE 2012 – REVISED JANUARY 2014 THERMAL INFORMATION TPS7A47xx THERMAL METRIC (1) RGW UNITS 20 PINS θJA Junction-to-ambient thermal resistance θJCtop Junction-to-case (top) thermal resistance θJB Junction-to-board thermal resistance 11.9 ψJT Junction-to-top characterization parameter 0.3 ψJB Junction-to-board characterization parameter 11.9 θJCbot Junction-to-case (bottom) thermal resistance 1.7 (1) 32.
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TPS7A4700 TPS7A4701 SBVS204E – JUNE 2012 – REVISED JANUARY 2014 www.ti.com ELECTRICAL CHARACTERISTICS (continued) At –40°C ≤ TJ ≤ +125°C; VIN = VOUT(NOM) + 1.0 V or VIN = 3.0 V (whichever is greater); VEN = VIN; IOUT = 0 mA; CIN =10 µF; COUT = 10 µF; CNR = 10 nF; SENSE/FB tied to OUT; and 0P1V, 0P2V, 0P4V, 0P8V, 1P6V, 3P2V, 6P4V1, 6P4V2 pins OPEN, unless otherwise noted.
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TPS7A4700 TPS7A4701 www.ti.com SBVS204E – JUNE 2012 – REVISED JANUARY 2014 PIN DESCRIPTIONS (continued) PIN NAME PIN NUMBER GND 7 DESCRIPTION Ground IN 15, 16 NC 2, 17-19 NR 14 OUT 1, 20 Input supply. A capacitor greater than or equal to 1 µF must be tied from this pin to ground to assure stability.
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TPS7A4700 TPS7A4701 SBVS204E – JUNE 2012 – REVISED JANUARY 2014 www.ti.com TYPICAL CHARACTERISTICS At –40°C ≤ TJ ≤ +125°C; VIN = VOUT(NOM) + 1.0 V or VIN = 3.0 V (whichever is greater); VEN = VIN; IOUT = 0 mA; CIN =10 µF; COUT = 10 µF; CNR = 1 µF; SENSE/FB tied to OUT; and 0P1V, 0P2V, 0P4V, 0P8V, 1P6V, 3P2V, 6P4V1, 6P4V2 pins OPEN, unless otherwise noted. NOISE vs OUTPUT VOLTAGE 100 LINE REGULATION 4 VOUT = 1.4 V, VNOISE = 4.17 µVRMS VOUT = 5 V, VNOISE = 4.67 µVRMS VOUT = 10 V, VNOISE = 7.
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TPS7A4700 TPS7A4701 www.ti.com SBVS204E – JUNE 2012 – REVISED JANUARY 2014 TYPICAL CHARACTERISTICS (continued) At –40°C ≤ TJ ≤ +125°C; VIN = VOUT(NOM) + 1.0 V or VIN = 3.0 V (whichever is greater); VEN = VIN; IOUT = 0 mA; CIN =10 µF; COUT = 10 µF; CNR = 1 µF; SENSE/FB tied to OUT; and 0P1V, 0P2V, 0P4V, 0P8V, 1P6V, 3P2V, 6P4V1, 6P4V2 pins OPEN, unless otherwise noted. GROUND CURRENT vs OUTPUT CURRENT ENABLE CURRENT vs INPUT VOLTAGE 10 2.0 −40°C 0°C +25°C +85°C +125°C 1.8 1.6 IEN (µA) IGND (mA) 1.
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TPS7A4700 TPS7A4701 SBVS204E – JUNE 2012 – REVISED JANUARY 2014 www.ti.com TYPICAL CHARACTERISTICS (continued) At –40°C ≤ TJ ≤ +125°C; VIN = VOUT(NOM) + 1.0 V or VIN = 3.0 V (whichever is greater); VEN = VIN; IOUT = 0 mA; CIN =10 µF; COUT = 10 µF; CNR = 1 µF; SENSE/FB tied to OUT; and 0P1V, 0P2V, 0P4V, 0P8V, 1P6V, 3P2V, 6P4V1, 6P4V2 pins OPEN, unless otherwise noted.
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TPS7A4700 TPS7A4701 www.ti.com SBVS204E – JUNE 2012 – REVISED JANUARY 2014 TYPICAL CHARACTERISTICS (continued) At –40°C ≤ TJ ≤ +125°C; VIN = VOUT(NOM) + 1.0 V or VIN = 3.0 V (whichever is greater); VEN = VIN; IOUT = 0 mA; CIN =10 µF; COUT = 10 µF; CNR = 1 µF; SENSE/FB tied to OUT; and 0P1V, 0P2V, 0P4V, 0P8V, 1P6V, 3P2V, 6P4V1, 6P4V2 pins OPEN, unless otherwise noted. LOAD TRANSIENT LINE TRANSIENT VIN = 5 V to 15 V VOUT = 3.
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TPS7A4700 TPS7A4701 SBVS204E – JUNE 2012 – REVISED JANUARY 2014 www.ti.com APPLICATION INFORMATION TYPICAL APPLICATION CIRCUIT Output voltage is set by grounding the appropriate control pins, as shown in Figure 23. When grounded, all control pins add a specific voltage on top of the internal reference voltage (VREF = 1.4 V). For example, when grounding pins 0P1V, 0P2V, and 1P6V, the voltage values 0.1 V, 0.2 V, and 1.6 V are added to the 1.4-V internal reference voltage for VOUT(NOM) equal to 3.
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TPS7A4700 TPS7A4701 www.ti.com SBVS204E – JUNE 2012 – REVISED JANUARY 2014 Table 2 shows a list of the most common output voltages and their corresponding pin settings. The voltage setting pins have a binary weight; therefore, the output voltage can be programmed to any value from 1.4 V to 20.5 V on 100-mV steps. Table 2. Common Output Voltages and the Corresponding Pin Settings PIN NAMES AND VOLTAGE PER PIN VOUT (V) 0P1V 100 mV 0P2V 200 mV 0P4V 400 mV 0P8V 800 mV 1P6V 1.6 V 3P2V 3.2 V 6P4V1 6.
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TPS7A4700 TPS7A4701 SBVS204E – JUNE 2012 – REVISED JANUARY 2014 www.ti.com Table 3 shows the resistor combinations to achieve some standard rail voltages with commercially-available 1% tolerance resistors. The resulting output voltages will yield a nominal error of < 0.5%. Table 3. Suggested Resistors for Common Voltage Rails VOUT R1, Calculated R1, Closest 1% Value R2 1.4 V 0Ω 0Ω ∞ 1.8 V 2.782 kΩ 2.8 kΩ 9.76 kΩ 3.3 V 13.213 kΩ 13.3 kΩ 9.76 kΩ 5V 25.650 kΩ 25.5 kΩ 10 kΩ 12 V 77.
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TPS7A4700 TPS7A4701 www.ti.com SBVS204E – JUNE 2012 – REVISED JANUARY 2014 INTERNAL CURRENT LIMIT (ICL) The internal current limit circuit is used to protect the LDO against high-load current faults or shorting events. The LDO is not designed to operate at a steady-state current limit. During a current-limit event, the LDO sources constant current. Therefore, the output voltage falls while load impedance decreases.
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TPS7A4700 TPS7A4701 SBVS204E – JUNE 2012 – REVISED JANUARY 2014 www.ti.com AC PERFORMANCE LDO ac performance is typically understood to include power-supply rejection ratio, load step transient response, and output noise. These metrics are primarily a function of open-loop gain and bandwidth, phase margin, and reference noise.
PAGE 15
TPS7A4700 TPS7A4701 www.ti.com SBVS204E – JUNE 2012 – REVISED JANUARY 2014 THERMAL INFORMATION Thermal Protection The TPS7A470x contains a thermal shutdown protection circuit to turn off the output current when excessive heat is dissipated in the LDO. Thermal shutdown occurs when the thermal junction temperature (TJ) of the main pass-FET exceeds +170°C (typical). Thermal shutdown hysteresis assures that the LDO again resets (turns on) when the temperature falls to +150°C (typical).
PAGE 16
TPS7A4700 TPS7A4701 SBVS204E – JUNE 2012 – REVISED JANUARY 2014 www.ti.com 120 100 qJA (°C/W) 80 60 qJA (RGW) 40 20 0 0 1 2 3 4 5 7 6 8 9 10 2 Board Copper Area (in ) 2 NOTE: θJA value at a board size of 9-in (that is, 3-in × 3-in) is a JEDEC standard. Figure 25. θJA vs Board Size Estimating Junction Temperature The JEDEC standard now recommends the use of PSI thermal metrics to estimate the junction temperatures of the LDO while in-circuit on a typical PCB board application.
PAGE 17
TPS7A4700 TPS7A4701 www.ti.com SBVS204E – JUNE 2012 – REVISED JANUARY 2014 REVISION HISTORY NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision D (December 2013) to Revision E Page • Changed Output Voltage Noise value from 4.17 µV to 4 µV in three instances on front page ............................................ 1 • Changed 2nd and 3rd paragraphs of Description section .................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 22-Jan-2014 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.
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PACKAGE MATERIALS INFORMATION www.ti.com 1-May-2014 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing TPS7A4700RGWR VQFN RGW 20 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 TPS7A4700RGWT VQFN RGW 20 250 180.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2 TPS7A4701RGWR VQFN RGW 20 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 1-May-2014 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS7A4700RGWR VQFN RGW 20 3000 367.0 367.0 35.0 TPS7A4700RGWT VQFN RGW 20 250 210.0 185.0 35.0 TPS7A4701RGWR VQFN RGW 20 3000 367.0 367.0 35.0 TPS7A4701RGWT VQFN RGW 20 250 210.0 185.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.